This document defines machine language, assembly language, and instruction sets. It discusses that machine language is binary code understood by the CPU and consists of instructions and operands. Assembly language uses mnemonics to represent machine code instructions. It is translated into machine language by an assembler. The document also categorizes instruction types into data transfer, arithmetic, and logical groups and provides examples of instructions from each group like MOVE, ADD, AND.

2. 3.1.1DefineInstructionset,machineandassemblylanguage
 INSTRUCTION SET :
 The complete collection of instructions that are understood
by a CPU
• Known also as Machine Code/Machine Instruction
• Binary representation
• Usually represented by assembly codes

3. Machinelanguage:
 a binary program (or binary code).
 a sequence of instruction and operand in
binary that list the exact representation
instruction as they appear in computer
memory.
 Natural language of a particular computer
system.
 Strings of numbers or binary codes (0 or 1).

4. Machinelanguage:
 Machine-dependent (differ from one µP to
other µP.
 Program written in any other language must
be translated to binary representation of
instruction before they can be executed by
computer.
 Programmers need to know specifically the
architecture of CPU.

6.  Assembly language is a symbolic representation of
a machine language of specific processor.
Assembly language is a form that is very
dependent on the underlying architecture.
 Using english -like abbreviations (MUL), ( ADD),
(SUB)
 Assembler as translator.
 Assembler - Translate ordinary mnemonics such as
MOVE Data, Acc, into their corresponding machine
language (the only form of instruction that
computer can executed)

7. Easy to make compilers, debuggers and other
device tools.
Allow accessing information that is not
accessible (restricted) from high level
languages.
More function library that can be used in
programming development.
Possibility to make library function that
compatible with different compiler and

8.  (Development) Requires longer development time
 (Reliability & Security) Easy to makes error
 (Debug) More possibility for errors
 (Maintain) Difficult to modify because it allows
unstructured code.
 (Portability) Difficult to porting to different platforms.
platforms.

9.  Using everyday English and common
mathematical notation. (x = I + j)
 Overcome problems : assembly language
require many instruction to accomplish a
simple task.
 Single instruction in HLL = several AL
instructions.
 Compiler as translator.

12. H
HH
HH HH
HH HH HH HH
9/19/2019
32 24|23 16 | 15 8|7 4|3 0

13. DATA SIZE BIT
(n)
RANGE
(0-2n)
Byte 8 bit 0 - 255
Word 16 bit 0 - 65535
Long word 32 bit 0 - 4294967295
9/19/2019

14. DATA SIZE BIT
(n)
NEGATIVE
RANGE
(-2n-1)
POSITIVE RANGE
(0 to 2n-1-1)
byte 8 bit -2 8-1 28-1 -1
Word 16 bit -2 16-1 216-1 -1
Long word 32 bit -2 32-1 232-1 -1
9/19/2019

15. Data transfer Group
 Arithmetic Group
Logical Group

16.  These instructions transfer or move data between
its internal registers, between an internal register
and a storage location in memory, or between two
locations in memory.
 - memory to register
 - register to memory
 - register to register
 - memory to memory

17. MNEMONIC MOVE
CHARACTERISTICS REGISTER REGISTER
OPERATION MOVE.W D0, D1
BEFORE D0 D1
AFTER D0 D1
78 56 34 12
78 56 56 7812 34 56 78
9/19/2019
12 34 56 78

18. 01000 42 51
01002 55 13
9/19/2019
MNEMONIC MOVE
CHARACTERISTICS MEMORY REGISTER
OPERATION MOVE.W $1000, D1
BEFORE D1
AFTER D1
FE ED 42 51
EFBEEDFE
135501002
514201000

19. MNEMONIC MOVE
CHARACTERISTICS REGSITER MEMORY
OPERATION MOVE.W D1, $1000
BEFORE D1
AFTER D1
9/19/2019
EFBEEDFE
135501000
EFBE01000
EFBEEDFE
135501002
514201000

20. 9/19/2019
MNEMONIC MOVE
CHARACTERISTICS MEMORY MEMORY
OPERATION MOVE.W $1000, $1002
BEFORE D1
AFTER D1 EFBEEDFE
514201002
514201000
EFBEEDFE
135501002
514201000

21. 9/19/2019
MNEMONIC MOVEQ (move quick)
CHARACTERISTICS • The value is moved as integer 8 bit (range-128 to +127)
• Data size = 8 bit (1 byte)
• 8 bit is extended to fulfill 32bit data register
OPERATION MOVEQ #$F1,D1
BEFORE D1
AFTER D1
FF FF FF F1
12 34 56 78

22. 9/19/2019
ARAHAN ARITMETIK

23. MNEMONIC ADD
CHARACTERISTICS •To add the value at destination= destination +source
•Data size = B.W.L
OPERATION ADD.W D1, D3
BEFORE D1 D3
AFTER D1 D3
9/19/2019
FD CC 01 23
FD CC 57 9B12 34 56 78
12 34 56 78

24. 9/19/2019
MNEMONIC ADDQ (add quick)
CHARACTERISTICS • Data size for source operand = 1…..8
• Data size for destination operand = any value
• Data size = B.W.L
OPERATION ADDQ.W #3,D6
BEFORE D6
AFTER D6
12 34 57 02
12 34 56 FF

25. 9/19/2019
MNEMONIC SUB
CHARACTERISTICS •Data size for source operand = 1…..8
• Data size for destination operand = any value
• Data size = B.W.L
OPERATION SUB.W D1,D0
BEFORE D0 D1
AFTER D0 D1
00 00 00 0200 00 30 40
00 00 00 0200 00 30 3E

26. 9/19/2019
MNEMONIC SUBQ (Sub quick)
CHARACTERISTICS • Data size for source operand = 1…..8
• Data size for destination operand = any value
• Data size = B.W.L
OPERATION SUBQ.B #7,D6
BEFORE D6
AFTER D6
12 34 56 78
12 34 56 71

27. 9/19/2019
MNEMONIC MULU
CHARACTERISTICS •Unsigned Multiplication
• Source operand = 16 bit, any addressing mode
• Destination operand = 16 bit, data register
• Multiplication outcome= 32 bit, saved in destination operand
OPERATION MULU.W #2,D3
BEFORE D3
AFTER D3
FD CC 01 00
00 00 02 00

28. MNEMONIC MULS
CHARACTERISTICS • Signed Multiplication
• Source operand = 16 bit, any addressing mode
• Destination operand = 16 bit, data register
• Multiplication outcome= 32 bit, saved in destination operand
OPERATION MULS.W #3,D3
BEFORE D3
AFTER D3
9/19/2019
FD CC FF 00
FF FF FD 00

29. MNEMONIC DIVU
CHARACTERISTICS • Unsigned Division
• Data size for source operand= 16 bit divider, and addressing
modes.
• Data size for destination operand = the value is divided with 342
bit, data register
•Division outcome= low of destination register. Balance =high of
destination register
OPERATION DIVU.W D0,D3
BEFORE D0 D3
AFTER D0 D3
9/19/2019
00 00 03 0800 00 00 12
00 02 00 2B00 00 00 12
Baki Hasil Bahagi

30. MNEMONIC DIVS
CHARACTERISTICS • Signed division
• source operand= 16 bit data
• destination operand = 32 bit data
• Division outcome= low of destination operand. Balance = high of
destination operand (16 bit)
OPERATION DIVS.W D0,D3
BEFORE D0 D3
AFTER D0 D3
9/19/2019
FF FF FE 0000 00 00 12
FF F8 FF E4
00 00 00 12
Baki Hasil Bahagi

31. 9/19/2019
ARAHAN LOGIK

32. 9/19/2019

33. MNEMONIC AND.B #$3E, D3
CHARACTERISTICS
[D3(B) AND $3E  D3 (B) ]
(8 bit data in D3 ‘AND’ with 8 bit data and the output in
D3)
OPERATION
BEFORE D3
AFTER D3
9/19/2019
74 0 1 1 1 0 1 0 0
AND 3E 0 0 1 1 1 1 1 0
34 0 0 1 1 0 1 0 0
12345674
12343634

34. MNEMONIC OR.B D0, D1
CHARACTERISTICS [D1 (B) or D0 (B)  D1(B) ]
(8 bit data in D1 ‘OR’ with 8 bit data in D0, and the output in D1)
OPERATION
BEFORE D0 D1
AFTER D0 D1
9/19/2019
3E 0 0 1 1 1 1 1 0
OR 74 0 1 1 1 0 1 0 0
7E 0 1 1 1 1 1 1 0
1234563E98765474
1234367E98765474

35. MNEMONIC NOT.B D1
CHARACTERISTICS
[D1(B) NOT  D1 ]
(The content of D1 is NOT, and the
output in D1)
OPERATION AA  1010 1010
55  0101 0101
BEFORE
AFTER
9/19/2019
12345655
123436AA
D1