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MULTI-FUNCTIONAL AND 
RE-CONFIGURABLE 
MICROWAVE CONTROL 
DEVICES 
CHIK Man Chum, Jonathan 
Department Electronic Engineering
Content 
 Motivation 
 Part 1 – Tunable hybrids and couplers 
 Literature review 
 Proposed Rat-race Coupler with Wide bandwidth 
and Tunable Power Dividing Ratio 
 Proposed CMOS Variable Power Divider Design 
Using Integrated Transformer
Content (con’t) 
 Part 2 – Tunable attenuator 
 Literature review 
 Varactor-based Microwave Attenuator with Wide 
Tuning Ratio and Flat Insertion Loss 
 High Linearity Varactor-Based Variable Attenuator 
 Conclusion
Motivation 
 To improve channel capacity and transmission 
quality of future communication systems, re-configurability 
is an essential feature for 
enhanced performance, size and cost reduction. 
 For example, 
 Beam steering 
 Polarization diversity 
 MIMO 
 Signal control devices (magnitude and phase) 
with compact size and low cost are of prime 
interest.
Part 1 – Tunable hybrid and 
couplers 
 Basic requirements of tunable couplers: 
 Continuous tuning 
 Large tuning range (coupling coefficient) 
 Minimal control complexity (voltages and 
components) 
 Compact size 
 Available bandwidth 
 Insertion loss
Literature review: tunable 
devices 
 Based on directional couplers with variable 
coupling 
 Modifying the characteristic impedance of 
microstrip branches
Literature review (tunable 
devices) 
 Based on Wilkinson Power Divider with 
variable dividing ratio 
 DGS + tuning diodes: to realize transmission line 
of variable characteristic impedance 
Island Microstrip 
Unequal Dividing Ratio [1 : N] 
Bias Voltage (V)
Conventional Methods: Major 
Drawbacks 
 Variation of insertion loss with frequency 
 Small tuning range 
 Poor return loss performance 
 Limited bandwidth 
 Complex fabrication (multi-layer, backside 
etching)
Tunable Rat-race Coupler 
(TRRC) 
1 Port 2 Port 
0 0 Z , 270 @ f 
9 
 At center frequency: 
 Tunable power dividing ratio 퐾 = 
푆43 
푆23 
= − 
푆21 
푆41 
= 
휔0퐶퐷푍0 
 Ideal port isolation and return loss performance 
 Single control voltage 
CD 
VC 
Z0 , 90 @ f0 
Biasing circuitry 
CD 
Port 4 Port 3 
Cheng, K.M.; and Sung Yeung, "A Novel Rat-Race Coupler With Tunable Power Dividing Ratio, Ideal Port Isolation, and Return Loss Performance," 
IEEE Transactions on Microwave Theory and Techniques, vol.61, no.1, pp.55-60, Jan. 2013
K = 0.5 
K = 1 
K = 2 
Simulated Performance (ideal) 
10 
S11 
S22 
S31 
S21 
S41 
S23 Port 1 
Port 3 
Port 1 
Port 3 
Phase Difference (°)
Application Examples 
11 
 Variable Power Divider 
(anti-phase output) 
 Variable Power Divider 
(in-phase output) 
 Variable attenuator
Proposed Tunable Rat-race Coupler (New) 
 Broadband operation (~40%) 
 Wide tuning ratio 
 Compact size 
 Simple control (Single voltage, only two tuning 
diodes) 
 Simple fabrication (single layer) 
N1 N2 
Port 1 
Port 4 
Port 2 
Port 3 
CD 
CD
Proposed Tunable Rat-race Coupler (New) 
 N1 and N2 are passive networks with specific 
frequency characteristics (Frequency compensation) 
  
dY dY K d bY 
d d d Z 
2 2 
Z 
e,1 o,1 0 
    
    
0 0 0 
        
 
0 0 0 
dY dY 
e,2  
o,1 
d d 
  
    
  
0 0 
dY dY 
o,2  
e,1 
d d 
  
    
  
0 0 
N1 N2 
Port 1 
Port 4 
Port 2 
Port 3 
CD 
CD 
Cheng, K.M.; and Chik, M.C., "A Novel Frequency Compensated Rat-Race Coupler With Wide Bandwidth and Tunable Power Dividing," 
IEEE Transactions on Microwave Theory and Techniques, vol.62, no.8, pp.55-60, August 2013
Circuit diagram and Prototype 
 Semi-distributed implementation 
 Avoid lossy lumped inductor 
 Lower assembly cost 
Port1 Port 2 
C V bias R 
block C 
D C 
Port 3 
D C 
Port 4 
 , B Z 
, A Z 
, A Z 1 N 
, A Z 
2 N 
Center frequency : 1 GHz 
Substrate: Duroid RO4003C 
Size: g/5  g/15 
Tuning diode: Infineon 
BB857 
ZA = 86, ZB = 48, 
 = 30°,  = 33°
Ideal simulation 
Phase Difference (°) 
K = 0.5 
K = 1 
K = 2 
S11 
S22 
S31 
S21 
S41 
S23 
Port 1 
Port 3 
Port 1 
Port 3
Measurement Results (K = 0.5) 
0 
-10 
-20 
-30 
-40 
0 
-2 
-4 
-6 
-8 
-10 
| (Measured) |S 
| (Measured) |S 
| (Measured) |S 
| (Measured) |S 
| (EM) 
| (EM) 
| (EM) 
| (EM) 
| (Measured) |S 
| (EM) 
| (Measured) |S 
| (EM) 
| (Measured) |S 
| (EM) 
0.75 0.875 1 1.125 1.25 
Frequency (GHz) 
(dB) 
(dB) 
S 
ij 
|S 
21 
21 
|S 
41 
41 
|S 
23 
23 
|S 
43 
43 
200 
180 
160 
0.75 0.875 1 1.125 1.25 
Frequency (GHz) 
S 
41 
- S 
21 
(Measured) 
S 
41 
- S 
21 
(EM) 
20 
0 
-20 
0.75 0.875 1 1.125 1.25 
Frequency (GHz) 
Phase Difference () 
S 
43 
- S 
23 
(Measured) 
S 
43 
- S 
23 
(EM) 
0.75 0.875 1 1.125 1.25 
Frequency (GHz) 
S 
ij 
|S 
11 
11 
|S 
22 
22 
|S 
31 
31
Measurement Results 
/S 
| (EM) 
/S 
| (EM) 
/S 
| (Measured) 
/S 
| (Measured) 
1 4.5 8 11.5 15 
10 
5 
0 
-5 
-10 
Control Voltage (V) 
Power Dividing Ratio (dB) 
|S 
21 
41 
|S 
43 
23 
|S 
21 
41 
|S 
43 
23
Short Summary 
 Novel broadband tunable rat-race coupler 
 Optimal design of N1 and N2 for broadband 
operation (analytical formulation) 
 Increased Bandwidth (from 10% to 40%) 
 Semi-lumped implementation (internal loss 
and size)
Proposed CMOS variable power 
divider 
 For CMOS implementation, transmission line is 
replaced of LC circuit. 
 For further size reduction (inductors), 
transformer is introduced. 
Port 1 Port 2 
Port 4 
Port 3 
C 
C 
Port 1 Port 2 
Port 3 
 
 
 
 
kA 
Chik, M.C., Li W.; and Cheng, K.M.; "A compact variable power divider design in CMOS process," Asia-Pacific Microwave Conference, November 
2013
Simulation Results 
kA = kB = 0 (inductor) kA = kB = 0.2 
(transformer) 
4 4.5 5 5.5 6 
0 
-2 
-4 
-6 
-8 
-10 
Frequency (GHz) 
(dB) 
S 
ij 
S 
21 
S 
41 
S 
23 
K = 0.5 
K = 1 
K = 2 
4 4.5 5 5.5 6 
0 
-10 
-20 
-30 
-40 
Frequency (GHz) 
(dB) 
S 
ij 
S 
11 
S 
22 
K = 0.5 
K = 1 
K = 2 
4 4.5 5 5.5 6 
0 
-2 
-4 
-6 
-8 
-10 
Frequency (GHz) 
(dB) 
S 
ij 
S 
21 
S 
41 
S 
23 
K = 0.5 
K = 1 
K = 2 
4 4.5 5 5.5 6 
0 
-10 
-20 
-30 
-40 
Frequency (GHz) 
(dB) 
S 
ij 
S 
11 
S 
22 
K = 0.5 
K = 1 
K = 2
Circuit layout and Fabricated 
chip 
 Center frequency: 5 GHz 
 Die size: 1.2mm × 0.8mm 
 Tuning ratio of varactor diode : 2 - 3 
Vbias VCC
Measurement Results (K = 0.5) 
| (Simulated) 
| (Simulated) 
| (Measured) 
| (Measured) 
4 4.5 5 5.5 6 
0 
-2 
-4 
-6 
-8 
-10 
Frequency (GHz) 
(dB) 
S 
ij 
|S 
21 
|S 
31 
|S 
21 
|S 
31 
4 4.5 5 5.5 6 
200 
180 
160 
Frequency (GHz) 
Phase Difference () 
S 
41 
- S 
21 
(Simulated) 
S 
41 
- S 
21 
(Measured) 
| (Simulated) |S 
| (Simulated) |S 
| (Simulated) 
| (Measured) |S 
| (Measured) |S 
| (Measured) 
4 4.5 5 5.5 6 
0 
-10 
-20 
-30 
-40 
(dB) 
S 
ij 
Frequency (GHz) 
|S 
11 
22 
33 
|S 
11 
22 
33 
| (Simulated) 
| (Measured) 
4 4.5 5 5.5 6 
0 
-10 
-20 
-30 
-40 
Frequency (GHz) 
(dB) 
S 
ij 
|S 
23 
|S 
23
Measurement results 
5 
0 
-5 
-10 
-1 -0.5 0 0.5 1 
Control Voltage (V) 
Power Dividing Ratio (dB) 
Simulated 
Measured 
100 
75 
50 
25 
0 
-1 -0.5 0 0.5 1 
|2 (%) 
31 
|2 - |S 
21 
|2 - |S 
11 
1 - |S 
Control Voltage (V)
Short Summary 
24 
 Realization of TRRC in CMOS technology 
 Chip area reduction by using different transformer 
 Good performance over 10% fractional bandwidth 
 Tuning range: 9 dB 
 Port isolation: > 25 dB 
 Return loss: > 13 dB 
 Output phase difference deviation: < ± 5º 
 Tuning capability of power dividing ratio 
 Limited by small tuning capacitance ratio (< 3 typically) 
of standard CMOS diodes
Part 2 – Variable Attenuator 
 Control of output power level (e.g. AGC) 
 Conventionally, PIN diodes are used as the 
tuning elements 
 Biasing current required (DC power consumption) 
 Multiple diodes 
 Multiple control voltages 
 Limited tuning range (attenuation level) 
 Limited dynamic range (power-handling capability)
Literature Review: variable 
attenuators 
PIN diode based Varactor 
based
Proposed variable attenuator (New) 
 Variable power divider with 180° outputs 
 Power combiner 
 Varactor-tuned 
Chik, M.C., and Cheng, K.M.; "A varactor-tuned variable attenuator design with wide tuning range and flat insertion loss response," International 
Microwave Symposium, June 2014
Comparison 
Attenuator with PIN diodes Proposed attenuator 
DC Power 
consumption 
Increases with number of 
diodes 
Zero 
Bandwidth Wide Moderate 
Control method Multiple control voltages Single control voltage 
Hybrid design with 
varactors 
Proposed attenuator 
Variation with 
frequency 
Large Small 
Tuning range 
(Attenuation) 
Increases with capacitance 
ratio (tuning diode) 
Independent of 
capacitance ratio (tuning 
diode)
Theory of operation: proposed 
design 
1 Port 
Wilkinson 
power 
combiner 
Broadband 
Tunable 
Rat - 
race coupler 
2 Port 
A 
B  
AB 
2 
A2  B2  1 
1 1 1 
2 2 2 (1 ) 
21 BA CA 
2 
k 
S S S 
k 
 
   

Simulated performance
Circuit diagram and Prototype 
 Center frequency: 1 GHz 
 Substrate: Duroid RO4003C 
 Tuning diode: Infineon BB857 
Port 1 
Port 2 
0 2Z 
C 
C V 
bias R 
block C 
D C 
, A Z 
0 Z 
0 2Z 
g  
4 
1 Port 
Port 2 
block C block C 
D C
Simulation and Measurement 
Results 
 4 dB to 30 dB with a control voltage (reverse-bias) 
ranging from 0 to 8.2V 
 Limited by non-ideal cancellation of signals 
0 2 4 6 8 10 12 14 16 18 20 
40 
30 
20 
10 
0 
Attenuation Level (dB) 
Control Voltage (V) 
EM 
Measured
Simulation and Measurement 
Results 
0 
-5 
-10 
-15 
-20 
-25 
-30 
VC = 0.66V 
VC = 7.12V 
0.8 0.85 0.9 0.95 1 1.05 1.1 
| (dB) 
21 
|S 
Frequency (GHz) 
0 
-10 
-20 
-30 
-40 
|S11|, VC = 7.12V 
|S22|, VC = 7.12V 
|S11|, VC = 0.66V 
|S22|, VC = 0.66V 
0.8 0.85 0.9 0.95 1 1.05 1.1 
Reflection Coefficient (dB) 
Frequency (GHz)
Short Summary 
 Novel Varactor-based Variable Attenuator 
 Wide tuning (attenuation) 
 Simple structure 
 Single control voltage 
 Zero DC power consumption 
 Issues need to be addressed 
 Narrow-band (at large attenuation) 
 Attenuation is very sensitive to bias (control) 
voltage 
 Limited power handling capability
Issues: Narrowband operation 
 Insertion loss flatness degrades with 
increasing attenuation  Smaller bandwidth
Issues: Narrowband operation 
S21 of TRRC 
S21 of Wilkinson 
power combiner 
S41 of TRRC 
S31 of Wilkinson 
power combiner
Proposed solution (Frequency 
compensation) 
 WPC is replaced by rat-race coupler with k = 1 
S21 of TRRC S23 of RRC 
S41 of TRRC S43 of RRC
Circuit diagram and Prototype 
 Broadband rat-race coupler (TRRC) 
 Fixed rat-race coupler 
Port 1 
VC 
Cblock 
Rbias 
Cblock 
C 
ZA,  
ZB,  
Z0 
Z0 
C 
Port 2 
C 
C 
Center frequency: 1 GHz 
Substrate: Duroid RO4003C 
Tuning diode: Infineon BB857
Measured results 
0 
-10 
-20 
-30 
-40 
|S22|, VC = 7.2V 
0.8 0.85 0.9 0.95 1 1.05 1.1 
Reflection Coefficient (dB) 
Frequency (GHz) 
0 
-5 
-10 
-15 
-20 
-25 
-30 
| (dB) 
21 
0 2 4 6 8 10 12 14 16 18 20 
40 
30 
20 
10 
0 
Attenuation Level (dB) 
Control Voltage (V) 
Measurement 
Simulation 
|S11|, VC = 4.5V 
|S11|, VC = 7.2V 
|S22|, VC = 4.5V 
VC = 4.5V 
0.8 0.85 0.9 0.95 1 1.05 1.1 
|S 
Frequency (GHz) 
VC = 7.2V
Power performance (attenuator) 
 Attenuation level = 10 dB)  Attenuation level = 25 dB) 
0 5 10 15 20 25 
20 
0 
-20 
-40 
-60 
-80 
-100 
Output Power (dB) 
Input Power (dB) 
Fundamental 
IMD 
3 
0 5 10 15 20 25 
20 
0 
-20 
-40 
-60 
-80 
-100 
Output Power (dB) 
Input Power (dB) 
Fundamental 
IMD 
3 
f1 f2 
Fundamental 
IMD3 
Attenuator
Nonlinearity Study 
 Tuning varactor is the major contributor of IMD 
C 
j 
V 
( ) 0 
 n 
C V 
  
 
1 
2 
0 1 2 C(v)  C C v C v  .... 
C 
j 
V 
 n 
C 
C 
  
 
1 
0 
0 
n C 
0 1 
 1 
 
  1 
 
 
 n 
C 
j 
V 
C 
  
  
0 
n n C 
  2 
2 2 
1 
2 1 
  
 
 
 n 
C 
j 
V 
C 
 
Nonlinearity Study 
 Output power (nonlinear current method) 
P 
2 2 
1 1 1 2 1 in 
OUT in 
P  A  α C  
C P 
3 2 1 2 2 IMD in P   C  C P 
 Reduction in C1, C2 
  
2 
A 
2 
2 3 
 reduction of IMD and power expansion
Proposed linearization method 
Original Design Proposed linearization 
circuit C(VB) 
CP 
C(VA) 
 Additional capacitor with fixed value 
 Requires minimal modification of the original 
design including both layout and choice of 
components
Proposed linearization method 
CP = 0 pF 
CP = 1 pF 
CP = 2 pF 
CP = 2.7 pF 
CP = 3 pF 
CP = 0 pF 
CP = 2.5 pF 
VA VB 
CD 
Cheng, K.M.; and Chik, M.C., "A Novel Varactor-tuned Variable Attenuator Design With Enhanced Linearity Performance," 
IEEE Transactions on Microwave Theory and Techniques, submitted.
Simulation Results 
20 
0 
-20 
-40 
-60 
-80 
-100 
-120 
0 5 10 15 20 25 
Output Power (dB) 
Input Power (dB) 
Fundamental 
IMD3 
CP = 0 pF 
CP = 1 pF 
CP = 2 pF 
CP = 2.7 pF 
CP = 3 pF
Circuit Diagram and Prototype 
Center frequency: 1 GHz 
Substrate: Duroid 
RO4003C 
Tuning diode: Infineon 
BB857 
0 2Z 
C 
CV 
bias R 
block C 
Cp 
DC 
, A Z 
0 Z 
0 2Z 
g  
4 
1 P ort 
Port 2 
block C block C 
D C 
Cp 
Port 1 
Port 2
Measured results 
 CP = 0 and CP = 2.2pF 
40 
20 
 Reduce attenuation sensitivity 
 IMD suppression 
0 
-20 
-40 
 Power expansion improvement 
 Significant for large CP 
0 5 10 15 20 25 
0 
-10 
-20 
-30 
-40 
(dB) 
S 
21 
Bias Voltage (V) 
C 
P 
= 0 pF 
C 
P 
= 2.2 pF 
Funndamental 
IMD 
0 5 10 15 20 25 30 
-60 
-80 
Output Power (dB) 
Input Power (dB) 
3 
C 
P 
= 0 pF 
C 
P 
= 2.2 pF 
0 5 10 15 20 25 30 
40 
20 
0 
-20 
-40 
-60 
-80 
Output Power (dB) 
Input Power (dB) 
Funndamental 
IMD 
3 
C 
P 
= 0 pF 
C 
P 
= 2.2 pF
Short Summary 
 Novel linearization method 
 Simple to apply 
 Attenuation level is much less sensitive to control 
voltage 
 Substantial reduction in IMD
Conclusion 
 Several new microwave control devices have 
been introduced: 
 Broadband rat-race with tunable power dividing 
ratio 
 CMOS implementation of variable power divider 
 Varactor-tuned variable attenuator with high 
linearity 
 They offer enhanced performance: 
 Wide tuning capability 
 Wide bandwidth
Author’s Publication List 
 Journal Paper 
 K. K. M. Cheng, and M. C. J. Chik, “A frequency-compensated rat-race coupler with 
wide bandwidth and tunable power dividing ratio,” IEEE Trans. Microw. Theory & 
Techn., vol. 61, no. 8, pp. 2841-2847, Aug. 2013. 
 M. C. J. Chik, and K. K. M. Cheng, “Group delay investigation of rat-race coupler 
design with tunable power dividing ratio,” IEEE Microw. Compon. Lett., vol. 24, no. 5, 
pp 324-326., May 2014. 
 K. K. M. Cheng, and M. C. J. Chik, “A varactor-based variable attenuator design with 
enhanced linearity performance,” IEEE Trans. Microw. Theory & Techn. (Submitted) 
 M. C. J. Chik, and K. K. M. Cheng, "A varactor-based variable attenuator with 
extended bandwidth by frequency compensation" (In preparation) 
 Conference Paper 
 M. C. J. Chik, and K. K. M. Cheng, “A low-profile, compact, mode-decomposition 
based antenna array for use in beam-forming application,” 2012 Asia-Pacific Microw. 
Conf. Proc., Kaosiung, 2012, pp. 58-60, Dec. 2012. 
 M. C. J. Chik, W. Li, and K. K. M. Cheng, ‘A 5 GHz, integrated transformer based, 
variable power divider design in CMOS process’, in 2013 Asia-Pacific Microw. Conf. 
Proc., Seoul, 2013, pp. 366 – 368., Nov. 2013. 
 M. C. J. Chik, and K. K. M. Cheng, “A novel, varactor-based microwave attenuator with 
wide tuning ratio and flat insertion loss response,” presented in Proc. Int. Microw. 
Symp. 2014., Tampa Bay, USA., Jun. 2014. 
 L. P. Cai, M. C. J. Chik, and K. K. M. Cheng, “A compact, linearly-polarized antenna 
design with electronically steerable angle of orientation,” 2014 Asia-Pacific Mrcow. 
Conf. (Submitted)

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Multi-functional microwave control devices

  • 1. MULTI-FUNCTIONAL AND RE-CONFIGURABLE MICROWAVE CONTROL DEVICES CHIK Man Chum, Jonathan Department Electronic Engineering
  • 2. Content  Motivation  Part 1 – Tunable hybrids and couplers  Literature review  Proposed Rat-race Coupler with Wide bandwidth and Tunable Power Dividing Ratio  Proposed CMOS Variable Power Divider Design Using Integrated Transformer
  • 3. Content (con’t)  Part 2 – Tunable attenuator  Literature review  Varactor-based Microwave Attenuator with Wide Tuning Ratio and Flat Insertion Loss  High Linearity Varactor-Based Variable Attenuator  Conclusion
  • 4. Motivation  To improve channel capacity and transmission quality of future communication systems, re-configurability is an essential feature for enhanced performance, size and cost reduction.  For example,  Beam steering  Polarization diversity  MIMO  Signal control devices (magnitude and phase) with compact size and low cost are of prime interest.
  • 5. Part 1 – Tunable hybrid and couplers  Basic requirements of tunable couplers:  Continuous tuning  Large tuning range (coupling coefficient)  Minimal control complexity (voltages and components)  Compact size  Available bandwidth  Insertion loss
  • 6. Literature review: tunable devices  Based on directional couplers with variable coupling  Modifying the characteristic impedance of microstrip branches
  • 7. Literature review (tunable devices)  Based on Wilkinson Power Divider with variable dividing ratio  DGS + tuning diodes: to realize transmission line of variable characteristic impedance Island Microstrip Unequal Dividing Ratio [1 : N] Bias Voltage (V)
  • 8. Conventional Methods: Major Drawbacks  Variation of insertion loss with frequency  Small tuning range  Poor return loss performance  Limited bandwidth  Complex fabrication (multi-layer, backside etching)
  • 9. Tunable Rat-race Coupler (TRRC) 1 Port 2 Port 0 0 Z , 270 @ f 9  At center frequency:  Tunable power dividing ratio 퐾 = 푆43 푆23 = − 푆21 푆41 = 휔0퐶퐷푍0  Ideal port isolation and return loss performance  Single control voltage CD VC Z0 , 90 @ f0 Biasing circuitry CD Port 4 Port 3 Cheng, K.M.; and Sung Yeung, "A Novel Rat-Race Coupler With Tunable Power Dividing Ratio, Ideal Port Isolation, and Return Loss Performance," IEEE Transactions on Microwave Theory and Techniques, vol.61, no.1, pp.55-60, Jan. 2013
  • 10. K = 0.5 K = 1 K = 2 Simulated Performance (ideal) 10 S11 S22 S31 S21 S41 S23 Port 1 Port 3 Port 1 Port 3 Phase Difference (°)
  • 11. Application Examples 11  Variable Power Divider (anti-phase output)  Variable Power Divider (in-phase output)  Variable attenuator
  • 12. Proposed Tunable Rat-race Coupler (New)  Broadband operation (~40%)  Wide tuning ratio  Compact size  Simple control (Single voltage, only two tuning diodes)  Simple fabrication (single layer) N1 N2 Port 1 Port 4 Port 2 Port 3 CD CD
  • 13. Proposed Tunable Rat-race Coupler (New)  N1 and N2 are passive networks with specific frequency characteristics (Frequency compensation)   dY dY K d bY d d d Z 2 2 Z e,1 o,1 0         0 0 0          0 0 0 dY dY e,2  o,1 d d         0 0 dY dY o,2  e,1 d d         0 0 N1 N2 Port 1 Port 4 Port 2 Port 3 CD CD Cheng, K.M.; and Chik, M.C., "A Novel Frequency Compensated Rat-Race Coupler With Wide Bandwidth and Tunable Power Dividing," IEEE Transactions on Microwave Theory and Techniques, vol.62, no.8, pp.55-60, August 2013
  • 14. Circuit diagram and Prototype  Semi-distributed implementation  Avoid lossy lumped inductor  Lower assembly cost Port1 Port 2 C V bias R block C D C Port 3 D C Port 4  , B Z , A Z , A Z 1 N , A Z 2 N Center frequency : 1 GHz Substrate: Duroid RO4003C Size: g/5  g/15 Tuning diode: Infineon BB857 ZA = 86, ZB = 48,  = 30°,  = 33°
  • 15. Ideal simulation Phase Difference (°) K = 0.5 K = 1 K = 2 S11 S22 S31 S21 S41 S23 Port 1 Port 3 Port 1 Port 3
  • 16. Measurement Results (K = 0.5) 0 -10 -20 -30 -40 0 -2 -4 -6 -8 -10 | (Measured) |S | (Measured) |S | (Measured) |S | (Measured) |S | (EM) | (EM) | (EM) | (EM) | (Measured) |S | (EM) | (Measured) |S | (EM) | (Measured) |S | (EM) 0.75 0.875 1 1.125 1.25 Frequency (GHz) (dB) (dB) S ij |S 21 21 |S 41 41 |S 23 23 |S 43 43 200 180 160 0.75 0.875 1 1.125 1.25 Frequency (GHz) S 41 - S 21 (Measured) S 41 - S 21 (EM) 20 0 -20 0.75 0.875 1 1.125 1.25 Frequency (GHz) Phase Difference () S 43 - S 23 (Measured) S 43 - S 23 (EM) 0.75 0.875 1 1.125 1.25 Frequency (GHz) S ij |S 11 11 |S 22 22 |S 31 31
  • 17. Measurement Results /S | (EM) /S | (EM) /S | (Measured) /S | (Measured) 1 4.5 8 11.5 15 10 5 0 -5 -10 Control Voltage (V) Power Dividing Ratio (dB) |S 21 41 |S 43 23 |S 21 41 |S 43 23
  • 18. Short Summary  Novel broadband tunable rat-race coupler  Optimal design of N1 and N2 for broadband operation (analytical formulation)  Increased Bandwidth (from 10% to 40%)  Semi-lumped implementation (internal loss and size)
  • 19. Proposed CMOS variable power divider  For CMOS implementation, transmission line is replaced of LC circuit.  For further size reduction (inductors), transformer is introduced. Port 1 Port 2 Port 4 Port 3 C C Port 1 Port 2 Port 3     kA Chik, M.C., Li W.; and Cheng, K.M.; "A compact variable power divider design in CMOS process," Asia-Pacific Microwave Conference, November 2013
  • 20. Simulation Results kA = kB = 0 (inductor) kA = kB = 0.2 (transformer) 4 4.5 5 5.5 6 0 -2 -4 -6 -8 -10 Frequency (GHz) (dB) S ij S 21 S 41 S 23 K = 0.5 K = 1 K = 2 4 4.5 5 5.5 6 0 -10 -20 -30 -40 Frequency (GHz) (dB) S ij S 11 S 22 K = 0.5 K = 1 K = 2 4 4.5 5 5.5 6 0 -2 -4 -6 -8 -10 Frequency (GHz) (dB) S ij S 21 S 41 S 23 K = 0.5 K = 1 K = 2 4 4.5 5 5.5 6 0 -10 -20 -30 -40 Frequency (GHz) (dB) S ij S 11 S 22 K = 0.5 K = 1 K = 2
  • 21. Circuit layout and Fabricated chip  Center frequency: 5 GHz  Die size: 1.2mm × 0.8mm  Tuning ratio of varactor diode : 2 - 3 Vbias VCC
  • 22. Measurement Results (K = 0.5) | (Simulated) | (Simulated) | (Measured) | (Measured) 4 4.5 5 5.5 6 0 -2 -4 -6 -8 -10 Frequency (GHz) (dB) S ij |S 21 |S 31 |S 21 |S 31 4 4.5 5 5.5 6 200 180 160 Frequency (GHz) Phase Difference () S 41 - S 21 (Simulated) S 41 - S 21 (Measured) | (Simulated) |S | (Simulated) |S | (Simulated) | (Measured) |S | (Measured) |S | (Measured) 4 4.5 5 5.5 6 0 -10 -20 -30 -40 (dB) S ij Frequency (GHz) |S 11 22 33 |S 11 22 33 | (Simulated) | (Measured) 4 4.5 5 5.5 6 0 -10 -20 -30 -40 Frequency (GHz) (dB) S ij |S 23 |S 23
  • 23. Measurement results 5 0 -5 -10 -1 -0.5 0 0.5 1 Control Voltage (V) Power Dividing Ratio (dB) Simulated Measured 100 75 50 25 0 -1 -0.5 0 0.5 1 |2 (%) 31 |2 - |S 21 |2 - |S 11 1 - |S Control Voltage (V)
  • 24. Short Summary 24  Realization of TRRC in CMOS technology  Chip area reduction by using different transformer  Good performance over 10% fractional bandwidth  Tuning range: 9 dB  Port isolation: > 25 dB  Return loss: > 13 dB  Output phase difference deviation: < ± 5º  Tuning capability of power dividing ratio  Limited by small tuning capacitance ratio (< 3 typically) of standard CMOS diodes
  • 25. Part 2 – Variable Attenuator  Control of output power level (e.g. AGC)  Conventionally, PIN diodes are used as the tuning elements  Biasing current required (DC power consumption)  Multiple diodes  Multiple control voltages  Limited tuning range (attenuation level)  Limited dynamic range (power-handling capability)
  • 26. Literature Review: variable attenuators PIN diode based Varactor based
  • 27. Proposed variable attenuator (New)  Variable power divider with 180° outputs  Power combiner  Varactor-tuned Chik, M.C., and Cheng, K.M.; "A varactor-tuned variable attenuator design with wide tuning range and flat insertion loss response," International Microwave Symposium, June 2014
  • 28. Comparison Attenuator with PIN diodes Proposed attenuator DC Power consumption Increases with number of diodes Zero Bandwidth Wide Moderate Control method Multiple control voltages Single control voltage Hybrid design with varactors Proposed attenuator Variation with frequency Large Small Tuning range (Attenuation) Increases with capacitance ratio (tuning diode) Independent of capacitance ratio (tuning diode)
  • 29. Theory of operation: proposed design 1 Port Wilkinson power combiner Broadband Tunable Rat - race coupler 2 Port A B  AB 2 A2  B2  1 1 1 1 2 2 2 (1 ) 21 BA CA 2 k S S S k     
  • 31. Circuit diagram and Prototype  Center frequency: 1 GHz  Substrate: Duroid RO4003C  Tuning diode: Infineon BB857 Port 1 Port 2 0 2Z C C V bias R block C D C , A Z 0 Z 0 2Z g  4 1 Port Port 2 block C block C D C
  • 32. Simulation and Measurement Results  4 dB to 30 dB with a control voltage (reverse-bias) ranging from 0 to 8.2V  Limited by non-ideal cancellation of signals 0 2 4 6 8 10 12 14 16 18 20 40 30 20 10 0 Attenuation Level (dB) Control Voltage (V) EM Measured
  • 33. Simulation and Measurement Results 0 -5 -10 -15 -20 -25 -30 VC = 0.66V VC = 7.12V 0.8 0.85 0.9 0.95 1 1.05 1.1 | (dB) 21 |S Frequency (GHz) 0 -10 -20 -30 -40 |S11|, VC = 7.12V |S22|, VC = 7.12V |S11|, VC = 0.66V |S22|, VC = 0.66V 0.8 0.85 0.9 0.95 1 1.05 1.1 Reflection Coefficient (dB) Frequency (GHz)
  • 34. Short Summary  Novel Varactor-based Variable Attenuator  Wide tuning (attenuation)  Simple structure  Single control voltage  Zero DC power consumption  Issues need to be addressed  Narrow-band (at large attenuation)  Attenuation is very sensitive to bias (control) voltage  Limited power handling capability
  • 35. Issues: Narrowband operation  Insertion loss flatness degrades with increasing attenuation  Smaller bandwidth
  • 36. Issues: Narrowband operation S21 of TRRC S21 of Wilkinson power combiner S41 of TRRC S31 of Wilkinson power combiner
  • 37. Proposed solution (Frequency compensation)  WPC is replaced by rat-race coupler with k = 1 S21 of TRRC S23 of RRC S41 of TRRC S43 of RRC
  • 38. Circuit diagram and Prototype  Broadband rat-race coupler (TRRC)  Fixed rat-race coupler Port 1 VC Cblock Rbias Cblock C ZA,  ZB,  Z0 Z0 C Port 2 C C Center frequency: 1 GHz Substrate: Duroid RO4003C Tuning diode: Infineon BB857
  • 39. Measured results 0 -10 -20 -30 -40 |S22|, VC = 7.2V 0.8 0.85 0.9 0.95 1 1.05 1.1 Reflection Coefficient (dB) Frequency (GHz) 0 -5 -10 -15 -20 -25 -30 | (dB) 21 0 2 4 6 8 10 12 14 16 18 20 40 30 20 10 0 Attenuation Level (dB) Control Voltage (V) Measurement Simulation |S11|, VC = 4.5V |S11|, VC = 7.2V |S22|, VC = 4.5V VC = 4.5V 0.8 0.85 0.9 0.95 1 1.05 1.1 |S Frequency (GHz) VC = 7.2V
  • 40. Power performance (attenuator)  Attenuation level = 10 dB)  Attenuation level = 25 dB) 0 5 10 15 20 25 20 0 -20 -40 -60 -80 -100 Output Power (dB) Input Power (dB) Fundamental IMD 3 0 5 10 15 20 25 20 0 -20 -40 -60 -80 -100 Output Power (dB) Input Power (dB) Fundamental IMD 3 f1 f2 Fundamental IMD3 Attenuator
  • 41. Nonlinearity Study  Tuning varactor is the major contributor of IMD C j V ( ) 0  n C V    1 2 0 1 2 C(v)  C C v C v  .... C j V  n C C    1 0 0 n C 0 1  1    1    n C j V C     0 n n C   2 2 2 1 2 1      n C j V C  
  • 42. Nonlinearity Study  Output power (nonlinear current method) P 2 2 1 1 1 2 1 in OUT in P  A  α C  C P 3 2 1 2 2 IMD in P   C  C P  Reduction in C1, C2   2 A 2 2 3  reduction of IMD and power expansion
  • 43. Proposed linearization method Original Design Proposed linearization circuit C(VB) CP C(VA)  Additional capacitor with fixed value  Requires minimal modification of the original design including both layout and choice of components
  • 44. Proposed linearization method CP = 0 pF CP = 1 pF CP = 2 pF CP = 2.7 pF CP = 3 pF CP = 0 pF CP = 2.5 pF VA VB CD Cheng, K.M.; and Chik, M.C., "A Novel Varactor-tuned Variable Attenuator Design With Enhanced Linearity Performance," IEEE Transactions on Microwave Theory and Techniques, submitted.
  • 45. Simulation Results 20 0 -20 -40 -60 -80 -100 -120 0 5 10 15 20 25 Output Power (dB) Input Power (dB) Fundamental IMD3 CP = 0 pF CP = 1 pF CP = 2 pF CP = 2.7 pF CP = 3 pF
  • 46. Circuit Diagram and Prototype Center frequency: 1 GHz Substrate: Duroid RO4003C Tuning diode: Infineon BB857 0 2Z C CV bias R block C Cp DC , A Z 0 Z 0 2Z g  4 1 P ort Port 2 block C block C D C Cp Port 1 Port 2
  • 47. Measured results  CP = 0 and CP = 2.2pF 40 20  Reduce attenuation sensitivity  IMD suppression 0 -20 -40  Power expansion improvement  Significant for large CP 0 5 10 15 20 25 0 -10 -20 -30 -40 (dB) S 21 Bias Voltage (V) C P = 0 pF C P = 2.2 pF Funndamental IMD 0 5 10 15 20 25 30 -60 -80 Output Power (dB) Input Power (dB) 3 C P = 0 pF C P = 2.2 pF 0 5 10 15 20 25 30 40 20 0 -20 -40 -60 -80 Output Power (dB) Input Power (dB) Funndamental IMD 3 C P = 0 pF C P = 2.2 pF
  • 48. Short Summary  Novel linearization method  Simple to apply  Attenuation level is much less sensitive to control voltage  Substantial reduction in IMD
  • 49. Conclusion  Several new microwave control devices have been introduced:  Broadband rat-race with tunable power dividing ratio  CMOS implementation of variable power divider  Varactor-tuned variable attenuator with high linearity  They offer enhanced performance:  Wide tuning capability  Wide bandwidth
  • 50. Author’s Publication List  Journal Paper  K. K. M. Cheng, and M. C. J. Chik, “A frequency-compensated rat-race coupler with wide bandwidth and tunable power dividing ratio,” IEEE Trans. Microw. Theory & Techn., vol. 61, no. 8, pp. 2841-2847, Aug. 2013.  M. C. J. Chik, and K. K. M. Cheng, “Group delay investigation of rat-race coupler design with tunable power dividing ratio,” IEEE Microw. Compon. Lett., vol. 24, no. 5, pp 324-326., May 2014.  K. K. M. Cheng, and M. C. J. Chik, “A varactor-based variable attenuator design with enhanced linearity performance,” IEEE Trans. Microw. Theory & Techn. (Submitted)  M. C. J. Chik, and K. K. M. Cheng, "A varactor-based variable attenuator with extended bandwidth by frequency compensation" (In preparation)  Conference Paper  M. C. J. Chik, and K. K. M. Cheng, “A low-profile, compact, mode-decomposition based antenna array for use in beam-forming application,” 2012 Asia-Pacific Microw. Conf. Proc., Kaosiung, 2012, pp. 58-60, Dec. 2012.  M. C. J. Chik, W. Li, and K. K. M. Cheng, ‘A 5 GHz, integrated transformer based, variable power divider design in CMOS process’, in 2013 Asia-Pacific Microw. Conf. Proc., Seoul, 2013, pp. 366 – 368., Nov. 2013.  M. C. J. Chik, and K. K. M. Cheng, “A novel, varactor-based microwave attenuator with wide tuning ratio and flat insertion loss response,” presented in Proc. Int. Microw. Symp. 2014., Tampa Bay, USA., Jun. 2014.  L. P. Cai, M. C. J. Chik, and K. K. M. Cheng, “A compact, linearly-polarized antenna design with electronically steerable angle of orientation,” 2014 Asia-Pacific Mrcow. Conf. (Submitted)

Editor's Notes

  1. Good morning. Today, I would talk about my research in multi-functional and re-configurable microwave control devices.
  2. This is the content of today’s presentation. First, I will brief present the motivation in working this topic. My research is split into two parts, both are related to re-configurable devices. The first one is about tunable hybrids and coupler. I will give a literature review on this topic followed by two developed circuits, namely rat-race coupler with wide bandwidth and tunable power dividing ration and a CMOS variable power divider design using integrated transformer.
  3. In Part 2, the focus is on tunable attenuator. Some typical tunable attenuators design will be introduced, mainly to highlight their characteristics. Then a new varactor based attenuator is proposed. For attenuators in power application, the power handling performance remains a concern. Therefore the power performance of the proposed attenuator is investigated and linearization method is proposed accordingly to enhance the power handling capability. Some concluding remarks will be given at last.
  4. Wireless communication becomes more and more important in recent years. Wireless networks act as a supplement or even replacement of wired network. Many new applications employ wireless technology, such as wireless sensing, smart home, and so on. Due to the proliferation of smartphones and tablets, cellular systems have experienced tremendous growth over the last decade. The emerging 4G technology provides high-speed communication which allows users to transmit/receive large volume of data in a short period of time. Services like video on-demand become realizable. [2] However, these terminals cannot operate at optimal speed due to polarization loss, interference from nearby base stations, and multi-path fading effect. The ever-increasing speed and connectivity is accomplished by the development of sophisticated communication systems. In modern communication systems, to acquire enhanced performance, compact size or even cost reduction, most front-ends would provide re-configurability as a important feature. Typical applications which incorporated re-configurability are beam steering which involve tunable power dividing ratio and phase, polarization diversity in antenna which also consider flexible power distribution. Automatic gain control make use of variable attenuation to control the output power.
  5. When we talk about tunable hybrid and couplers, which property is variable? Obviously it is the power dividing ratio or coupling factor for couplers. And tuning can be discrete or continuous. Discrete tuning has limited applications therefore it is not under today’s scope of discussion. Continuous tuning in power dividing ratio or coupling factor are of greater interest. However, for continuous tuning, we usually encounter design issue such as complicated tuning mechanism and limited tuning range. In following slides, some typical design of tunable couplers will be briefly discussed.
  6. Here shows a conventional design which makes use of a branch-line coupler and varactor inserted into two branches. By varying the capacitance of varactors, the characteristic impedances of microstrip branches are modify, and the coupling ration is altered as a result. The coupling ratio varies about 2dB over 1GHz. However, not shown here, this design would possess poor return loss due to unmatched input impedance, which would limits its useable bandwidth.
  7. Another design attempted to realize microstrip line with variable characteristic impedance (30Ω to 100Ω) for the provision of tunable power dividing ratio. A defected ground structure is added underneath the transmission line. By varying the bias voltage of the varactor diodes, it is possible to change the effective inductance of the structure, and subsequently the characteristic impedance of the DGS line. Ultimately, the power dividing ratio can be varied. Practically, a tuning range of 8dB was achieved. However, proper terminations (R2 and R3) are needed for different power dividing ratios. Return loss performance may degrade if the terminations are fixed.
  8. Another design attempted to realize microstrip line with variable characteristic impedance (30Ω to 100Ω) for the provision of tunable power dividing ratio. A defected ground structure is added underneath the transmission line. By varying the bias voltage of the varactor diodes, it is possible to change the effective inductance of the structure, and subsequently the characteristic impedance of the DGS line. Ultimately, the power dividing ratio can be varied. Practically, a tuning range of 8dB was achieved. However, proper terminations (R2 and R3) are needed for different power dividing ratios. Return loss performance may degrade if the terminations are fixed.
  9. Rat-race couplers are being employed extensively in microwave systems, for example, balanced-mixers and feeding network for antenna array. Many researches has been made to enhance its performance. A recently proposed rat-race coupler demonstrates excellent performance at center frequency. It consists of two tuning diodes (variable capacitor) and two transmission line sections of 90° and 270°. It offers tunable power dividing ratio which depends on the capacitance of tuning diode CD instead of the characteristic impedance ratio between branch-lines. Therefore, the power dividing ratio is solely limited by the range of capacitance achieved. Also, ideal port isolation and return loss performance is observed at center frequency. Only a single control voltage is needed to tune the power ratio.
  10. Here shows the simulated performance of the reported rat-race. Ideal return loss and port isolation at center frequency is observed for all power dividing ratios. It demonstrates ideal phase difference characteristic for both input ports, that is 180deg and 0deg. However, the phase difference quickly deviates from ideal value which is not favourable. the power dividing ratio deviates from desired value over frequency. The practical fractional bandwidth based on +/-0.5dB is only about 10%.
  11. The tunable rat-race coupler is multi-functional. This slide shows some application examples and its corresponding connection. It can used as a variable power divider when one of input ports is terminated by reference impedance. When port 3 is terminated by Z0, the device would give anti-phase output; when port 1 is terminated by Z0, it would give in-phase output. When two ports are termination by Z0, it becomes a variable attenuator.
  12. It should be noted that the serial line in N1 and shunt stubs in N2 are having the same characteristic impedance ZA and electrical length . This will enable the odd-mode admittance of N1 to be equal to the even-mode admittance of N2 (i.e. Yo,1 = Ye,2).
  13. For illustration, simulated response of the network using ideal components are presented. Two values of k, 0 and 0.2 are chosen to demonstrated the effect of coupling within the differential inductor. The upper graph is the insertion loss and the bottom one is the return loss. The left column shows the response when there is zero coupling and the right one shows results when the coupling factor equals 0.2. We can see that the coupling would lead to variation in insertion losses especially in higher frequency band. Also, the return loss and isolation bandwidth becomes narrower although they still remained to an acceptable level. In short, the larger the coupling, the narrower the fractional bandwidth.
  14. The proposed device is prototyped at 5 GHz. The left diagram is the circuit layout and the right one is the micrograph of the fabricated chip. The die size including both bond pads and biasing circuitry is about 1.2mm x 0.8mm, which is compact. These two are the differential inductors employed. The tuning ratio of the varactor is about 2-3. The corresponding use for each bond pad is labeled. P1,2,3 correspond to Port1,2,3 and G stands for ground. Vbias is the control voltage and Vcc is for biasing the guard ring for better noise protection.
  15. These are the measurement results of the fabricated chip for K=0.5. There is about 1dB difference between simulated and measured insertion losses S21 and S41. The measured results follows the trend of simulated results. The phase deviation is about +/-5deg from 4.5GHz to 5GHz. More than 13dB Return loss and 20dB port isolation are achieved. However, the S21 is not as flat as expected. It is believed that the coupling within the transformers lead to this variation which is not favourable.
  16. At center frequency, the device exhibits power dividing ratio ranging from -6dB to 3dB with a control voltage of +/-0.5V. Referring to the upper graph, there exist small discrepancy between simulated and measured performance. It is observed from the bottom graph, the internal loss of the device is approximately 35% of incident power. This is mainly caused by the series resistance of the tuning diode and the conductor loss of the transformers.
  17. The discrepancies between e simulated and measured results were mainly attributed to the process variation and inaccurate device model used in simulation. Good performance is observed over 10% fractional bandwidth with 9dB tuning range, port isolation better than 25 dB, return loss betters than 13dB, and output phase deviation smaller than +/-5deg. Recalling the range of power dividing ratio K is determined by the capacitance of tuning diode. Standard CMOS diodes can only provide a small tuning capacitance ratio, smaller than 3 typically. As a result, this ratio limits the tuning capability of power dividing ratio of the device.
  18. Upon measurement, the fabricated device demonstrated 4dB to 30dB attenuation with a control voltage ranging from 0 to 8.2V.
  19. For comparison purposes, two sets (VC = 0.66V and 7.12V) of measured results were given. In both cases, excellent performances in insertion loss flatness and return loss were achieved (in the vicinity of 0.93 GHz). At a control voltage of 0.66V (7.12V), the variable attenuator was found to exhibit an insertion loss of 5 dB (20dB) and minimum return loss of 13 dB (18 dB), over a fractional bandwidth of about 20%.
  20. To conclude a novel varactor-based variable attenuator is introduced, featuring wide tuning capability in attenuation, simple structure, single control voltage as well as zero DC power consumption. However, there are also some issues that should be addressed. The bandwidth of attenuator gets narrower at the attenuation goes up. The attenuation variation is very sensitive to bias voltage at large attenuation. Slight change in voltage would lead to large change in attenuation which is not favourable.
  21. Based on s-parameter measurement, the attenuation level variation is extracted over 0 to 20V. It covers the attenuation range from about 5dB to 23dB. The discrepancy is mainly attributed to the phase unbalance of two signals, resulting incomplete cancellation.
  22. Being mostly employed in power applications, the IMD performance of the attenuator is worthwhile to be investigated. Conventional two-tone measurement is adopted for the characterization of IMD performance. This is the diagram of the setup. Two tones centered at 950MHz with 20MHz spacing are used. This two diagrams compare the fundamental and IMD output power. It can be observed that the third-order power becomes more significant as the attenuation level increases. In other words, the unwanted distortion is more severe if we use large attenuation. It is ironic that we usually need high attenuation for a high signal power. This characteristic may hinder the application of this attenuator. Further research will be focus on linearizing the IMD performance using circuit approach.