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RF Module Design - [Chapter 6] Power Amplifier


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Power Amplifier

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RF Module Design - [Chapter 6] Power Amplifier

  1. 1. RF Transceiver Module Design Chapter 6 Power Amplifier Department of Electronic Engineering National Taipei University of Technology
  2. 2. Outline • Power Capability and Efficiency • Matching Considerations • Classification of Amplifiers • Match to Desired Power • Practical Issues with Power Amplifiers Transistor saturation Current limits On-chip and off-chip power combing Thermal runaway Breakdown Package Nonlinearity • Summary Department of Electronic Engineering, NTUT2/42
  3. 3. Introduction • Power amplifiers (PAs) are used in the transmitter, typically to drive antennas and trade off efficiency and linearity. • ICs typically have a limited power supply voltage to avoid breakdown, as well as a metal migration limit for current. Thus, simply achieving the desired output power can be a challenge. • PAs dissipate power and generate heat, which has to be removed. Due to the small size of integrated circuits, this is a challenging exercise in design and packaging. • PAs are among the last circuits to be fully integrated. Department of Electronic Engineering, NTUT3/42
  4. 4. Power Capability • One of the main goals of PA design is to deliver a given power to a load. This is determined to a large degree by the load resistor and the power supply. • Given a particular power supply voltage VCC , such as 3-V, and a load resistance RL , such as 50 , it is possible to determine the maximum power to be This assumes we have a tuned amplifier and an operating point of 3-V, a peak negative swing down to 0 V, and a peak positive swing up to 6 V. 2 2 3 90 mW 19.5 dBm 2 2 50 CC ac V P R = = = ⇒ ⋅ Department of Electronic Engineering, NTUT4/42
  5. 5. DC-to-RF Efficiency • Efficiency (dc-to-RF efficiency): How effectively power from the supply is converted into output power • Assuming voltage and current are in phase, Pout is given by • Pdc is the power from the supply and is given by where Idc is the dc component of the current waveform. out dc P P η = 2 1 1 1 1 1 2 2 out LP i v i R= = 0 0 1 T T CC dc CC C C CC dc V P V i dt i dt V I T T = = =∫ ∫ Department of Electronic Engineering, NTUT5/42
  6. 6. Power-added Efficiency (PAE) • Power-added efficiency (PAE) takes the gain of the amplifier into account as follows: For a high gain amplifier, PAE is the same as dc-to-RF efficiency . 1 1 out outout in dc dc P PP P GPAE P P G η −−   = = = −    η < 10%, as G >10dB 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 2 4 6 8 10 12 14 16 18 20 Gain (dB) η 20 15 10 5 0 Pout(dBm) Pin (dBm) −5 0 5 10 15 80 60 40 20 0 Efficiency(%) 1 dB Pout PAEPAE decreases as gain compresses Department of Electronic Engineering, NTUT6/42
  7. 7. Matching Considerations • In order to obtain maximum output power, typically the power amplifier is “power-matched” but not conjugately matched. • Note that conjugate matching means that and as shown in the figure. s in ∗ Γ = Γ L out ∗ Γ = Γ Input matching Output matching Amplifier sΓ LΓ 0Z 0Z inΓ outΓ If conjugately matched, ands in ∗ Γ = Γ L out ∗ Γ = Γ Department of Electronic Engineering, NTUT7/42
  8. 8. Matching to versus Matching to …. • For low input power where the amplifier is linear, maximum output power is obtained with . However, this value of z will not be the optimum load for high input power where the amplifier is nonlinear. • For large-signal operation, tuning is done by determining the optimal load with doing the load pull. L out ∗ Γ = Γ optΓ out ∗ Γ optΓ Tuning at small signal Tuning for optimal large signal sA sB LB LAoutP inP Bx : 1 dB gain compression Ax : max. uncompressed power out ∗ Γ Department of Electronic Engineering, NTUT8/42
  9. 9. Optimum Load Impedance • An estimate of the optimum impedance Ropt can be made by adjusting the load so that the transistor current and voltage go through their maximum excursion. CCV CR oV CI CEV + − o CC C C CEV V I R V= − = minV dcV maxV CEV CI maxI minI max min max min opt V V R I I − = − Department of Electronic Engineering, NTUT9/42
  10. 10. Class A, B, and C Amplifiers (I) • PAs are grouped into classes depending on the nature of their voltage and current waveforms. • Class A amplifiers can be designed to have more gain than class B or class C amplifiers. However, the achievable output power is nearly the same for a class A, class AB, or class B amplifier. For a class C amplifier, where the transistor conducts for a short part of the period, the output power is reduced. CCV CL LR Ci Cv Bv Department of Electronic Engineering, NTUT10/42
  11. 11. Class A, B, and C Amplifiers (II) • The maximum collector voltage is approximately 0 V to 2VCC . While the vC is assumed to be sinusoidal (tuned circuit filtering), iC may be sinusoidal, as in class A operation, or may be nonsinusoidal, as in class B or C operation, which is determined mainly by how the transistor is biased. Bias voltage t t t Threshold Bv Cv 2 CCv CCv 0 Ci ,maxCi ,nomCi ,minCi Bias voltage ThresholdBv Cv 2 CCv CCv 0 Ci ,maxCi ,nomCi ,minCi t t t Bias voltage ThresholdBv Cv 2 CCv CCv 0 Ci ,maxCi ,nomCi ,minCi t t t Class A Class B Class C Department of Electronic Engineering, NTUT11/42
  12. 12. Classification by Conduction Angle • Conduction angle: The fraction of the full cycle for which current is flowing in the driver transistor. Class A (Cond 360 ): current is always flowing Class B (Cond 180 ): current flows for exactly half of the time Class AB (180 Cond 360 ) Class C (180 > Cond) • A higher conduction angle results in better linearity but lower efficiency. Class Conduction Angle (deg.) Theoretical Max. Efficiency (%) Normalized Output Power A 360 50 1 AB 360 ~ 180 50 ~ 78.5 ~ 1 (max 1.15@240o) B 180 78.5 1 C 180 ~ 0 78.5 ~ 100 1@180o, 0@0o Department of Electronic Engineering, NTUT12/42
  13. 13. Improve Efficiency • Power loss in the transistor must be minimized (current should be minimum while voltage is high, and vice versa). • For class B and C, the current is set to zero for part of the cycle where the voltage is high. There is still an overlap of nonzero voltage and current to cause some loss. • Classes D, E, F, and S, are designed such that the voltage across the transistor is also nonlinear, leading to higher efficiencies, in some cases up to 100%. • A different way to improve efficiency, while potentially maintaining linearity, is to power a linear amplifier from a variable or switched power supply. This is the basis for class G and H designs. Department of Electronic Engineering, NTUT13/42
  14. 14. Class A, B, and C Efficiency • Efficiency for this maximum possible voltage swing is ( ) ,max max 2 sin 2 4 sin cos out dc P P θ θ η θ θ θ − = = − maxη 1 0.9 0.8 0.7 0.6 0.5 θ A Cond. angle2 360θ = B Cond. angle 2 180θ = Efficiency = 78 % Efficiency = 50 %0 45 90 135 180 Department of Electronic Engineering, NTUT14/42
  15. 15. Class A, B, and C Output Power • At a conduction angle of 180 and 360 (or θ = 90 and 180 ), Po,norm,max is 1. In between is a peak with a value of about 1.15 at a conduction angle of about 240 . This might appear to be the optimum conduction angle for maximum output power, however, in real life, or in simulations with other models for the current, this peak does not occur. ,max,normoP Class A ( )0.5η = Class B ( )0.78η = 1.2 1.0 0.8 0.6 0.4 0 90 180 0.2 0 3601800 θ 2θConduction angle Class C Class AB( )1η = ,max ,max, , 1 2 sin 2 1 cos o o norm o norm P P P θ θ π θ − = = − Department of Electronic Engineering, NTUT15/42
  16. 16. Class D Amplifier • The two transistors alternately switch the output to ground or to VCC . The output filter (Lo and Co) is tuned to the fundamental frequency resulting in a sine wave at the output. While class D amplifiers can have high efficiency and have been demonstrated in the 10-MHz frequency range, they are not practical in the gigahertz range. oL oC CCV oL oC CCV Department of Electronic Engineering, NTUT16/42
  17. 17. Class E Amplifier (I) • The capacitor C is the combination of the parasitic transistor output capacitor Cp and an actual added capacitor CA . • A capacitor across the output of the transistor is possible to obtain close to 100% efficiency even with parasitics. oL oC CCV RFC RC oi ovcv dcI si ci 1Q 1. The choke is large (only Idc flows through it). 2. The output circuit (Lo,Co) Q is high enough (all harmonics are removed). 3. The transistor Q1 behaves as a perfect switch. When it is on, the collector voltage is zero, and when it is off the collector current is zero. 4. The transistor output capacitance Cp , and hence C, is independent of voltage. Assumptions: Department of Electronic Engineering, NTUT17/42
  18. 18. Class E Amplifier (II) • Switch on : vc is 0, and therefore ic through the capacitor C is 0. In this case, switch is = Idc − io. • Switch off : is = 0. ic = Idc − io . This produces an increase of collector voltage vc due to the charging of C. oL oC CCV RFC RC oi ovcv dcI si ci 1Q Open Closed y y ov cv si 32.8φ = − omV θ θ θ θ 0 π 2π Department of Electronic Engineering, NTUT18/42
  19. 19. Class E Amplifier (III) • For lossless components (as in the assumptions), the only loss is due to the discharge of C when the switch turns on. If the components are selected so that vc just reaches zero as the switch turns on, no energy is lost and the efficiency is 100%. • In practice, because the assumptions do not strictly hold and because components will not be ideal, the voltage will not be at zero and so energy will be lost. However, with careful design, efficiencies in the 80% range are feasible. Department of Electronic Engineering, NTUT19/42
  20. 20. Class F Amplifier (I) • Additional harmonic is added to the fundamental to produce a collector voltage more like a square wave. This means vc is lower while ic is flowing, but higher while ic is not flowing, to a higher efficiency. dcI oL oC RFC R cC oi ovcv ci 1Q 0f 03 f 3L 3C ( )cv θ ( )ci θ ( )ov θ π 2π 2 CCV CCV 0 dcIcmi omV π 2π θ θ θ Department of Electronic Engineering, NTUT20/42
  21. 21. Class F Amplifier (II) • Lo and Co make sure the output is a sinusoid. The third- harmonic resonator (L3, C3) causes a 3rd harmonic component in the collector voltage. At the correct amplitude and phase, this 3rd harmonic component produces a flattening of vc. This results in higher efficiency and higher output power. 1 sin3 9 θ θ 2ππ0 sinθ 1 sin sin3 9 θ θ+ dcI oL oC RFC R cC oi ovcv ci 1Q 0f 03 f 3L 3C 9 8 cm CCV V∴ = 8 9 cm CCV V= Department of Electronic Engineering, NTUT21/42
  22. 22. Class F Amplifier (III) • As an aside, the Fourier series for the ideal square wave is • However, choosing Vcm3 = 1/3Vom would produce a nonflat waveform. • The efficiency can be calculated as Po/Pdc: 1 1 sin sin3 sin5 3 5 θ θ θ+ + +⋯ ( ) 1 91 92 2 82 88.4 % 8 4 cm CCo om o cmdc dc CC CC i Vi V P iP I V V π π   ⋅⋅    = = = ⋅ = ⋅ Department of Electronic Engineering, NTUT22/42
  23. 23. Second-Harmonic Peaking • A second resonator allows the introduction of a 2nd harmonic voltage into the collector voltage waveform, producing an approximation of a half sinusoid. It can be shown that the amplitude of the 2nd harmonic voltage should be a quarter of the fundamental. It can be shown that the peak output voltage is given by and the efficiency is given by Sum 2nd harmonic Fundamental 4 3 om CCV V= 8 84.9 % 3 η π= ≃ Department of Electronic Engineering, NTUT23/42
  24. 24. Quarter-wave Transmission Line • At fo, the tuned circuit (Lo and Co) is open. The λ/4 transmission line is equivalent to having a resonator at all odd harmonics, with the result that the collector voltage is a square wave and 100% efficiency. dcI oL oC RFC R bC oi ov ci 1Q 4λ 0 ( )cv θ ( )ci θ ( )ov θ π 2π θ θ θ cmi omV π 2π 2 CCV Fund. + Odd harmonics Fund. + Even harmonics Fundamental Department of Electronic Engineering, NTUT24/42
  25. 25. A Class-F-driven Class-E PA • One useful application of a class F amplifier is as a driver for the class E amplifier. A class E amplifier is ideally driven by a square wave. cv oL oC RFC LR cC 0f ov cv 1Q 1Q CCV CCV C biasV 0L 0C 3L 3C03 f Class-EClass-F Department of Electronic Engineering, NTUT25/42
  26. 26. Class G Amplifiers • The class G amplifier has been used mainly for audio applications, although recently variations of this structure have been used up to 1 MHz for signals with high peak-to-average ratios (high crest factor), for example, in digital telephony applications. This topology uses amplifiers powered from different supplies. For low level signals, the lower supply is used and the other amplifier is disabled. 1CCV 1EEV 2EEV 2CCV R Driver Department of Electronic Engineering, NTUT26/42
  27. 27. Class H Amplifiers • Power supplies track the input signal or the desired output signal. Thus, power dissipated is low, since the driver transistors are operated with a low-voltage VCE. The efficiency can be much higher than class A. • The power supplies use a highly efficient switching amplifier. • This technique has mainly been used for lower frequencies. However, it can be modified so that the power supply follows the envelope of the signal rather than the signal itself. CCV′ outVinV 1Q 2Q CCV′ Linear amplifier Driver Department of Electronic Engineering, NTUT27/42
  28. 28. Class S Amplifier • The class S amplifier has as an input a pulse-width modulated (PWM) signal to turn Q1 and Q2 on or off as switches with a switching frequency much higher than the signal frequency. • Lo and Co form a lowpass filter that turns the PWM signal into an analog waveform. If only positive outputs are needed, only Q1 and D2 are required. For negative signals, only D1 and Q2 are necessary. 1Q 2Q 1D 2D 1C oL oC R • The switching frequency must be significantly higher than the signal frequency, this technique is not viable for amplification of signals in the gigahertz frequency range. Department of Electronic Engineering, NTUT28/42
  29. 29. Power Contour • The load pull technique is used to find the power contour. Input matching Output matching Amplifier sΓ LΓ 0Z 0Z inΓ outΓ outZinZ Max. output power ,max ,,o L optP Γ Max. operating power gain, L out ∗ Γ = Γ Gp circles Power circles Department of Electronic Engineering, NTUT29/42
  30. 30. Matching to Achieve Desired Power (I) • Given a particular power supply voltage and resistance value, the achievable amount of power is limited by Po » V 2 R. Obviously, R must be decreased to achieve higher Po . LR L C LR C L R R R 2 2o CCP V R≈ Department of Electronic Engineering, NTUT30/42
  31. 31. Matching to Achieve Desired Power (II) • It is possible to increase the bandwidth by using a higher order of matching network. R LR intR LRintRR Department of Electronic Engineering, NTUT31/42
  32. 32. Matching to Achieve Desired Power (III) • Sometimes higher Q is desired for narrowband applications. • Bond wire inductance can be used for realizing series inductance. R intR 1L 2L aC bC LR LR 2L bC intR aC1L R Department of Electronic Engineering, NTUT32/42
  33. 33. Transistor Saturation • Efficiency increases rapidly with increasing input signal until saturation of the input device occurs. After saturation, efficiency is fairly constant, but drops somewhat due to gain compression (PAE goes down). • Classes A, B, and C are usually operated just into saturation to maximize efficiency. Class E (and sometimes F) is operated as a switch, between saturation and cutoff. Department of Electronic Engineering, NTUT33/42
  34. 34. Current Limits • The PA requires huge transistors with very high current handling capability with multiple emitter, base, and collector stripes (multiple fingers), as well as multiple transistors distributed to reduce current density and heat concentration. • Each finger and each transistor is treated the same as every other finger and transistor. This is important in order to avoid local hot spots, thermal runaway, and mismatch of phase shifts. • Metal lines have to be made wide to avoid problems with metal migration. To increase current capability, it is possible to use multiple metal layers Department of Electronic Engineering, NTUT34/42
  35. 35. On-Chip Power Combining • Combine multiple transistors at the output to distribute the heat and limit the current density in each transistor. • The base drive can be phase delayed compared to the shortest path, so it is important to keep the line lengths equal. • With RF or microwave circuits, sharp bends are to be avoided. • Phase shift can be determined by considering that the wavelength of a 1-GHz sine wave in free space is 30 cm (1.2 /mm). For SiO2 with εr of about 4, the phase shift is about 12 /mm at 5 GHz. Thus, for a distance of 5 mm, we have the phase shift is about 60 . • Use multiple output pads for parallel bond wires, or a long pad, to connect more bond wires if desired. First stage Output drivers Output pads Base Collectors Department of Electronic Engineering, NTUT35/42
  36. 36. Off-Chip Power Combining (I) • Power combining can also be done off-chip, using techniques including backward wave couplers (stripline overlay, microstrip Lange) for octave bandwidth, or the branch-line, coupled amplifier. 4λ Stripline coupler Branch-line coupler Coupled amplifiers 0Z 0Z 0 2Z 4λ 0 2Z 4λ 02Z 4λ Department of Electronic Engineering, NTUT36/42
  37. 37. Off-Chip Power Combining (II) • The ‘‘rat race’’ produces two outputs 180 out of phase (or can combine two inputs that are 180 out of phase). • The push-pull arrangement is the same as for a class B push- pull amplifier. 270 90 180 Rat-race combiner 0 180 0 180 Ai Bi A Bi i− Combiner for push-pull operation Department of Electronic Engineering, NTUT37/42
  38. 38. Thermal Runaway – Ballasting • Under high power, the temperature will increase. With constant base-emitter voltage, current increases with temperature. Thus, if VBE is held constant, if temperature increases, current increases, and as a result, more power is dissipated and temperature will increase even more. This phenomenon is known as thermal runaway. Typically, ballast resistors are added in the emitters as a feedback to prevent such thermal runaway. inV BEV ER RV Department of Electronic Engineering, NTUT38/42
  39. 39. Breakdown Voltage • A measure of breakdown is VCEO,max, which is the maximum allowable value of VCE with the base open circuited to cause avalanche breakdown . A typical value in a 3-V process might be 5 V. In processes where this is not possible, it may be necessary to drop the supply voltage, use cascode devices, and possibly to make use of more complex biasing, which is adaptive or at least variable. ,max 9 8 cm CC CEOV V V= ≤ Linear amplifier: ,max2cm CC CEOV V V= ≤ Class E amplifier: Class F amplifier: ,max3.56cm CC CEOV V V= ⋅ ≤ 2.5 VCCV ≤ • For VCEO,max = 5 V : 1.4 VCCV ≤ 4.44 VCCV ≤ Department of Electronic Engineering, NTUT39/42
  40. 40. Packaging • How does one remove heat from a power amplifier? One possible mechanism is thermal conduction through direct contact, for example, when the die is mounted directly on a metal backing. Another mechanism is through metal connections to the bond pads, for example, with wires to the package or directly to the printed circuit board. In flip-chip implementation, thermal conduction is through the solder bumps to the printed circuit board. Department of Electronic Engineering, NTUT40/42
  41. 41. Effects and Implications of Nonlinearity • Linearity of the PA is important with certain modulation schemes. For example, quite linear power amplifiers are required to avoid spectral regrowth for filtered BPSK, QPSK, OQPSK, and QAM signal. • FM, FSK, and MSK modulation are typically constant envelope and so allow the use of nonlinear high-efficiency power amplifiers. ff outP outP Spectrum regrowth Department of Electronic Engineering, NTUT41/42
  42. 42. Summary • In this chapter, the various kinds of power amplifiers were introduced, including the Class A, AB, B, and C linear amplifiers as well as Class D, E, and F nonlinear amplifiers. • The linear amplifiers have good linearity but poor efficiency, on the contrary, the nonlinear amplifiers have very good efficiency but poor linearity. • For power amplifiers, the matching usually has to be power matched than conjugately matched. • Since the transistor in high power operation is usually with high current and voltage, there are many practical considerations should be taken into account, such as current limits, breakdown, and heat problems. Department of Electronic Engineering, NTUT42/42