Submit Search
Upload
A Review of Low Power Novel Gate Design
•
0 likes
•
36 views
IRJET Journal
Follow
https://www.irjet.net/archives/V4/i8/IRJET-V4I8291.pdf
Read less
Read more
Engineering
Report
Share
Report
Share
1 of 4
Download now
Download to read offline
Recommended
Dx34756759
Dx34756759
IJERA Editor
Area–delay–power efficient carry select adder
Area–delay–power efficient carry select adder
LogicMindtech Nologies
A low complexity turbo decoder architecture for energy-efficient wireless sen...
A low complexity turbo decoder architecture for energy-efficient wireless sen...
Ecway Technologies
Area Delay Power Efficient and Implementation of Modified Square-Root Carry S...
Area Delay Power Efficient and Implementation of Modified Square-Root Carry S...
IJTET Journal
Design and development of carry select adder
Design and development of carry select adder
ABIN THOMAS
power optimization on load
power optimization on load
dinesh reddy
Review on optimized area,delay and power efficient carry select adder using n...
Review on optimized area,delay and power efficient carry select adder using n...
IRJET Journal
Final ppt
Final ppt
Bhamidipati Gayatri
Recommended
Dx34756759
Dx34756759
IJERA Editor
Area–delay–power efficient carry select adder
Area–delay–power efficient carry select adder
LogicMindtech Nologies
A low complexity turbo decoder architecture for energy-efficient wireless sen...
A low complexity turbo decoder architecture for energy-efficient wireless sen...
Ecway Technologies
Area Delay Power Efficient and Implementation of Modified Square-Root Carry S...
Area Delay Power Efficient and Implementation of Modified Square-Root Carry S...
IJTET Journal
Design and development of carry select adder
Design and development of carry select adder
ABIN THOMAS
power optimization on load
power optimization on load
dinesh reddy
Review on optimized area,delay and power efficient carry select adder using n...
Review on optimized area,delay and power efficient carry select adder using n...
IRJET Journal
Final ppt
Final ppt
Bhamidipati Gayatri
Hybrid Adder
Hybrid Adder
Guru Prasanth
Project report on design & implementation of high speed carry select adder
Project report on design & implementation of high speed carry select adder
ssingh7603
Ie3614221424
Ie3614221424
IJERA Editor
Ming's CV
Ming's CV
Ming Sun
Implementation of Area Effective Carry Select Adders
Implementation of Area Effective Carry Select Adders
Kumar Goud
IRJET- Implementation and Analysis of Hybridization in Modified Parallel Adde...
IRJET- Implementation and Analysis of Hybridization in Modified Parallel Adde...
IRJET Journal
Victor ppt
Victor ppt
EAI
IRJET - Realization of Power Optimised Carry Skip Adder using AOI Logic
IRJET - Realization of Power Optimised Carry Skip Adder using AOI Logic
IRJET Journal
Project list 2020
Project list 2020
Asoka Technologies
Model predictive-based shunt active power filter with a new reference current...
Model predictive-based shunt active power filter with a new reference current...
Asoka Technologies
Design and simulation of single phase five-level symmetrical cascaded h-bridg...
Design and simulation of single phase five-level symmetrical cascaded h-bridg...
Asoka Technologies
Efficient Design of Ripple Carry Adder and Carry Skip Adder with Low Quantum ...
Efficient Design of Ripple Carry Adder and Carry Skip Adder with Low Quantum ...
IJERA Editor
2014 PV Performance Modeling Workshop: AE's Perspective on PV Inverter Modeli...
2014 PV Performance Modeling Workshop: AE's Perspective on PV Inverter Modeli...
Sandia National Laboratories: Energy & Climate: Renewables
Artificial Neural Network based Dynamic Voltage Restorer for Improvement of P...
Artificial Neural Network based Dynamic Voltage Restorer for Improvement of P...
Asoka Technologies
Metal-Semiconductor Contact
Metal-Semiconductor Contact
RCC Institute of Information Technology
Efficient Numerical Analysis of Electrical Machines - ICEM 2016 Student Forum
Efficient Numerical Analysis of Electrical Machines - ICEM 2016 Student Forum
Antti Lehikoinen
An Extensive Literature Review on Reversible Arithmetic and Logical Unit
An Extensive Literature Review on Reversible Arithmetic and Logical Unit
IRJET Journal
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
IRJET Journal
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...
IRJET Journal
IRJET- FPGA Implementation of Efficient Muf Gate based Multipliers
IRJET- FPGA Implementation of Efficient Muf Gate based Multipliers
IRJET Journal
IRJET- A Novel Design of Hybrid 2 Bit Magnitude Comparator
IRJET- A Novel Design of Hybrid 2 Bit Magnitude Comparator
IRJET Journal
IRJET - Low Power Design for Fast Full Adder
IRJET - Low Power Design for Fast Full Adder
IRJET Journal
More Related Content
What's hot
Hybrid Adder
Hybrid Adder
Guru Prasanth
Project report on design & implementation of high speed carry select adder
Project report on design & implementation of high speed carry select adder
ssingh7603
Ie3614221424
Ie3614221424
IJERA Editor
Ming's CV
Ming's CV
Ming Sun
Implementation of Area Effective Carry Select Adders
Implementation of Area Effective Carry Select Adders
Kumar Goud
IRJET- Implementation and Analysis of Hybridization in Modified Parallel Adde...
IRJET- Implementation and Analysis of Hybridization in Modified Parallel Adde...
IRJET Journal
Victor ppt
Victor ppt
EAI
IRJET - Realization of Power Optimised Carry Skip Adder using AOI Logic
IRJET - Realization of Power Optimised Carry Skip Adder using AOI Logic
IRJET Journal
Project list 2020
Project list 2020
Asoka Technologies
Model predictive-based shunt active power filter with a new reference current...
Model predictive-based shunt active power filter with a new reference current...
Asoka Technologies
Design and simulation of single phase five-level symmetrical cascaded h-bridg...
Design and simulation of single phase five-level symmetrical cascaded h-bridg...
Asoka Technologies
Efficient Design of Ripple Carry Adder and Carry Skip Adder with Low Quantum ...
Efficient Design of Ripple Carry Adder and Carry Skip Adder with Low Quantum ...
IJERA Editor
2014 PV Performance Modeling Workshop: AE's Perspective on PV Inverter Modeli...
2014 PV Performance Modeling Workshop: AE's Perspective on PV Inverter Modeli...
Sandia National Laboratories: Energy & Climate: Renewables
Artificial Neural Network based Dynamic Voltage Restorer for Improvement of P...
Artificial Neural Network based Dynamic Voltage Restorer for Improvement of P...
Asoka Technologies
Metal-Semiconductor Contact
Metal-Semiconductor Contact
RCC Institute of Information Technology
Efficient Numerical Analysis of Electrical Machines - ICEM 2016 Student Forum
Efficient Numerical Analysis of Electrical Machines - ICEM 2016 Student Forum
Antti Lehikoinen
What's hot
(16)
Hybrid Adder
Hybrid Adder
Project report on design & implementation of high speed carry select adder
Project report on design & implementation of high speed carry select adder
Ie3614221424
Ie3614221424
Ming's CV
Ming's CV
Implementation of Area Effective Carry Select Adders
Implementation of Area Effective Carry Select Adders
IRJET- Implementation and Analysis of Hybridization in Modified Parallel Adde...
IRJET- Implementation and Analysis of Hybridization in Modified Parallel Adde...
Victor ppt
Victor ppt
IRJET - Realization of Power Optimised Carry Skip Adder using AOI Logic
IRJET - Realization of Power Optimised Carry Skip Adder using AOI Logic
Project list 2020
Project list 2020
Model predictive-based shunt active power filter with a new reference current...
Model predictive-based shunt active power filter with a new reference current...
Design and simulation of single phase five-level symmetrical cascaded h-bridg...
Design and simulation of single phase five-level symmetrical cascaded h-bridg...
Efficient Design of Ripple Carry Adder and Carry Skip Adder with Low Quantum ...
Efficient Design of Ripple Carry Adder and Carry Skip Adder with Low Quantum ...
2014 PV Performance Modeling Workshop: AE's Perspective on PV Inverter Modeli...
2014 PV Performance Modeling Workshop: AE's Perspective on PV Inverter Modeli...
Artificial Neural Network based Dynamic Voltage Restorer for Improvement of P...
Artificial Neural Network based Dynamic Voltage Restorer for Improvement of P...
Metal-Semiconductor Contact
Metal-Semiconductor Contact
Efficient Numerical Analysis of Electrical Machines - ICEM 2016 Student Forum
Efficient Numerical Analysis of Electrical Machines - ICEM 2016 Student Forum
Similar to A Review of Low Power Novel Gate Design
An Extensive Literature Review on Reversible Arithmetic and Logical Unit
An Extensive Literature Review on Reversible Arithmetic and Logical Unit
IRJET Journal
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
IRJET Journal
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...
IRJET Journal
IRJET- FPGA Implementation of Efficient Muf Gate based Multipliers
IRJET- FPGA Implementation of Efficient Muf Gate based Multipliers
IRJET Journal
IRJET- A Novel Design of Hybrid 2 Bit Magnitude Comparator
IRJET- A Novel Design of Hybrid 2 Bit Magnitude Comparator
IRJET Journal
IRJET - Low Power Design for Fast Full Adder
IRJET - Low Power Design for Fast Full Adder
IRJET Journal
IRJET- Fin FET Two Bit Comparator for Low Voltage, Low Power, High Speed and ...
IRJET- Fin FET Two Bit Comparator for Low Voltage, Low Power, High Speed and ...
IRJET Journal
An Area Efficient and High Speed Reversible Multiplier Using NS Gate
An Area Efficient and High Speed Reversible Multiplier Using NS Gate
IJERA Editor
International Journal of Engineering and Science Invention (IJESI)
International Journal of Engineering and Science Invention (IJESI)
inventionjournals
IRJET- Design and Implementation of Combinational Circuits using Reversible G...
IRJET- Design and Implementation of Combinational Circuits using Reversible G...
IRJET Journal
IRJET- Design and Implementation of Combinational Circuits using Reversib...
IRJET- Design and Implementation of Combinational Circuits using Reversib...
IRJET Journal
IRJET- Reduction of Power, Leakage and Area of a Standard Cell Asics using Th...
IRJET- Reduction of Power, Leakage and Area of a Standard Cell Asics using Th...
IRJET Journal
IRJET- Design and Implementation of High Speed, Low Power Charge Shared R...
IRJET- Design and Implementation of High Speed, Low Power Charge Shared R...
IRJET Journal
Design & Simulation of Half Adder Circuit using AVL Technique Based on CMOS T...
Design & Simulation of Half Adder Circuit using AVL Technique Based on CMOS T...
IRJET Journal
Review On 2:4 Decoder By Reversible Logic Gates For Low Power Consumption
Review On 2:4 Decoder By Reversible Logic Gates For Low Power Consumption
IRJET Journal
Design and Performance Analysis of 8 x 8 Network on Chip Router
Design and Performance Analysis of 8 x 8 Network on Chip Router
IRJET Journal
IRJET- Energy Efficient One Bit Subtractor Circuits for Computing Application...
IRJET- Energy Efficient One Bit Subtractor Circuits for Computing Application...
IRJET Journal
IRJET-Power Efficient Implementation of Asynchronous Counter using Intelligen...
IRJET-Power Efficient Implementation of Asynchronous Counter using Intelligen...
IRJET Journal
IRJET- Design of 1 Bit ALU using Various Full Adder Circuits
IRJET- Design of 1 Bit ALU using Various Full Adder Circuits
IRJET Journal
IRJET- A Implementation of High Speed On-Chip Monitoring Circuit by using SAR...
IRJET- A Implementation of High Speed On-Chip Monitoring Circuit by using SAR...
IRJET Journal
Similar to A Review of Low Power Novel Gate Design
(20)
An Extensive Literature Review on Reversible Arithmetic and Logical Unit
An Extensive Literature Review on Reversible Arithmetic and Logical Unit
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
Low Power Area Efficient Arithmetic and Logical Control Unit Using Reversible...
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...
IRJET- FPGA Implementation of Efficient Muf Gate based Multipliers
IRJET- FPGA Implementation of Efficient Muf Gate based Multipliers
IRJET- A Novel Design of Hybrid 2 Bit Magnitude Comparator
IRJET- A Novel Design of Hybrid 2 Bit Magnitude Comparator
IRJET - Low Power Design for Fast Full Adder
IRJET - Low Power Design for Fast Full Adder
IRJET- Fin FET Two Bit Comparator for Low Voltage, Low Power, High Speed and ...
IRJET- Fin FET Two Bit Comparator for Low Voltage, Low Power, High Speed and ...
An Area Efficient and High Speed Reversible Multiplier Using NS Gate
An Area Efficient and High Speed Reversible Multiplier Using NS Gate
International Journal of Engineering and Science Invention (IJESI)
International Journal of Engineering and Science Invention (IJESI)
IRJET- Design and Implementation of Combinational Circuits using Reversible G...
IRJET- Design and Implementation of Combinational Circuits using Reversible G...
IRJET- Design and Implementation of Combinational Circuits using Reversib...
IRJET- Design and Implementation of Combinational Circuits using Reversib...
IRJET- Reduction of Power, Leakage and Area of a Standard Cell Asics using Th...
IRJET- Reduction of Power, Leakage and Area of a Standard Cell Asics using Th...
IRJET- Design and Implementation of High Speed, Low Power Charge Shared R...
IRJET- Design and Implementation of High Speed, Low Power Charge Shared R...
Design & Simulation of Half Adder Circuit using AVL Technique Based on CMOS T...
Design & Simulation of Half Adder Circuit using AVL Technique Based on CMOS T...
Review On 2:4 Decoder By Reversible Logic Gates For Low Power Consumption
Review On 2:4 Decoder By Reversible Logic Gates For Low Power Consumption
Design and Performance Analysis of 8 x 8 Network on Chip Router
Design and Performance Analysis of 8 x 8 Network on Chip Router
IRJET- Energy Efficient One Bit Subtractor Circuits for Computing Application...
IRJET- Energy Efficient One Bit Subtractor Circuits for Computing Application...
IRJET-Power Efficient Implementation of Asynchronous Counter using Intelligen...
IRJET-Power Efficient Implementation of Asynchronous Counter using Intelligen...
IRJET- Design of 1 Bit ALU using Various Full Adder Circuits
IRJET- Design of 1 Bit ALU using Various Full Adder Circuits
IRJET- A Implementation of High Speed On-Chip Monitoring Circuit by using SAR...
IRJET- A Implementation of High Speed On-Chip Monitoring Circuit by using SAR...
More from IRJET Journal
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...
IRJET Journal
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTURE
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTURE
IRJET Journal
A COMPARATIVE ANALYSIS OF RCC ELEMENT OF SLAB WITH STARK STEEL (HYSD STEEL) A...
A COMPARATIVE ANALYSIS OF RCC ELEMENT OF SLAB WITH STARK STEEL (HYSD STEEL) A...
IRJET Journal
Effect of Camber and Angles of Attack on Airfoil Characteristics
Effect of Camber and Angles of Attack on Airfoil Characteristics
IRJET Journal
A Review on the Progress and Challenges of Aluminum-Based Metal Matrix Compos...
A Review on the Progress and Challenges of Aluminum-Based Metal Matrix Compos...
IRJET Journal
Dynamic Urban Transit Optimization: A Graph Neural Network Approach for Real-...
Dynamic Urban Transit Optimization: A Graph Neural Network Approach for Real-...
IRJET Journal
Structural Analysis and Design of Multi-Storey Symmetric and Asymmetric Shape...
Structural Analysis and Design of Multi-Storey Symmetric and Asymmetric Shape...
IRJET Journal
A Review of “Seismic Response of RC Structures Having Plan and Vertical Irreg...
A Review of “Seismic Response of RC Structures Having Plan and Vertical Irreg...
IRJET Journal
A REVIEW ON MACHINE LEARNING IN ADAS
A REVIEW ON MACHINE LEARNING IN ADAS
IRJET Journal
Long Term Trend Analysis of Precipitation and Temperature for Asosa district,...
Long Term Trend Analysis of Precipitation and Temperature for Asosa district,...
IRJET Journal
P.E.B. Framed Structure Design and Analysis Using STAAD Pro
P.E.B. Framed Structure Design and Analysis Using STAAD Pro
IRJET Journal
A Review on Innovative Fiber Integration for Enhanced Reinforcement of Concre...
A Review on Innovative Fiber Integration for Enhanced Reinforcement of Concre...
IRJET Journal
Survey Paper on Cloud-Based Secured Healthcare System
Survey Paper on Cloud-Based Secured Healthcare System
IRJET Journal
Review on studies and research on widening of existing concrete bridges
Review on studies and research on widening of existing concrete bridges
IRJET Journal
React based fullstack edtech web application
React based fullstack edtech web application
IRJET Journal
A Comprehensive Review of Integrating IoT and Blockchain Technologies in the ...
A Comprehensive Review of Integrating IoT and Blockchain Technologies in the ...
IRJET Journal
A REVIEW ON THE PERFORMANCE OF COCONUT FIBRE REINFORCED CONCRETE.
A REVIEW ON THE PERFORMANCE OF COCONUT FIBRE REINFORCED CONCRETE.
IRJET Journal
Optimizing Business Management Process Workflows: The Dynamic Influence of Mi...
Optimizing Business Management Process Workflows: The Dynamic Influence of Mi...
IRJET Journal
Multistoried and Multi Bay Steel Building Frame by using Seismic Design
Multistoried and Multi Bay Steel Building Frame by using Seismic Design
IRJET Journal
Cost Optimization of Construction Using Plastic Waste as a Sustainable Constr...
Cost Optimization of Construction Using Plastic Waste as a Sustainable Constr...
IRJET Journal
More from IRJET Journal
(20)
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...
TUNNELING IN HIMALAYAS WITH NATM METHOD: A SPECIAL REFERENCES TO SUNGAL TUNNE...
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTURE
STUDY THE EFFECT OF RESPONSE REDUCTION FACTOR ON RC FRAMED STRUCTURE
A COMPARATIVE ANALYSIS OF RCC ELEMENT OF SLAB WITH STARK STEEL (HYSD STEEL) A...
A COMPARATIVE ANALYSIS OF RCC ELEMENT OF SLAB WITH STARK STEEL (HYSD STEEL) A...
Effect of Camber and Angles of Attack on Airfoil Characteristics
Effect of Camber and Angles of Attack on Airfoil Characteristics
A Review on the Progress and Challenges of Aluminum-Based Metal Matrix Compos...
A Review on the Progress and Challenges of Aluminum-Based Metal Matrix Compos...
Dynamic Urban Transit Optimization: A Graph Neural Network Approach for Real-...
Dynamic Urban Transit Optimization: A Graph Neural Network Approach for Real-...
Structural Analysis and Design of Multi-Storey Symmetric and Asymmetric Shape...
Structural Analysis and Design of Multi-Storey Symmetric and Asymmetric Shape...
A Review of “Seismic Response of RC Structures Having Plan and Vertical Irreg...
A Review of “Seismic Response of RC Structures Having Plan and Vertical Irreg...
A REVIEW ON MACHINE LEARNING IN ADAS
A REVIEW ON MACHINE LEARNING IN ADAS
Long Term Trend Analysis of Precipitation and Temperature for Asosa district,...
Long Term Trend Analysis of Precipitation and Temperature for Asosa district,...
P.E.B. Framed Structure Design and Analysis Using STAAD Pro
P.E.B. Framed Structure Design and Analysis Using STAAD Pro
A Review on Innovative Fiber Integration for Enhanced Reinforcement of Concre...
A Review on Innovative Fiber Integration for Enhanced Reinforcement of Concre...
Survey Paper on Cloud-Based Secured Healthcare System
Survey Paper on Cloud-Based Secured Healthcare System
Review on studies and research on widening of existing concrete bridges
Review on studies and research on widening of existing concrete bridges
React based fullstack edtech web application
React based fullstack edtech web application
A Comprehensive Review of Integrating IoT and Blockchain Technologies in the ...
A Comprehensive Review of Integrating IoT and Blockchain Technologies in the ...
A REVIEW ON THE PERFORMANCE OF COCONUT FIBRE REINFORCED CONCRETE.
A REVIEW ON THE PERFORMANCE OF COCONUT FIBRE REINFORCED CONCRETE.
Optimizing Business Management Process Workflows: The Dynamic Influence of Mi...
Optimizing Business Management Process Workflows: The Dynamic Influence of Mi...
Multistoried and Multi Bay Steel Building Frame by using Seismic Design
Multistoried and Multi Bay Steel Building Frame by using Seismic Design
Cost Optimization of Construction Using Plastic Waste as a Sustainable Constr...
Cost Optimization of Construction Using Plastic Waste as a Sustainable Constr...
Recently uploaded
"Lesotho Leaps Forward: A Chronicle of Transformative Developments"
"Lesotho Leaps Forward: A Chronicle of Transformative Developments"
mphochane1998
HAND TOOLS USED AT ELECTRONICS WORK PRESENTED BY KOUSTAV SARKAR
HAND TOOLS USED AT ELECTRONICS WORK PRESENTED BY KOUSTAV SARKAR
KOUSTAV SARKAR
S1S2 B.Arch MGU - HOA1&2 Module 3 -Temple Architecture of Kerala.pptx
S1S2 B.Arch MGU - HOA1&2 Module 3 -Temple Architecture of Kerala.pptx
SCMS School of Architecture
Integrated Test Rig For HTFE-25 - Neometrix
Integrated Test Rig For HTFE-25 - Neometrix
Neometrix_Engineering_Pvt_Ltd
Introduction to Data Visualization,Matplotlib.pdf
Introduction to Data Visualization,Matplotlib.pdf
sumitt6_25730773
Tamil Call Girls Bhayandar WhatsApp +91-9930687706, Best Service
Tamil Call Girls Bhayandar WhatsApp +91-9930687706, Best Service
meghakumariji156
💚Trustworthy Call Girls Pune Call Girls Service Just Call 🍑👄6378878445 🍑👄 Top...
💚Trustworthy Call Girls Pune Call Girls Service Just Call 🍑👄6378878445 🍑👄 Top...
vershagrag
Call Girls in South Ex (delhi) call me [🔝9953056974🔝] escort service 24X7
Call Girls in South Ex (delhi) call me [🔝9953056974🔝] escort service 24X7
9953056974 Low Rate Call Girls In Saket, Delhi NCR
Moment Distribution Method For Btech Civil
Moment Distribution Method For Btech Civil
VinayVitekari
Theory of Time 2024 (Universal Theory for Everything)
Theory of Time 2024 (Universal Theory for Everything)
Ramkumar k
School management system project Report.pdf
School management system project Report.pdf
Kamal Acharya
NO1 Top No1 Amil Baba In Azad Kashmir, Kashmir Black Magic Specialist Expert ...
NO1 Top No1 Amil Baba In Azad Kashmir, Kashmir Black Magic Specialist Expert ...
Amil baba
DC MACHINE-Motoring and generation, Armature circuit equation
DC MACHINE-Motoring and generation, Armature circuit equation
BhangaleSonal
AIRCANVAS[1].pdf mini project for btech students
AIRCANVAS[1].pdf mini project for btech students
vanyagupta248
Cara Menggugurkan Sperma Yang Masuk Rahim Biyar Tidak Hamil
Cara Menggugurkan Sperma Yang Masuk Rahim Biyar Tidak Hamil
Cara Menggugurkan Kandungan 087776558899
Double Revolving field theory-how the rotor develops torque
Double Revolving field theory-how the rotor develops torque
BhangaleSonal
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
Arindam Chakraborty, Ph.D., P.E. (CA, TX)
Bhubaneswar🌹Call Girls Bhubaneswar ❤Komal 9777949614 💟 Full Trusted CALL GIRL...
Bhubaneswar🌹Call Girls Bhubaneswar ❤Komal 9777949614 💟 Full Trusted CALL GIRL...
Call Girls Mumbai
Generative AI or GenAI technology based PPT
Generative AI or GenAI technology based PPT
bhaskargani46
Digital Communication Essentials: DPCM, DM, and ADM .pptx
Digital Communication Essentials: DPCM, DM, and ADM .pptx
pritamlangde
Recently uploaded
(20)
"Lesotho Leaps Forward: A Chronicle of Transformative Developments"
"Lesotho Leaps Forward: A Chronicle of Transformative Developments"
HAND TOOLS USED AT ELECTRONICS WORK PRESENTED BY KOUSTAV SARKAR
HAND TOOLS USED AT ELECTRONICS WORK PRESENTED BY KOUSTAV SARKAR
S1S2 B.Arch MGU - HOA1&2 Module 3 -Temple Architecture of Kerala.pptx
S1S2 B.Arch MGU - HOA1&2 Module 3 -Temple Architecture of Kerala.pptx
Integrated Test Rig For HTFE-25 - Neometrix
Integrated Test Rig For HTFE-25 - Neometrix
Introduction to Data Visualization,Matplotlib.pdf
Introduction to Data Visualization,Matplotlib.pdf
Tamil Call Girls Bhayandar WhatsApp +91-9930687706, Best Service
Tamil Call Girls Bhayandar WhatsApp +91-9930687706, Best Service
💚Trustworthy Call Girls Pune Call Girls Service Just Call 🍑👄6378878445 🍑👄 Top...
💚Trustworthy Call Girls Pune Call Girls Service Just Call 🍑👄6378878445 🍑👄 Top...
Call Girls in South Ex (delhi) call me [🔝9953056974🔝] escort service 24X7
Call Girls in South Ex (delhi) call me [🔝9953056974🔝] escort service 24X7
Moment Distribution Method For Btech Civil
Moment Distribution Method For Btech Civil
Theory of Time 2024 (Universal Theory for Everything)
Theory of Time 2024 (Universal Theory for Everything)
School management system project Report.pdf
School management system project Report.pdf
NO1 Top No1 Amil Baba In Azad Kashmir, Kashmir Black Magic Specialist Expert ...
NO1 Top No1 Amil Baba In Azad Kashmir, Kashmir Black Magic Specialist Expert ...
DC MACHINE-Motoring and generation, Armature circuit equation
DC MACHINE-Motoring and generation, Armature circuit equation
AIRCANVAS[1].pdf mini project for btech students
AIRCANVAS[1].pdf mini project for btech students
Cara Menggugurkan Sperma Yang Masuk Rahim Biyar Tidak Hamil
Cara Menggugurkan Sperma Yang Masuk Rahim Biyar Tidak Hamil
Double Revolving field theory-how the rotor develops torque
Double Revolving field theory-how the rotor develops torque
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
Bhubaneswar🌹Call Girls Bhubaneswar ❤Komal 9777949614 💟 Full Trusted CALL GIRL...
Bhubaneswar🌹Call Girls Bhubaneswar ❤Komal 9777949614 💟 Full Trusted CALL GIRL...
Generative AI or GenAI technology based PPT
Generative AI or GenAI technology based PPT
Digital Communication Essentials: DPCM, DM, and ADM .pptx
Digital Communication Essentials: DPCM, DM, and ADM .pptx
A Review of Low Power Novel Gate Design
1.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 04 Issue: 08 | Aug -2017 www.irjet.net p-ISSN: 2395-0072 © 2017, IRJET | Impact Factor value: 5.181 | ISO 9001:2008 Certified Journal | Page 1626 A REVIEW OF LOW POWER NOVEL GATE DESIGN Abirami.G1 , Banumathi.T2 1,2 Assistant Professor, Prince Shri Venkateashwara Padmavathy Engineering College,Chennai. ----------------------------------------------------------------------------***-------------------------------------------------------------------------- ABSTRACT: Reversible logic gate design is the novel gate for low power. Reversible logic is one of the promising technologies for low power in VLSI design. It is the technique to recover the output from the input itself. Number of input in the gate is equal to the number of outputs. The function of the logic gates purely depends on quantum cost function. Garbage output of the gates is ignored. Varieties of logic gates are available in the VLSI design. In this paper briefly discuss the different reversible logic gate functions. And also explains compare different adders with different gates. Keywords: Quantum cost, Garbage output, Low power 1. INTRODUCTION ADP parameter is one of the main concerns in VLSI design. Because it decides the circuit is best or not. Power consumption is one of the major issues in any type of VLSI circuit. Because every interconnection the power will dissipate and finally major loss the power in the output side. Because most of the digital logic circuits are easy and complex in nature. The novel reversible logic design allows the subsystem logic circuit with low power dissipation approximately zero power dissipation. The breakdown of power in the circuits relates with ever-increasing the attractiveness of portable electronic devices. All battery using components like Laptop, pagers, portable video players and cellular phones are the major source of power, 2. RELATED WORKS kumar K et al. has been proposed the adders using reversible logic for efficient Implementation. Here the paper briefly explains the different types of adders were implemented with different reversible logic gates. The efficient adders are CSA, CSLA, RCA, CBA etc., are mostly used adders in the digital circuits. Design had done by both logic circuits named as reversible and irreversible logic gates. The performance of the adders is synthesized by using the Modelsim simulation environment. Guan, Z. et al. were proposed the novel ALU design with the concept of depends on the reversible computing. Reversible logic gates are replaced the conventional gates. It functions perform the operation same as conventional ALU design. Proposed the method of design of efficient adder circuits based on the HNG and Prese gates. HNG and PFAG gates are used to design the lower hardware complexity and low power adder circuit. 3. REVERSIBLE LOGIC GATES Reversible logic gate design is the most successful design for computer with the generation of heat. It generates less amount of heat inside the computer. Energy efficiency in the circuit can be achieved by reversible logic computing architecture. Normally energy efficiency is to change the speed of circuits and reduce the delay such as micro and nano electronic. To enhance the portability of devices can be achieved by reversible logic circuit. The component size of the circuit to decrease the size of the device and the outcomes is portable.
2.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 04 Issue: 08 | Aug -2017 www.irjet.net p-ISSN: 2395-0072 © 2017, IRJET | Impact Factor value: 5.181 | ISO 9001:2008 Certified Journal | Page 1627 Fig. 1. Basic Reversible Logic Circuit Feynman Gate A Fig. 2. Block of Feynman Gate It consists of two inputs and two outputs. It is also called as Controlled NOT gate. The above block clearly shows the operation of the output. Quantum cost of the Feynman gate is one. Fredkin Gate Fredkin gate is a three input gate; it contains three inputs and three equal outputs. The name of the fredkin gate is controlled permutation gate. The basic gate function is shown in figure. 3. Reversible logic In 0 In 1 In 2 Out 0 Out 1 Out 2 Feynman Gate X Y M=X N=X^Y
3.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 04 Issue: 08 | Aug -2017 www.irjet.net p-ISSN: 2395-0072 © 2017, IRJET | Impact Factor value: 5.181 | ISO 9001:2008 Certified Journal | Page 1628 Fredkin Fig. 3. Fredkin Gate Peres Gate (PG) Fig. 4. Peres Gate Peres gate is a three inputs and three output gates. Quantum cost of the peres gate is four. It is also constructed by using 1 Toffoli and 1 Feynman gate. It is also called as new Toffoli gate. 4. FULL ADDER USING PERES GATE Fig. 5. Full Adder using Peres Gate Fredkin Gate X Y Z M=X N=X’Y^XZ O=X.Y^X’Z Peres Gate X Y Z M=X N=X^Y O=X.Y^Z PERES GATE PERES GATE x y 0 h1 x^y x.y x h2 x^y^z (x^y).z^xy
4.
International Research Journal
of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 04 Issue: 08 | Aug -2017 www.irjet.net p-ISSN: 2395-0072 © 2017, IRJET | Impact Factor value: 5.181 | ISO 9001:2008 Certified Journal | Page 1629 The above circuit is the full adder circuit which is constructed by using two peres gate. The two peres gates are cascaded to each other. The output of the first stage is forwarded to the input of the second peres gate. It reduces the power consumption compared to the normal full adder circuit. 5. RESULTS AND DISCUSSION The adder circuit can be synthesized and evaluated using Xilinx simulation environment, and also compared with the traditional full adder circuit. Table. 1. Comparison of Adder circuits Parameters Adder using Peres Gate Adder using HNG Quantum Cost 126 98 Garbage Output 30 32 Delay (ns) 7.74 7.78 6. CONCLUSION In this paper, reversible logic gates using different adder circuits were designed and compared with some parameters to known the best adders. Delay and quantum cost should be reduced for proposed adder circuit. REFERENCES 1. P.Vanusha, K.Amurtha Vally, “Low Power Computing Logic Gates design using Reversible logic”, Vol. 3(10), pp. 123-129, Oct. 2014. 2. D. Maslov and G. W. Dueck, “Garbage in reversible design of multiple output functions,” in Proc. 6th Int. Symp. Represent. Methodology Future Comput. Technol., pp. 162–170, Mar. 2003. 3. J. Lim, K. Kwon, and S. I. Chae, “Reversible energy recovery logic circuit without non-adiabatic energy loss,” Electron. Lett., vol. 34(4), pp. 344–346, Feb. 1998. 4. Bangyuan, Chen Xunweiwu and Massoud Pedram, “Power Estimation in Binary CMOS Circuits Based on Multiple-Valued Logic”, OPA (Overseas Publishers Association) N.V., 2000.
Download now