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Digital Electronics
Combinational Circuit
Sequential Circuit
Prepared by
Sweta Kumari Barnwal
Assistant Professor
Arka Jain University
Sweta Kumari Barnwal 1
Combinational Circuit
 A combinational circuit that consists of logic gates
whose outputs, at any time, are determined by
combining the values of the present inputs.
 For n input variables, there are 2n possible binary
output combinations.
 For each binary combination of the input variables,
there is one possible output.
 A combinational circuit can be described by:
a) A truth table that lists the output values for
each combination of the input variables, or
b) m Boolean functions, one for each output
variable.
Sweta Kumari Barnwal 2
Continued….
n i/p m o/p
Lines lines
Here, m = 2n
 It has not any memory/storage unit therefore its output does not
depend upon the previous input output.
 Examples: Multiplexer, Demultiplexer, Adder, Subtractor,
Encoder, Decoder etc.
Combinational
Circuit
Sweta Kumari Barnwal 3
Sequential Circuit
Sequential circuits consist combinational logic circuit as well as
memory elements (used to store certain circuit states). Hence,
outputs depend on BOTH current input values and previous
input values (kept in the storage elements).
Examples: Flip Flop, Latch, Counter, Register etc.
Sweta Kumari Barnwal 4
Multiplexer (DataSelectors)
 It is a device that allows digital information from several sources
to be routed onto a single line for transmission over that line to a
common destination.
 In single line we can say that it is a logical device/circuit having
many input lines & only one output line.
Severalnumberofdata input lines
Someselect lines (<input lines)
Singleoutput line
If there data input lines = n
(where n is 2k and k is integer, k = 1,2,3,4,5………)
then number of selectlines = m
Therefore, 2m = n
Sweta Kumari Barnwal 5
Functional DiagramOfaMultiplexer
Sweta Kumari Barnwal 6
2 : 1Multiplexer
S
0
1
Y
I0
I1
Sweta Kumari Barnwal 7
4: 1Multiplexer
S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3
Sweta Kumari Barnwal 8
8: 1Multiplexer
S0 S1 S2 Y
0 0 0 I0
0 0 1 I1
0 1 0 I2
0 1 1 I3
1 0 0 I4
1 0 1 I5
1 1 0 I6
1 1 1 I7
Sweta Kumari Barnwal 9
Multiplexer Tree
•
The Multiplexers with more number of inputs can be obtained
by cascading two or more multiplexers with less number of
inputs.
Below diagram is showing 16:1 MUX using four 4:1 MUXs :-•
Sweta Kumari Barnwal 10
Demultiplexer (DataDistributor)
 It basicallyreverses the multiplexing function. It takesdata from
one line and distributes them to a given number of output lines.
For this reason, the demultiplexer is also known as a data
distributor.
 In short, it has single input and multiple output lines.
Severalnumberofdata output lines
Someselect lines (<output lines)
Singleinput line
If there data output lines = n
(where n is 2k and k is integer, k = 1,2,3,4,5………)
then number of selectlines = m
Therefore, 2m = n
Sweta Kumari Barnwal 11
Functional DiagramOf a Demultiplexer
Sweta Kumari Barnwal 12
1: 2Demultiplexer
S0 Y0 Y1
0 D 0
1 0 D
Sweta Kumari Barnwal 13
1 : 4Demultiplexer
S1 S0 D0 D1 D2 D3
0 0 D 0 0 0
0 1 0 D 0 0
1 0 0 0 D 0
1 1 0 0 0 D
Sweta Kumari Barnwal 14
1 : 8Demultiplexer
Sweta Kumari Barnwal 15
1: 8Demultiplexer (TruthTable)
S2 S1 S0 D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 D 0 0 0 0 0 0 0
0 0 1 0 D 0 0 0 0 0 0
0 1 0 0 0 D 0 0 0 0 0
0 1 1 0 0 0 D 0 0 0 0
1 0 0 0 0 0 0 D 0 0 0
1 0 1 0 0 0 0 0 D 0 0
1 1 0 0 0 0 0 0 0 D 0
1 1 1 0 0 0 0 0 0 0 D
Sweta Kumari Barnwal 16
DemultiplexerTree
Below isadesignof 1:8 DeMUXusingseven1: 2 DeMUXs:
Sweta Kumari Barnwal 17
Implementation Of LogicalFunction usingMultiplexer
A B C F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
F(A, B, C) = A’B’C + AB
0
1
0
0
0
0
1
1
S2 S1 S0
A B C
F
0
1
2
3 8:1 MUX
4
5
6
7
Sweta Kumari Barnwal 18
A B C Y
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
F
C
0
0
1
C
0
0
1
A B
S S1 0
F
0
1 4:1MUX
2
3
F(A, B, C) = A’B’C + AB
A B F
0 0 C
0 1 0
1 0 0
1 1 1
Sweta Kumari Barnwal 19
A B C D Y
0 0 0 0 0
0 0 0 1 1
0 0 1 0 0
0 0 1 1 1
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
F
D
D
D
0
0
D
1
1
F(A,B,C) = F= A’B’C’D + A’B’CD + A’BC’D’ + AB’CD+ ABC’D’
+ ABC’D + ABCD’+ABCD
D
0
1
A B C
S S S2 1 0
F
0
1
2
3 8:1 MUX
4
5
6
7
D’
Sweta Kumari Barnwal 20
THANKYOU
Sweta Kumari Barnwal 21

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Digital electronics Multiplexers & Demultiplexers

  • 1. Digital Electronics Combinational Circuit Sequential Circuit Prepared by Sweta Kumari Barnwal Assistant Professor Arka Jain University Sweta Kumari Barnwal 1
  • 2. Combinational Circuit  A combinational circuit that consists of logic gates whose outputs, at any time, are determined by combining the values of the present inputs.  For n input variables, there are 2n possible binary output combinations.  For each binary combination of the input variables, there is one possible output.  A combinational circuit can be described by: a) A truth table that lists the output values for each combination of the input variables, or b) m Boolean functions, one for each output variable. Sweta Kumari Barnwal 2
  • 3. Continued…. n i/p m o/p Lines lines Here, m = 2n  It has not any memory/storage unit therefore its output does not depend upon the previous input output.  Examples: Multiplexer, Demultiplexer, Adder, Subtractor, Encoder, Decoder etc. Combinational Circuit Sweta Kumari Barnwal 3
  • 4. Sequential Circuit Sequential circuits consist combinational logic circuit as well as memory elements (used to store certain circuit states). Hence, outputs depend on BOTH current input values and previous input values (kept in the storage elements). Examples: Flip Flop, Latch, Counter, Register etc. Sweta Kumari Barnwal 4
  • 5. Multiplexer (DataSelectors)  It is a device that allows digital information from several sources to be routed onto a single line for transmission over that line to a common destination.  In single line we can say that it is a logical device/circuit having many input lines & only one output line. Severalnumberofdata input lines Someselect lines (<input lines) Singleoutput line If there data input lines = n (where n is 2k and k is integer, k = 1,2,3,4,5………) then number of selectlines = m Therefore, 2m = n Sweta Kumari Barnwal 5
  • 8. 4: 1Multiplexer S1 S0 Y 0 0 I0 0 1 I1 1 0 I2 1 1 I3 Sweta Kumari Barnwal 8
  • 9. 8: 1Multiplexer S0 S1 S2 Y 0 0 0 I0 0 0 1 I1 0 1 0 I2 0 1 1 I3 1 0 0 I4 1 0 1 I5 1 1 0 I6 1 1 1 I7 Sweta Kumari Barnwal 9
  • 10. Multiplexer Tree • The Multiplexers with more number of inputs can be obtained by cascading two or more multiplexers with less number of inputs. Below diagram is showing 16:1 MUX using four 4:1 MUXs :-• Sweta Kumari Barnwal 10
  • 11. Demultiplexer (DataDistributor)  It basicallyreverses the multiplexing function. It takesdata from one line and distributes them to a given number of output lines. For this reason, the demultiplexer is also known as a data distributor.  In short, it has single input and multiple output lines. Severalnumberofdata output lines Someselect lines (<output lines) Singleinput line If there data output lines = n (where n is 2k and k is integer, k = 1,2,3,4,5………) then number of selectlines = m Therefore, 2m = n Sweta Kumari Barnwal 11
  • 12. Functional DiagramOf a Demultiplexer Sweta Kumari Barnwal 12
  • 13. 1: 2Demultiplexer S0 Y0 Y1 0 D 0 1 0 D Sweta Kumari Barnwal 13
  • 14. 1 : 4Demultiplexer S1 S0 D0 D1 D2 D3 0 0 D 0 0 0 0 1 0 D 0 0 1 0 0 0 D 0 1 1 0 0 0 D Sweta Kumari Barnwal 14
  • 15. 1 : 8Demultiplexer Sweta Kumari Barnwal 15
  • 16. 1: 8Demultiplexer (TruthTable) S2 S1 S0 D0 D1 D2 D3 D4 D5 D6 D7 0 0 0 D 0 0 0 0 0 0 0 0 0 1 0 D 0 0 0 0 0 0 0 1 0 0 0 D 0 0 0 0 0 0 1 1 0 0 0 D 0 0 0 0 1 0 0 0 0 0 0 D 0 0 0 1 0 1 0 0 0 0 0 D 0 0 1 1 0 0 0 0 0 0 0 D 0 1 1 1 0 0 0 0 0 0 0 D Sweta Kumari Barnwal 16
  • 17. DemultiplexerTree Below isadesignof 1:8 DeMUXusingseven1: 2 DeMUXs: Sweta Kumari Barnwal 17
  • 18. Implementation Of LogicalFunction usingMultiplexer A B C F 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 F(A, B, C) = A’B’C + AB 0 1 0 0 0 0 1 1 S2 S1 S0 A B C F 0 1 2 3 8:1 MUX 4 5 6 7 Sweta Kumari Barnwal 18
  • 19. A B C Y 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 F C 0 0 1 C 0 0 1 A B S S1 0 F 0 1 4:1MUX 2 3 F(A, B, C) = A’B’C + AB A B F 0 0 C 0 1 0 1 0 0 1 1 1 Sweta Kumari Barnwal 19
  • 20. A B C D Y 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 1 1 1 0 1 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 1 F D D D 0 0 D 1 1 F(A,B,C) = F= A’B’C’D + A’B’CD + A’BC’D’ + AB’CD+ ABC’D’ + ABC’D + ABCD’+ABCD D 0 1 A B C S S S2 1 0 F 0 1 2 3 8:1 MUX 4 5 6 7 D’ Sweta Kumari Barnwal 20