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![ASIC Engineering Organization
Engineering Talent
Project Oriented
Rigorous Processes
Best-in-Class Tools
Secure Infrastructure
System Redundancy
Specification Driven
Compliance Exit Criteria
Design for Test, Yield,
Manufacturability
True IP reuse culture
Triad’s Custom IC Engineering Group
25 IC Designers
Customers
Project Leaders [10]
IC Designers [15]
Project
Admins [2]
Test
Engineers [3]
Cad Engineer
Sys Admin
VP of Engineering](https://image.slidesharecdn.com/triadsemiconductormay2015-150527185703-lva1-app6892/75/Triad-Semiconductor-Analog-and-Mixed-Signal-ASIC-Company-Overview-7-2048.jpg)
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Triad Semiconductor Analog and Mixed Signal ASIC Company Overview
Triad Semiconductor provides analog and mixed signal ASIC design and manufacturing solutions using its Agile ASICTM approach. The Agile ASIC approach combines full custom analog circuits with a configurable routing fabric that allows designs to be rapidly modified using a via-only mask set. This enables designs to go from prototypes to production quickly and respond rapidly to changes or issues, speeding development times. Triad has expertise in markets like defense, industrial, medical, automotive, and consumer.
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Triad Semiconductor Analog and Mixed Signal ASIC Company Overview
- 1. Triad Semiconductor Analog andMixed Signal Agile ASIC™ Solutions
- 2. Analog and mixedsignal ASIC design and manufacturing solutions. Triad Semiconductor Agile asic development
- 3. Proven Track Record Adecade of delivering mission critical ASIC solutions defense industrial medical automotive consumer 10
- 4. Alternative IC Vendors Standard Product Catalog Offering ASSP CSSP ASIC Others StandardProduct Focused ASIC is a special case Chip must with mass appeal Organized to share your IP with your competitors
- 5. Triad - ProudlyASIC Focused ASIC-only. ASIC-culture Your ASIC partner Your IP Vault Empowering you to differentiate in hardware
- 6. Experienced ASIC DesignTeam Years of combined custom IC design experience 600
- 7. ASIC Engineering Organization EngineeringTalent Project Oriented Rigorous Processes Best-in-Class Tools Secure Infrastructure System Redundancy Specification Driven Compliance Exit Criteria Design for Test, Yield, Manufacturability True IP reuse culture Triad’s Custom IC Engineering Group 25 IC Designers Customers Project Leaders [10] IC Designers [15] Project Admins [2] Test Engineers [3] Cad Engineer Sys Admin VP of Engineering
- 8. Triad’s ASIC ProjectFlow Diagram Kick-Off Meeting Initial Requirements & Specification Specification Review Digital Design Analog Design Digital Simulation Analog Simulation Initial Design Review (IDR) Complete Block Design & Block Layout Top Level Simulations Critical Design Review (CDR) Top Level Layout LVS/DRC Verification Release to Foundry Tape Out Wafer Fabrication Prototype Packaging Test and IC Delivery Package Requirements Package Selection I/O Requirements Evaluation PCB Development Bonding Diagram 1 Specification Development Major Milestone Customer Provided Joint Effort Triad Responsibility Legend 1 Highly recommended to hold kick-off meeting at Triad’s Winston-Salem NC HQ to quickly ramp the project.
- 9. Trusted Solutions Provider Automotive Medical Industrial Defense EngineeringOperations Mission Critical Solutions
- 10. Supply Chain Distribution Partner Semiconductor Foundry Partners Optimal solutionthroughout the entire supply chain Package Assembly Partners Qualification Production Test Partners
- 11. Long Term Supply Commitmentis Core to Triad
- 12. Manufacturing Partner Collectively, wehave shipped over 2,000,000,000 ICs Superior Supply Chain Know-how Relationships Supply Chain Management & Optimization Market Introduction, Ramp High Volume 2B
- 13. Triad ASIC Solutions ASICFocused ASIC Design Excellence ASIC Quality ASIC Long-term Supply Commitment ASIC Manufacturing Partner Your trusted analog and mixed signal ASIC design and manufacturing solutions provider.
- 14. Traditional Full CustomASIC Challenges Long development Expensive development Risky development Difficult to make changes
- 15. ASIC benefits andAgility…
- 16. Agile – fast,responsive Rapid Development Mitigated Risk Change Management Cost Effective Agile ASIC™ TS
- 17. Agile – Fastto Prototypes Agile ASICs speed time to 1st Silicon by 3 months 9 months 12 months Time to 1st Silicon Agile ASIC Traditional
- 18. The Secret isgetting from prototypes to production quickly Most mixed signal designs need 1 to 2 re-spins to achieve production readiness
- 19. Fixing a TraditionalASIC is slow & difficult Manual Rip Up Manual Layout Full Mask Fab 6+ months
- 20. An Agile ASICis Responsive
- 21. Agile ASICs modifiedquickly & easily Manual Rip Up Manual Layout Full Mask Fab 6+ months Via-Only Place & Route Via-Only Fab 1 to 1.5 months Agile ASICs speed up time to 2nd Silicon by 5-6 months
- 22. An Agile ASICis Fast & Responsive • Year Faster to Market • Predictable Schedule & Cost • Future Proof • Major Program Savings
- 23. 26V domain5V domain1.8Vdomain5V domain ADC 20-bit HART Modem 1.8V Regulator Band Gap HART PHY Bias Generator Control Watchdog Triad Agile ASIC™ Agile ASICs are High Performance
- 24. Agile ASICs areHigh Performance and Low Power 16 Bit ADC MCU Low Noise TIAs EEPROM RAM UARTDAC DAC Mux PLL 250µA Low Power Major architecture changes ViaOnly™ Change 50% Power Reduction
- 25. Agile ASICs: HighPerformance Systems 14 Bit ADC Digital Level Shifters Temp Sensor Thermal Shutdown Voltage References 3.0V LDO 2.8V LDO 1.2V LDO 1.8V LDO 1.2V Buck Regulator 500mA 1.8V Buck Regulator 150mA Voltage Supervisor Soft Start PMIC + Precision Analog Power Fabric Isolation Substrate Noise System Noise Shielding Decoupling Power Domains
- 26. What is anAgile ASIC? 1 Full Custom Circuits 2 Overlaid with Routing Fabric* *Fabric enlarged to show detail 3 ViaPath™ ViaOnly Place & Route Software 4 Design Configured with Vias
- 27. Agile ASICs startwith full custom circuits OpAmp OpAmp Switch Array Resistor Array Capacitor Array Logic Array Agile ASIC Circuit Regular, array based layout of resources • Proven performance • Predictable performance Supports interdigitating of elements • Mitigates thermal gradient effects • Mitigates varying wafer effects Spare resources carefully pre-planned • No difference in performance • Spares easily accessed by routing fabric
- 28. Via Configurable RoutingFabric Patented Routing Fabric Fabric made from two vertically adjacent metal layers Arranged as a grid of overlapping routing tracks Adjacent grids rotated 90 degrees to prevent long routing blockages Interconnect & configuration accomplished with metal layers and vias. Same interconnect method used in full-custom IC design. Vias are low resistance resources ideal for connecting analog circuits
- 29. ViaPath™ - Via-OnlyPlace & Route Software • Analog Aware™ – Differential Routing – Twisted Pairs – Shielding – Power Routing – Power Domains – High Current Routing • 10 years of constant improvement Trusted – the US nuclear arsenal is Powered by ViaPath
- 30. Agile ASICs –Circuits plus Fabric = Tiles Via Configurable Tile • Tightly coupled combination of circuits and routing fabric • Fabric is manually added by full-custom IC designer for optimal performance Fabric enlarged to show detail
- 31. Agile ASICs –Tiles Speed Assembly & Optimize Area Tiles are designed with a focus on rapid chip assembly and total area optimization Configurable Tile Circuits plus Fabric Configurable Tile Circuits plus FabricConfigurable Tile Circuits plus Fabric Configurable Tile Circuits plus Fabric Configurable Tile Circuits plus Fabric
- 32. Agile ASICs –Flexible Routing Control & Access Configurable Tile Full Custom Circuit Black Box KEEP OUT White Box Gray Box Black Box White Box ViaPath free to route through this area and use available circuits. Grey Box ViaPath free to route through this area on unused tracks only. Don’t move used circuits or tracks. Don’t make use of unused resources. Black Box Keep out. Don’t route through this area nor use any resources.
- 33. Complete Agile ASICsAssembled in Days Days
- 34. Triad’s Spectrum ofAgile ASIC Solutions Agile ASIC™ TS 100% Via Reconfigurable Focused Agile ASIC™ TS Reconfigurability in Focused areas only Full-Custom ASIC TS 100% Full Custom Cost, Size Optimized
- 35. Agile Response toProblems ASIC functioned to spec Failed In System Output load off by 20x in the spec And, Error replicated 28 times Total rip-up required Weekend • Schematics changed • Simulated Hours • ViaPath routed new circuit 4 Weeks • ViaOnly single mask fabrication 6 Month Delay 1 Month Fix Agile ASIC Rapid ResponseProblem
- 36. Agile Response toProblems New Feature Request After Tape Out! Customer feared NRE upcharge Anticipated large schedule hit Scrap 1-mask only Days • Schematic Capture, Simulation • ViaPath Place & Route 4 Weeks & Single Mask • ViaOnly single mask fabrication Major Cost & Time Savings Agile ASIC Rapid ResponseProblem
- 37. How fast? Kickoff toworking silicon New Agile ASIC Complete mask set 60 days
- 38. Triad Semiconductor Snapshot Headquarters Winston-SalemNC Fabless semiconductor company Founded 2002 53 Employees 32 IC Design Professionals Regional Sales Offices • West Palm FL • Knoxville TN • Dallas TX • Green Bay WI • Minneapolis MN • Saginaw MI • San Jose CA Focus Design and manufacture of custom analog and mixed signal integrated circuits. A rapid, low risk, cost optimized approach to mixed signal ASIC development. Analog Aware™ place and route software that configures designs by placing vias in Triad’s patented routing fabric. Mixed signal circuit design, simulation and analog synthesis of circuits created by ViaWizard™ generators. Agile ASICs™ ViaPath™ ViaDesigner™ ViaWizards™ Expert system software that generates Configurable IP (cIP™) from user specified parameters. Differentiating Technology Markets Solutions For highest volume applications .Full Custom ASIC Re-configurability in focused areas of the design.Focused Agile ASIC Entire ASIC is 100% re-configurability.Agile ASIC Partners defense industrial medical automotive consumer Fast-Full-Custom™ Ultimate Time to Market And Low Cost Solution
Editor's Notes
- #28 Area Reclaimed Systematic Spare resources placed where most likely to be needed Previsions made for routing to these resources early in the design process Parasitics are well known and even taken advantage of Ten years of proven results and refinement
- #31 Area Reclaimed Systematic Spare resources placed where most likely to be needed Previsions made for routing to these resources early in the design process Parasitics are well known and even taken advantage of Ten years of proven results and refinement
- #32 Area Reclaimed Systematic Spare resources placed where most likely to be needed Previsions made for routing to these resources early in the design process Parasitics are well known and even taken advantage of Ten years of proven results and refinement