Peripherals of Microprocessor 8085

Architecture of Peripheral Interfacing Devices
Dr. Nilesh Bhaskarrao Bahadure
https://www.sites.google.com/site/nileshbbahadure/home
July 26, 2021
Dr. Nilesh Bhaskarrao Bahadure () Unit - V July 26, 2021 1 / 34

Overview I
1 Syllabus
2 Programmable Peripheral Interface (PPI) 82511
Features of 8255
Block Diagram of 8255 PPI
3 Modes of operation of 8255 PPI
BSR Mode of 8255 PPI
Parallel IO of 8255 PPI
4 IC 8155/8156
Features of 8155/8156
5 Block Diagram of 8155/8156
Chip Enable Logic & Port Addresses (Peripheral I/O Addressing
Scheme
6 Control Word Register of 8155
7 Timers of 8155/8156
Modes of Timers of 8155
Example 1

Overview II
8 IC 8355/8755
Differences between 8355 and 8755
9 Block Diagram of 8155/8156
10 Thank You

Outline of Architecture of Peripheral Interfacing Devices
Main Slide

Features of 8255
1. Compatible to 8085
2. Three Ports (Port A, Port B & Port C) [All ports are of 8 bits]
3. Port A & Port B act as parallel ports whereas Port C can act as parallel
as well as serial port
4. Port C supply the Handshake signals for Port A and Port B
5. Only Command Register but no Status Register, i.e., the Command
Register can not act as Status Register
6. 40 pin IC
7. 8 pins (PA0 - PA7) for Port A, 8 pins (PB0 - PB7) for Port B and 8
pins (PC0 - PC7) for Port C
8. No memory or other application registers
9. One Chip Select input (CS)
10. Contains RD and WR signals but no IO/M is required.
Main Slide

Block Diagram of 8255 PPI
Main Slide

Internal Decoding of 8255 PPI
Main Slide

Internal Decoding of 8255 PPI
Depending on the internal logic of A1 and A0, only one port from port A,
B and C are selected
if A1 and A0 both are 00 then port A is selected
if A1 and A0 both are 01 then port B is selected
if A1 and A0 both are 10 then port C is selected
if A1 and A0 both are 11 then CWR (Control Word Register) is selected
Main Slide

Chip Select Logic and IO Port address of 8255 PPI
Main Slide

Chip Select Logic and IO Port address of 8255 PPI...
Main Slide

Control Register and Control word
The control word to be specified in the control Register specifies the I/O
function for each Port.
The Control Register can be accessed to WRITE a Control Word but is
not accessible for a READ operation.
Hence the Control Register can not act as a Status Register.
Main Slide

Modes of operation of 8255 PPI
Main Slide

BSR Mode of 8255 PPI
Main Slide

Parallel IO of 8255 PPI
Main Slide

IC 8155/8156

1 40 Pin IC
2 2kbits static RAM 256x8
3 2 programmable 8 bit I/O ports (PA and PB)
4 1 programmable 6 bit I/O port (PC)
5 1 programmable 14 bit binary counter/timer

Block Diagram of 8155/8156

Internal Decoding of 8155/8156

Chip Enable Logic & Port Addresses (Peripheral I/O
Addressing Scheme
A8, A9, and A10 will duplicate the contents of AD0, AD1 and AD2
respectively

Chip Enable Logic & Port Addresses (Peripheral I/O
Addressing Scheme...

Control Word Register of 8155

Features of 8155 Timers
1 14 bit presettable down counter
2 Uses two registers : Timer MSB & Timer LSB
3 The addresses of the two registers are different
4 The timer registers can be loaded separately but cannot be
programmed separately
5 The presettable count is called the Terminal Count (TC) and is of 14
bits: The lower byte is loaded into the Timer LSB register & the
higher 6 bits can be loaded into timer MSB register
6 The timer operation is controlled by two ms bits reserved in the
control word format
7 The timer can operate in FOUR modes of operation
8 The modes of the timer can be selected by the two msb’s in the
Timer MSB register

Calculation of TC (Terminal Count)
TC = fout
fin
= Tin
Tout

Timer Registers

Modes of Timers of 8155
Supports four modes of operation:
Mode 0 (Single square wave),
Mode 1 (Continuous Square wave),
Mode 2 (Single rectangular pulse),
Mode 3 (Continuous rectangular pulse)

Example 1
Design a square wave generator of frequency 2 KHz using 8155 timer.
Solution
Step I: Calculate TC and express it in hex. Mode to be selected is Mode 1
Step II: Load the Timer LSB & MSB with the TC alongwith the mode
Step III: Load the Command Register with suitable Control Word

IC 8355/8755

1 Compatible to 8085
2 Two Ports (Port A Port B)
3 2 K ROM (8355) / 2 K EPROM (8755)
4 Ports operate only in synchronous mode with the help of READY
signal
5 No Control Register
6 Data Direction Register (DDR) controls the operation of the bits of
the Ports
7 The Ports pin are programmable
8 The Ports can act as serial as well as parallel ports
9 40 pin IC
10 8 pins (PA0 - PA7) for Port A and 8 pins (PB0 -PB7) for Port B
11 11 address lines (AD0 - AD7 & A8 - A10)
12 Two Chip enable inputs (CE1 CE2) (for 8355 only)
13 Contains IOW , IOR & RD signals but does not have any WR pin

1 8355 contains ROM whereas 8755 contains EPROM
2 One pin (No. 1) is CE1 for 8355 whereas for 8755 that pin is used as
PROG for programming the EPROM

Block Diagram of 8155/8156

Port Selection and Address Generation

Port Selection and Address Generation...

Thank you
Please send your feedback at nbahadure@gmail.com
For more details and updates kindly visit
https://sites.google.com/site/nileshbbahadure/home
Main Slide

Peripherals of Microprocessor 8085

More Related Content

What's hot

Similar to Peripherals of Microprocessor 8085

More from Nilesh Bhaskarrao Bahadure

Recently uploaded

Peripherals of Microprocessor 8085