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8255
Programmable Peripheral
Interface
Prepared by:
ABHIMANYU JHA
STEPHEN SAMUEL
MOHD. HAMZA
Presentation on
8255 Programmable peripheral
Interface:
 PPI 8255 is a general purpose programmable I/O device
designed to interface the CPU with its outside world such as
ADC, DAC, keyboard etc.
 It can be used with almost any microprocessor.
 It consists of three 8-bit bidirectional I/O ports i.e. PORT A,
PORT B and PORT C.
PROGRAMMABLE PERIPHERAL
INTERFACE -8255
Features:
 It is a programmable device.
 It has 24 I/O programmable pins like PA,PB,PC (3-8 pins).
• TT L compatible.
• Improved dc driving capability
Features:(contd.)
 It has three separately accessible ports.
 The individual ports of the 8255 can be
programmed to be input or output, and can
be changed dynamically
Pin diagram of 8255
P A 3
P A 2
P A 1
P A 0
R D
C S
G N D
A 1
A 0
P C 7
P C 6
P C 5
P C 4
P C 0
P C 1
P C 2
P C 3
P B 0
P B 1
P B 2
P B 4
P B 5
P B 6
P B 7
W R
R E S E T
D 0
D 1
D 2
D 3
D 4
D 5
D 6
D 7
V C C
P B 7
P B 6
P B 5
P B 4
P B 3
1
3
2
4
5
6
7
3
3
9
8
1 0
1 2
1 3
1 1
1 4
1 5
1 6
1 7
1 9
2 0
1 8
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
8 2 5 5 A
Pin diagram 8255
Function of pins:
 Data bus(D0-D7):These are 8-bit bi-directional buses,
connected to 8085 data bus for transferring data.
 CS:This is Active Low signal.When it is low, then data is
transfer from 8085.
 Read:This is Active Low signal, when it is Low read
operation will be start.
 Write:This is Active Low signal, when it is LowWrite
operation will be start.
A1 A0 Select
0 0 PA
0 1 PB
1 0 PC
1 1
Control
reg.
 Address (A0-A1):This is used to select the
ports. like this
 RESET:This is used to reset the device.That means clear
control registers.
 PA0-PA7:It is the 8-bit bi-directional I/O pins used to send
the data to peripheral or
or to receive the data from peripheral.
 PB0-PB7:Similar to PA
 PC0-PC7:This is also 8-bit bidirectional I/O pins.These
lines are divided into two groups.
1. PC0 to PC3(Lower Groups)
2. PC4 to PC7 (Higher groups)
These two groups working in separately using 4 data’s.
P o w e r
S u p p lie s
+ 5 V
G N D
G ro u p
A
c o n tro l
8 2 5 5 B lo c k D ia g ra m
G ro u p
A
p ro t
A
( 8 )
G ro u p
A
p ro t C
U p p e r
( 4 )
G ro u p
A
p ro t C
L o w e r
( 4 )
G ro u p
B
p ro t
B
( 8 )
G ro u p
B
c o n tro l
R e a d /
w rite
c o n tro l
lo g ic
D a ta
b u s
b u f fe r 8 - b it
I n te rn a l
d a ta b u s
B id ire c tio n a l
D a ta B u s
D 7 - D 0
R D
W R
A 1
A 0
R E S E T
C S
I O
P B 7 - P B 0
I O
P C 3 - P C 0
I O
P C 7 - P C 4
I O
P A 7 - P A 0
PA, PB, PC
(Port
A,B,C)
8 bit i/o ports
CS (Chip Select) A low signal at this pin enables the
chipRD (Read) Read enable
WR (Write) Write enable
D0-D7 (Data
Bus)
Bi-directional data lines
A0,A1 (Address) Address select
Pin description
Interfacing Of 8255
with other microprocessor
e.g. (8085 or 8086)
A
B
Y 0
G 2 A
G 1
C
G 2 B
Y 1
Y 2
Y 3
Y 4
Y 5
Y 6
Y 7
A 7
A 3
A 4
A 6
A 5
A 0
D 7 - D 0
I O R C
I O W C
A 1
A 2
R E S E T
R D
W R
A 0
A 1
R E S E T
C S
D 0
D 1
D 2
D 3
D 4
D 5
D 6
D 7
P A 0
P A 1
P A 2
P A 3
P A 4
P A 5
P A 6
P A 7
P B 0
P B 1
P B 2
P B 3
P B 4
P B 5
P B 6
P B 7
P C 0
P C 1
P C 2
P C 3
P C 4
P C 5
P C 6
P C 7
PortCPortBPortA
Control Bytes for I/O mode
1
D0D1D2D3D4D5D6D7
Group B
Port C (lower)
1 = input
0 = output
Port B
1 = input
0 = output
Mode selection
00 = mode 0
01 = mode 1
1x = mode 2
Group A
Port C (upper)
1 = input
0 = output
Port A
1 = input
0 = output
Mode selection
00 = mode 0
01 = mode 1
1x = mode 2
Modes Of Operation
The 8255 can work in 2 modes that are I/O
mode and BSR mode
i/o mode is further divided in to
1. Mode 0 (Basic I/O)
2. Mode 1 (Strobe I/O)
3. Mode 2 (Bi - Conditional Bus)
Operation modes:
BIT SET/RESET MODE:
The PORT C can be Set or Reset by sending OUT
instruction to the CONTROL registers.
I/O MODES:
MODE 0 (Simple input / Output):
In this mode , port A, port B and port C is used as
individually (Simply).
Features:
Outputs are latched , Inputs are buffered not latched.
Ports do not have Handshake or interrupt capability.
MODE 0: simple i/p and o/p
 In this mode all the three ports (port A, B, C) can work as
simple input function or simple output function
 . In this mode there is no interrupt handling capacity.
 Port A and Port B can be configured as simple 8-bit input
or output ports without handshaking.
 The two halves of Port C can be programmed separately
as 4-bit input or output ports.
 In this mode, any of the ports A, B, CL, and CU can
be programmed as input or output.
ThankYou

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8255 PPI (programmable Peripheral Interface) mode 0

  • 1. 8255 Programmable Peripheral Interface Prepared by: ABHIMANYU JHA STEPHEN SAMUEL MOHD. HAMZA Presentation on
  • 2. 8255 Programmable peripheral Interface:  PPI 8255 is a general purpose programmable I/O device designed to interface the CPU with its outside world such as ADC, DAC, keyboard etc.  It can be used with almost any microprocessor.  It consists of three 8-bit bidirectional I/O ports i.e. PORT A, PORT B and PORT C.
  • 3. PROGRAMMABLE PERIPHERAL INTERFACE -8255 Features:  It is a programmable device.  It has 24 I/O programmable pins like PA,PB,PC (3-8 pins). • TT L compatible. • Improved dc driving capability
  • 4. Features:(contd.)  It has three separately accessible ports.  The individual ports of the 8255 can be programmed to be input or output, and can be changed dynamically
  • 6. P A 3 P A 2 P A 1 P A 0 R D C S G N D A 1 A 0 P C 7 P C 6 P C 5 P C 4 P C 0 P C 1 P C 2 P C 3 P B 0 P B 1 P B 2 P B 4 P B 5 P B 6 P B 7 W R R E S E T D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 V C C P B 7 P B 6 P B 5 P B 4 P B 3 1 3 2 4 5 6 7 3 3 9 8 1 0 1 2 1 3 1 1 1 4 1 5 1 6 1 7 1 9 2 0 1 8 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 8 2 5 5 A Pin diagram 8255
  • 7. Function of pins:  Data bus(D0-D7):These are 8-bit bi-directional buses, connected to 8085 data bus for transferring data.  CS:This is Active Low signal.When it is low, then data is transfer from 8085.  Read:This is Active Low signal, when it is Low read operation will be start.  Write:This is Active Low signal, when it is LowWrite operation will be start.
  • 8. A1 A0 Select 0 0 PA 0 1 PB 1 0 PC 1 1 Control reg.  Address (A0-A1):This is used to select the ports. like this
  • 9.  RESET:This is used to reset the device.That means clear control registers.  PA0-PA7:It is the 8-bit bi-directional I/O pins used to send the data to peripheral or or to receive the data from peripheral.  PB0-PB7:Similar to PA  PC0-PC7:This is also 8-bit bidirectional I/O pins.These lines are divided into two groups. 1. PC0 to PC3(Lower Groups) 2. PC4 to PC7 (Higher groups) These two groups working in separately using 4 data’s.
  • 10. P o w e r S u p p lie s + 5 V G N D G ro u p A c o n tro l 8 2 5 5 B lo c k D ia g ra m G ro u p A p ro t A ( 8 ) G ro u p A p ro t C U p p e r ( 4 ) G ro u p A p ro t C L o w e r ( 4 ) G ro u p B p ro t B ( 8 ) G ro u p B c o n tro l R e a d / w rite c o n tro l lo g ic D a ta b u s b u f fe r 8 - b it I n te rn a l d a ta b u s B id ire c tio n a l D a ta B u s D 7 - D 0 R D W R A 1 A 0 R E S E T C S I O P B 7 - P B 0 I O P C 3 - P C 0 I O P C 7 - P C 4 I O P A 7 - P A 0
  • 11. PA, PB, PC (Port A,B,C) 8 bit i/o ports CS (Chip Select) A low signal at this pin enables the chipRD (Read) Read enable WR (Write) Write enable D0-D7 (Data Bus) Bi-directional data lines A0,A1 (Address) Address select Pin description
  • 12. Interfacing Of 8255 with other microprocessor e.g. (8085 or 8086)
  • 13. A B Y 0 G 2 A G 1 C G 2 B Y 1 Y 2 Y 3 Y 4 Y 5 Y 6 Y 7 A 7 A 3 A 4 A 6 A 5 A 0 D 7 - D 0 I O R C I O W C A 1 A 2 R E S E T R D W R A 0 A 1 R E S E T C S D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 P A 0 P A 1 P A 2 P A 3 P A 4 P A 5 P A 6 P A 7 P B 0 P B 1 P B 2 P B 3 P B 4 P B 5 P B 6 P B 7 P C 0 P C 1 P C 2 P C 3 P C 4 P C 5 P C 6 P C 7 PortCPortBPortA
  • 14. Control Bytes for I/O mode 1 D0D1D2D3D4D5D6D7 Group B Port C (lower) 1 = input 0 = output Port B 1 = input 0 = output Mode selection 00 = mode 0 01 = mode 1 1x = mode 2 Group A Port C (upper) 1 = input 0 = output Port A 1 = input 0 = output Mode selection 00 = mode 0 01 = mode 1 1x = mode 2
  • 15. Modes Of Operation The 8255 can work in 2 modes that are I/O mode and BSR mode i/o mode is further divided in to 1. Mode 0 (Basic I/O) 2. Mode 1 (Strobe I/O) 3. Mode 2 (Bi - Conditional Bus)
  • 16. Operation modes: BIT SET/RESET MODE: The PORT C can be Set or Reset by sending OUT instruction to the CONTROL registers. I/O MODES: MODE 0 (Simple input / Output): In this mode , port A, port B and port C is used as individually (Simply). Features: Outputs are latched , Inputs are buffered not latched. Ports do not have Handshake or interrupt capability.
  • 17. MODE 0: simple i/p and o/p  In this mode all the three ports (port A, B, C) can work as simple input function or simple output function  . In this mode there is no interrupt handling capacity.  Port A and Port B can be configured as simple 8-bit input or output ports without handshaking.  The two halves of Port C can be programmed separately as 4-bit input or output ports.  In this mode, any of the ports A, B, CL, and CU can be programmed as input or output.

Editor's Notes

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