This document discusses the design and analysis of a reversible logic based carbon nanotube field effect transistor (CNTFET) demultiplexer. It presents the realization of 1:2 and 1:4 demultiplexers using reversible logic gates implemented with CNTFETs. Simulation results show the transient response and power consumption of the reversible logic CNTFET demultiplexers, with 0.8 and 1.6 nanowatts for the 1:2 and 1:4 designs respectively. This is compared to conventional CMOS demultiplexer designs, showing an improvement in power reduction achieved with the reversible logic CNTFET approach. Challenges in CNT fabrication that could impact robust circuits are also discussed.