The document discusses Richard Feynman's 1959 lecture titled "There's Plenty of Room at the Bottom", where he proposed the possibility of direct manipulation of individual atoms and the development of micro-machines. It then summarizes Andreas Olofsson's presentation on how the core concepts from Feynman's lecture are still relevant today for developing more efficient computing systems through massive parallelism and reducing component sizes. The presentation outlines trends like efficiency, thermal management, memory bottlenecks, and programmability that will shape the future of computing.

1. There’s STILL
plenty of room at
the bottom!
Andreas Olofsson
1

2. Richard Feynman’s Lecture (1959)
2Copyright Adapteva
“There's Plenty of Room at the Bottom”
An Invitation to Enter a New Field of Physics
“Why cannot we write the entire 24 volumes of the
Encyclopedia Britannica on the head of a pin?”
“The principles of physics, as far as I can see, do not speak
against the possibility of maneuvering things atom by atom.”
“I don't know how to do this on a small scale in a practical
way, but I do know that computing machines are very large;
they fill rooms. Why can't we make them very small, make
them of little wires, little elements – and by little, I mean
little. For instance, the wires should be 10 or 100 atoms in
diameter, and the circuits should be a few thousand
angstroms across.”
Other Concepts:
• Rearranging atoms, Micro‐
machines, Chemical
synthesis, Micro‐antenna
arrays

3. Why the question is still relevant!
3
0
1
10
100
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000
1990 1995 2000 2005 2010 2015 2020 2025 2030
System Processing
Needs
Legacy Processing
Efficiency
“The Efficiency Gap”
Von Neumann
Saturation
Copyright Adapteva

4. Need for Efficient Processing is Universal
4

5. Adapteva Company Introduction
5
Company History:
• Founded in 2008 by processor design team from Analog Devices
• [Coprocessor / manycore / DSP / multicore / accelerator / cpu] company
• Shipping 16-core 65nm product since May 2011
• Sampling 64-core 28nm product since July 2012
• Launched Parallella open computing platform in October 2012
Notable Achievements:
• 4 chips on < $2.5M in raised capital
• 50 GFLOPS/W demonstrated at chip level
• 28nm 64-core product only 10mm2
• Architecture scales to 1024 CPUs on-chip
• ~$2M in revenue so far (~break-even)
• ~5,000 customers
Copyright Adapteva

6. Our Vision: True Heterogeneous Computing
6Copyright Adapteva
SYSTEM‐ON‐CHIP
BIG
CPU
FPGA
BIG
CPU
BIG
CPU
BIG
CPU
1000 small
Epiphany RISC
CPUs/DSPs
GPU

7. HPC COMPARISON DATA
7Copyright Adapteva
Technology FPGA DSP GPU CPU Manycore
Process 28nm 40nm 28nm 32nm 28nm
Programming VHDL C++/Asmbly CUDA C/C++ C/C++
Area (mm^2) 590 108 294 216 10
Chip Power (W) 40 22 135 130 2
CPUs n/a 8 16 4 64
Max GFLOPS 1500 160 3000 115 102
GHz * Cores n/a 12 16 14.4 51.2
L1 Memory 6MB 512KB 2.5MB 256KB 2MB
Peak performance
means very little
No magic bullet!
Efficiency is
everything

8. Epiphany: Massive Task‐Parallelism
8Copyright Adapteva
Coprocessor to
ARM/Intel CPU
25mW per core C/C++ programmable

9. Programming Models
9Copyright Adapteva
MODEL#1
TASK QUEUE MODEL
• Great for up to 2GFLOPS
• Supports standard C/C++
• “Cloud on a chip”
MODEL #2
DATA PARALLEL MODEL
• openCL programmable
• Easy integration of C/C++
• openMP roadmap
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
X86/ARM/FPGA Host
Task1
Task3Task4
Task2
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
MINI
CPU
X86/ARM/FPGA Host
Task1

10. The Future is Open HW Platforms!
10Copyright Adapteva
OPEN
Developer
Communities
CLOSED
Solutions Company
Resources
Partners
Y2000 Model Y2012 Model
Appliances
Users that “touch”
company technology
Platform
Company

11. Parallella Open Computing
11Copyright Adapteva
Rj45
USB
GPIO
GPIO
ZYNQ
(ARM)
CPU
E64
1GB SDRAM
uSD
HDMI
USB
• Open (and ”free”):
• Documentation
• Board design files
• Drivers
• Software Tools
• Accessible (NO NDAs!)
• $100 entry point
• ~4000 devs signed up in 4 weeks
IO
IO

12. Mind Boggling Progress
12Copyright Adapteva
100 GFLOPS
100 KW
$10M
(1992)
Connection Machine 5
100 GFLOPS
5 W (20k X)
$200 (50k X)
(2012/2013)
Parallella Board
Rj45
USB
GPIO
GPIO
ZYNQ
(ARM)
CPU
E64
1GB SDRAM
uSD
HDMI
USB

13. Smartphone: So much room…
13Copyright Adapteva
62 cm3 0.00003
cm3
>1M X Volume Reduction
2X
CPU
A5X‐die
~13mm
FPU
~0.15mm
ARM
A9
~2mm
A5X Chip
~16mm
iPhone4s
~58mm What if your
smartphone
disappears?

14. HPC: So much room…
14Copyright Adapteva
$1‐10B $10M?100 ‐ 1000x ratio
1 Exaflop
Processor Only
Costs (65nm)
Exascale Costs
Impractical?
What if
we start
over??

15. Capital Efficiency: So much room…
15Copyright Adapteva
$10,000
$100,000
$1,000,000
$10,000,000
$100,000,000
$1,000,000,000
Per Product SOC R&D Costs
What if you
could do a
28nm chip for
$100k?

16. Efficiency
Thermal Balancing
New Memory Hierarchy
Locality, Integration
Distributed Architectures
Parallelism
Redundancy
Programmability
Ease of Use
New Algorithms
TRENDS THAT WILL SHAPE THE
FUTURE OF COMPUTING
16Copyright Adapteva

17. Power Consumption
Thermal Density
Memory Bottlenecks
Latency Wall
Wiring
Frequency Wall
Yield Issues
Time to Market
Software Complexity
Amdahl’s Law
TRENDS THAT WILL SHAPE THE
FUTURE OF COMPUTING
17Copyright Adapteva
Efficiency
Thermal Balancing
New Memory Hierarchy
Locality, Integration
Distributed Architectures
Parallelism
Redundancy
Programmability
Ease of Use
New Algorithms

18. The Future of Computing:
Million Way Parallelism
18Copyright Adapteva
20122012
1024 CPUs
32KB/core
0.2W-20W
~10mm
16K CPUs
1MB/core(3D)
0.2W-20W
20222022
~10mm

19. 19Copyright Adapteva
The Future is…
Open
Heterogeneous
Massively Task-Parallel
Efficient
Grande Challenges Ahead…
• Rebuild the computer ecosystem
• Rewrite billions of lines of code
• Retrain millions of programmers
• Rewrite the education curriculum