This document discusses serial communication and UARTs. It begins with an introduction to serial vs parallel communication and asynchronous vs synchronous serial communication. It then discusses UART block diagrams and operation. Specific topics covered include UART clock requirements, programming the UARTs, operation modes, baud rate calculations using timers 1 and 2, and initializing the UART using timers 1 and 2. It also discusses the UART interrupt flags for receiving and sending data.
The Universal Asynchronous Receiver/Transmitter (UART) controller is the key component of the serial communications subsystem of a computer. The UART takes bytes of data and transmits the individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits into complete bytes.
The Universal Asynchronous Receiver/Transmitter (UART) controller is the key component of the serial communications subsystem of a computer. The UART takes bytes of data and transmits the individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits into complete bytes.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Design and implementation of uart on socIjrdt Journal
Security is primary concern in our day-to-day life. Everyone wants to be as much as secure as possible. The UART (universal asynchronous receiver and transmitter) module provides asynchronous serial communication with external devices such as modems and other computers. The UART can be used to control the process of breaking parallel data from the PC down into serial data that can be transmitted and vice versa for receiving data. The UART allows the devices to communicate without the need to be synchronized. UART is a popular method of serial asynchronous communication. Typically, the UART is connected between a processor and a peripheral. To the processor, the UART appears as an 8-bit read-write parallel port that performs serial-to-parallel conversions for the processor, and vice versa for the peripheral. With the implementation of UART the serial communication is done in high data rate and no interrupts. Baud rate generator provides high data rate and interrupt controller handles all the interrupts. The UART serial communication interface device receives data and converts data from serial to parallel, where as the transmitter performs parallel to serial conversion.
Fun and Easy UART - How the UART Protocol WorksRitesh Kanjee
Learn how the UART Protocol works. A universal asynchronous receiver/transmitter is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. The electric signaling levels and methods (such as differential signaling, etc.) are handled by a driver circuit external to the UART.
UART – Stands for Universal Asynchronous Receiver Transmitter It is a piece of hardware that acts as a bridge between the processor and the serial communication protocol or port (RS-232). It performs parallel – to – serial data conversion at the transmitter side and serial – to – parallel data conversion at the receiver side.Asynchronous serial communication.
A serial communication can be done using fewer wires as compared to its parallel counterpart. It is a cheapest communication device with a single wire for transmitting the data and another wire for receiving. When the high-speed data transfer is not required UART is used. In a simple serial communication, 3 pins are used: TxD, RxD and GND.
At Transmission side (i.e. From Microcontoller), one can write data into UART Data Register (e.g. UART0_DR) by using software code.
These 8 bits of data from Data Register is passed to Tx FIFO Buffer. After that, the data is sent out(one at a time) from Tx Shift Register.
TxFIFO flag = 1 (Buffer full) TxFIFO flag = 0 (not full - Software can write to Data Register)
At Receiver end, there is Rx FIFO Buffer.
RxFIFO Empty flag = 1 (Buffer is empty) RxFIFO Empty flag = 0 (Buffer has data to be read)
A frame is the unit of transmission in serial communications
Start bit: To declare the start of transmission.
Data bits: 4,5,6,7, or 8 bits of useful data bits.
Parity bit : To check for transmission errors.
Stop bit: To declare end of frame
Parity bit is used to check the integrity of a frame and signal if an error occurred during transmission.
It is an extra bit added to the end of a frame.
Even parity :The number of ‘1’ symbols inside a frame must always be even.
Odd parity : The number of ‘1’ symbols inside a frame must always be odd
The configuration settings at both ends of Txd and Rxd:
Full or half-duplex operation
Data length
Start/Stop bits
Transmission speed.
EX:-198 = 11000110
Transmission speed
Common speed = 9600 bits/sec
1/9600 = 104 us.
After detecting start it will count 104us and complets start bit.
Then begins sampling the input bits after 52us with equal count of 104us between each bit untill the next stop bit with high pulse.
Advantages
Requires minimum wires
No need for clock or any other timing signal.
Parity bit ensures basic error checking.
Disadvantages
Size of the data in the frame is limited.
Can connect only two devices at a time
Speed for data transfer is less compared to parallel.
Transmitter and receiver must agree to the rules of transmission and appropriate baud rate must be selected.
if we are looking for a device to device serial communication then UART proves itself the best as it is easy to deal with and also widely used in many peripheral devices.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Design and implementation of uart on socIjrdt Journal
Security is primary concern in our day-to-day life. Everyone wants to be as much as secure as possible. The UART (universal asynchronous receiver and transmitter) module provides asynchronous serial communication with external devices such as modems and other computers. The UART can be used to control the process of breaking parallel data from the PC down into serial data that can be transmitted and vice versa for receiving data. The UART allows the devices to communicate without the need to be synchronized. UART is a popular method of serial asynchronous communication. Typically, the UART is connected between a processor and a peripheral. To the processor, the UART appears as an 8-bit read-write parallel port that performs serial-to-parallel conversions for the processor, and vice versa for the peripheral. With the implementation of UART the serial communication is done in high data rate and no interrupts. Baud rate generator provides high data rate and interrupt controller handles all the interrupts. The UART serial communication interface device receives data and converts data from serial to parallel, where as the transmitter performs parallel to serial conversion.
Fun and Easy UART - How the UART Protocol WorksRitesh Kanjee
Learn how the UART Protocol works. A universal asynchronous receiver/transmitter is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. The electric signaling levels and methods (such as differential signaling, etc.) are handled by a driver circuit external to the UART.
UART – Stands for Universal Asynchronous Receiver Transmitter It is a piece of hardware that acts as a bridge between the processor and the serial communication protocol or port (RS-232). It performs parallel – to – serial data conversion at the transmitter side and serial – to – parallel data conversion at the receiver side.Asynchronous serial communication.
A serial communication can be done using fewer wires as compared to its parallel counterpart. It is a cheapest communication device with a single wire for transmitting the data and another wire for receiving. When the high-speed data transfer is not required UART is used. In a simple serial communication, 3 pins are used: TxD, RxD and GND.
At Transmission side (i.e. From Microcontoller), one can write data into UART Data Register (e.g. UART0_DR) by using software code.
These 8 bits of data from Data Register is passed to Tx FIFO Buffer. After that, the data is sent out(one at a time) from Tx Shift Register.
TxFIFO flag = 1 (Buffer full) TxFIFO flag = 0 (not full - Software can write to Data Register)
At Receiver end, there is Rx FIFO Buffer.
RxFIFO Empty flag = 1 (Buffer is empty) RxFIFO Empty flag = 0 (Buffer has data to be read)
A frame is the unit of transmission in serial communications
Start bit: To declare the start of transmission.
Data bits: 4,5,6,7, or 8 bits of useful data bits.
Parity bit : To check for transmission errors.
Stop bit: To declare end of frame
Parity bit is used to check the integrity of a frame and signal if an error occurred during transmission.
It is an extra bit added to the end of a frame.
Even parity :The number of ‘1’ symbols inside a frame must always be even.
Odd parity : The number of ‘1’ symbols inside a frame must always be odd
The configuration settings at both ends of Txd and Rxd:
Full or half-duplex operation
Data length
Start/Stop bits
Transmission speed.
EX:-198 = 11000110
Transmission speed
Common speed = 9600 bits/sec
1/9600 = 104 us.
After detecting start it will count 104us and complets start bit.
Then begins sampling the input bits after 52us with equal count of 104us between each bit untill the next stop bit with high pulse.
Advantages
Requires minimum wires
No need for clock or any other timing signal.
Parity bit ensures basic error checking.
Disadvantages
Size of the data in the frame is limited.
Can connect only two devices at a time
Speed for data transfer is less compared to parallel.
Transmitter and receiver must agree to the rules of transmission and appropriate baud rate must be selected.
if we are looking for a device to device serial communication then UART proves itself the best as it is easy to deal with and also widely used in many peripheral devices.
A universal asynchronous receiver-transmitter is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable.
This was my final year project based on embedded system
this is the code
http://downloads..com/download/24001476/code.rar.html
and the pcb are
http://downloads..com/download/24001498/pcb.rar.html
June 3, 2024 Anti-Semitism Letter Sent to MIT President Kornbluth and MIT Cor...Levi Shapiro
Letter from the Congress of the United States regarding Anti-Semitism sent June 3rd to MIT President Sally Kornbluth, MIT Corp Chair, Mark Gorenberg
Dear Dr. Kornbluth and Mr. Gorenberg,
The US House of Representatives is deeply concerned by ongoing and pervasive acts of antisemitic
harassment and intimidation at the Massachusetts Institute of Technology (MIT). Failing to act decisively to ensure a safe learning environment for all students would be a grave dereliction of your responsibilities as President of MIT and Chair of the MIT Corporation.
This Congress will not stand idly by and allow an environment hostile to Jewish students to persist. The House believes that your institution is in violation of Title VI of the Civil Rights Act, and the inability or
unwillingness to rectify this violation through action requires accountability.
Postsecondary education is a unique opportunity for students to learn and have their ideas and beliefs challenged. However, universities receiving hundreds of millions of federal funds annually have denied
students that opportunity and have been hijacked to become venues for the promotion of terrorism, antisemitic harassment and intimidation, unlawful encampments, and in some cases, assaults and riots.
The House of Representatives will not countenance the use of federal funds to indoctrinate students into hateful, antisemitic, anti-American supporters of terrorism. Investigations into campus antisemitism by the Committee on Education and the Workforce and the Committee on Ways and Means have been expanded into a Congress-wide probe across all relevant jurisdictions to address this national crisis. The undersigned Committees will conduct oversight into the use of federal funds at MIT and its learning environment under authorities granted to each Committee.
• The Committee on Education and the Workforce has been investigating your institution since December 7, 2023. The Committee has broad jurisdiction over postsecondary education, including its compliance with Title VI of the Civil Rights Act, campus safety concerns over disruptions to the learning environment, and the awarding of federal student aid under the Higher Education Act.
• The Committee on Oversight and Accountability is investigating the sources of funding and other support flowing to groups espousing pro-Hamas propaganda and engaged in antisemitic harassment and intimidation of students. The Committee on Oversight and Accountability is the principal oversight committee of the US House of Representatives and has broad authority to investigate “any matter” at “any time” under House Rule X.
• The Committee on Ways and Means has been investigating several universities since November 15, 2023, when the Committee held a hearing entitled From Ivory Towers to Dark Corners: Investigating the Nexus Between Antisemitism, Tax-Exempt Universities, and Terror Financing. The Committee followed the hearing with letters to those institutions on January 10, 202
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2. 2
Serial Communication
♦ Introduction
♦ Serial communication buses
♦ Asynchronous and synchronous communication
♦ UART block diagram
♦ UART clock requirements
♦ Programming the UARTs
♦ Operation modes
♦ Baud rate calculations—timer 1
♦ Initializing the UART—using timer 1
♦ Baud rate calculations—timer 2
♦ Initializing the UART—using timer 2
♦ UARTx interrupt flags—receiving data
♦ UARTx Interrupt Flags—sending data
3. 3
Introduction
♦ Parallel communication implies sending a whole byte (or
more) of data over multiple parallel wires
♦ Serial communication implies sending data bit by bit over a
single wire
♦ There are 2 types of serial communication:
Asynchronous
Synchronous
4. 4
Serial Communication Buses
♦ Many popular serial communication standards exist—some
examples are:
RS-232 (using UART)
Serial peripheral interface (SPI)
System management bus (SMBus)
Serial ATA (SATA)
♦ The C8051F020 features two UARTs, one SPI, and one
SMBus hardware peripherals
♦ We will study and use the UART in this course
♦ UART: Universal asynchronous receiver/transmitter
5. 5
Asynchronous Serial Communication
♦ With asynchronous communication, the transmitter and
receiver do not share a common clock
Transmitter Receiver+
1 byte-wide Data
Data
–
1 byte-wide Data
The Receiver
♦ Extracts the data using its own clock
♦ Converts the serial data back to the
parallel form after stripping off the start,
stop and parity bits
The Transmitter
♦ Shifts the parallel data onto the
serial line using its own clock
♦ Also adds the start, stop and
parity check bits
Add: Start, Stop, Parity Bits Remove: Start, Stop, Parity Bits
6. 6
Asynchronous Serial Communication
♦ Start bit—indicates the beginning of the data word
♦ Stop bit—indicates the end of the data word
♦ Parity bit—added for error detection (optional)
♦ Data bits—the actual data to be transmitted
♦ Baud rate—the bit rate of the serial port
♦ Throughput—actual data transmitted per sec (total bits transmitted—
overhead)
Example: 115200 baud = 115200 bits/sec
If using 8-bit data, 1 start, 1 stop, and no parity bits, the effective
throughput is: 115200 * 8 / 10 = 92160 bits/sec
7. 7
Asynchronous Serial Communication
♦ Asynchronous transmission is easy to implement but less
efficient as it requires an extra 2-3 control bits for every 8
data bits
♦ This method is usually used for low volume transmission
D0 D1 D2 D3 D4 D5 D6 D7
Start Bit 1 or 2 Stop BitsParity Bit
1 Asynchronous Byte
8. 8
Synchronous Serial Communication
♦ In the synchronous mode, the transmitter and receiver share a
common clock
♦ The transmitter typically provides the clock as a separate signal in
addition to the serial data
Transmitter Receiver
Data
Clock
The Receiver
♦ Extracts the data using
the clock provided by the
transmitter
♦ Converts the serial data
back to the parallel form
The Transmitter
♦ Shifts the data onto the serial line using its
own clock
♦ Provides the clock as a separate signal
♦ No start, stop, or parity bits added to data
1 byte-wide Data 1 byte-wide Data
10. 10
UART Block
♦ Each UART is accessed by two SFRs—SBUFx and SCONx
♦ The Serial Port Buffer (SBUFx) is essentially two buffers:
writing loads data to be transmitted to the buffer and reading
accesses received data from the buffer.
These are two separate and distinct buffers (registers): the transmit
write-only buffer and the receive read-only register
♦ The Serial Port Control register (SCONx) contains status
and control bits
The control bits set the operating mode for the serial port, and status
bits indicate the end of the character transmission or reception
The status bits are tested in software (polling) or programmed to
cause an interrupt
11. 11
UART Clock Requirements
♦ A UART needs a clock input for bit timing
♦ UART baud rates are usually much lower than the MCU
system clock, so the system clock cannot be directly used
as the UART clock
♦ Timers are used to generate the UART baud rate by dividing
down the system clock
Example: MCU system clock—22 MHz; UART baud rate—115200
♦ A bit time accuracy of ±2% or better is required at both the
transmitter and receiver ends to be able to communicate
without errors
To meet this accuracy requirement, external crystal oscillators with
accuracies of 0.1% or better are typically used in systems that use a
UART
12. 12
Programming the UARTs
The UARTs can be programmed through the following
sequence:
♦ Step 1: configure the digital crossbar (XBR0 or XBR2) to enable UART
operation
Set the TXx pin to be push-pull by setting the corresponding PnMDOUT bit
(PnMDOUT.n)
The digital crossbar has to be configured to enable TXx and RXx as
external I/O pins (XBR0.2 for UART0 and XBR2.2 for UART1)
In addition, XBARE (XBR2.6) must be set to 1 to enable the crossbar
♦ Step 2: initialize the appropriate timers for desired baud rate generation
Timer 1 can be used to generate baud rate for UART0 and UART1
Timer 2 can be used to generate baud rate for UART0
Timer 4 can be used to generate baud rate for UART1
♦ Step 3: enable/disable the baud rate doubler SMODx (PCON register)
♦ Step 4: select the serial port operation mode and enable/disable UART
reception (SCONx register)
♦ Step 5: enable UART interrupts and set priority (if desired)
13. 13
Operation Modes
♦ The UARTs have four modes of operation, selectable by
configuring the SM0x-SM1x bits in SCONx register
♦ Three modes enable asynchronous communications (modes
1 to 3) while the fourth mode (Mode 0) operates as a simple
shift register (synchronous)
8-bit shift register (mode 0)
Used for port expansion using an external latch
8-bit UART with variable baud rate (mode 1)
Most commonly used mode of operation
9-bit UART with fixed baud rate (mode 2)
No timer required
Choose between SYSCLK/32 or SYSCLK/64 for clock
9-bit UART with variable baud rate (mode 3)
Used if 9-bit data transmission is required
14. 14
SCONx Register
Bit Symbol Description
7-6 SM0x-SM1x
Serial Port Operation Mode
00: Mode 0: Shift Register Mode
01: Mode 1: 8 Bit UART, Variable Baud Rate
10: Mode 2: 9 Bit UART, Fixed Baud Rate
11: Mode 3: 9 Bit UART, Variable Baud Rate
5 SM2x
Multiprocessor Communication Enable
The function of this bit depends on the Serial Port Operation Mode.
Mode 0: No effect.
Mode 1: Checks for valid stop bit.
0: Logic level of stop bit is ignored.
1: RIx will only be activated if stop bit is 1
Mode 2 & 3: Multiprocessor Communications Enable.
0: Logic level of 9th
bit is ignored.
1: RIx is set and an interrupt is generated only when the 9th
bit is 1 and the received address matches
the UARTx address or broadcast address.
4 RENx
Receive Enable
0: UARTx reception disabled
1: UARTx reception enabled
3 TB8x
9th
Transmission Bit
The logic level of this bit will be assigned to the 9th transmission bit in Modes 2 & 3. It is not used in Modes 0 & 1.
Set or cleared by software as required.
2 RB8x
9th
Receive Bit
This bit is assigned the logic level of the 9th bit received in Modes 2 & 3. In Mode 1, if SM2x is 0, RB8x is assigned the logic level of the
received stop bit. RB8 is not used in Mode 0.
1 TIx
Transmit Interrupt Flag
Set by hardware when a byte of data has been transmitted by UARTx (after the 8th
bit in Mode 0, or at the beginning of the stop bits in
other modes). When the UARTx interrupt is enabled, setting this bit causes the CPU to vector to the UARTx ISR. This bit must be
cleared manually by software.
0 RIx
Receive Interrupt Flag
Set by hardware when a byte of data has been received by UARTx (as selected by the SM2x bit). When the UARTx interrupt is enabled,
setting this bit causes the CPU to vector to the UARTx ISR. This bit must be cleared manually by software.
15. 15
PCON—Power Control Register
Bit Symbol Description
7 SMOD0
UART0 Baud Rate Doubler Enable
0: UART0 baud rate divide-by-two enabled.
1: UART0 baud rate divide-by-two disabled.
6 SSTAT0 UART0 Enhanced Status Mode Select
5 Reserved Read is undefined. Must write 0.
4 SMOD1
UART1 Baud Rate Doubler Enable
0: UART1 baud rate divide-by-two enabled.
1: UART1 baud rate divide-by-two disabled.
3 SSTAT1 UART1 Enhanced Status Mode Select
2 Reserved Read is undefined. Must write 0.
1 STOP
STOP Mode Select
This bit will always read ‘0’. Writing a ‘1’ will place the microcontroller
into STOP mode. (Turns off oscillator).
0 IDLE
IDLE Mode Select
This bit will always read ‘0’. Writing a ‘1’ will place the microcontroller
into IDLE mode. (Shuts off clock to CPU, but clock to Timers, Interrupts,
and all peripherals remain active).
16. 16
Using Timer 1 to Generate Baud Rate
♦ Timer 1 in mode 2 (8-bit auto-reload mode) can be used to
generate the baud rate for UART0 and UART1
Block diagram of Timer 0 in Mode 2 (8-bit Auto-reload mode)
Timer 1 is identical to Timer 0
17. 17
Baud Rate Calculations—Timer 1
♦ The Baud Rate and Timer 1 reload value (for TH1 register)
are related by the following equation:
♦ If SMODx=1 (UART Baud Rate divide-by-two disabled)
( )
−
×
×
=
−
1256
12
32
2 11
TH
SYSCLK
BaudRate
MTSMODx
( )
−
×
×
=
−
1256
12
16
1 11
TH
SYSCLK
BaudRate
MT
19. 19
Initializing the UART—Using Timer 1
void Init_UART0(void)
{
//-- Set up Timer 1 to generate the baud rate (115200)for UART0 -------
CKCON |= 0x10; //-- T1M=1; Timer 1 uses the SYSCLK 22.11845 MHz
TMOD = 0x20; //-- Timer 1 in Mode 2 (8-bit auto-reload)
TH1 = 0xF4; //-- Baudrate = 115200
TR1 = 1; //-- Start Timer 1 (TCON.6 = 1)
T2CON &= 0xCF; //-- Timer 1 overflows are used for receive
// and transmit clock. RCLK0=0 and TCLK0=0
//-- Set up UART0 -----------------------------------------------------
PCON |= 0x80; //-- SMOD0=1 (UART0 baud rate divide-by-2 disabled)
SCON0 = 0x50; //-- UART0 Mode 1, Logic level of stop bit ignored
// and Receive enabled
//-- Enable UART0 interrupt -------------------------------------------
IE |= 0x10;
IP |= 0x10; //-- Set to high priority level
RI0 = 0; //-- Clear the receive interrupt flag;
// ready to receive more
}
20. 20
Using Timer 2 to Generate Baud Rate
♦ If timer 2 (or timer 4) is used to generate the baud rate, it must be
configured for mode 2 operation (auto-reload mode)
21. 21
Baud Rate Calculations—Timer 2
♦ The baud rate and timer 2 reload value (for RCAP2 register) are related by the
following equation:
♦ If SYSCLK=22.1184 MHz and BaudRate=115200, then:
[ ]( )LRCAPHRCAP
SYSCLK
BaudRate
2,26553632 −×
=
[ ]( )
22118400
115200
32 65536 2RCAP
=
× −
( )
22118400
65536 2 6
32 115200
RCAP− = =
×
655306655362 =−=RCAP
xFFFARCAP 02 =
22. 22
Initializing the UART—Using Timer 2
void Init_UART0_T2(void)
{
//-- Set up Timer 2 to generate the Baudrate (115200) for UART0 ---
CKCON |= 0x20; //-- T2M=1; Timer 2 uses the SYSCLK 22.11845 MHz
T2CON = 0x30; //-- Timer 2 in Mode 2 (Baudrate Generation Mode)
// RCLK0=1 and TCLK0=1
RCAP2 = 0xFFFA; //-- Capture Register value for Baudrate = 115200
TR2 = 1; //-- Start Timer 2 (T2CON.2 = 1)
//-- Set up the UART0 ------------------------------------------
PCON |= 0x80; //-- SMOD0=1 (UART0 BaudRate divide-by-2 disabled)
SCON0 = 0x50; //-- UART0 Mode 1, Logic level of stop bit ignored
// and Receive enabled
//-- Enable UART0 interrupt ------------------------------------
IE |= 0x10;
IP |= 0x10; //-- Set to high priority level
RI0 = 0; //-- Clear the receive interrupt flag;
// ready to receive more
}
23. 23
Baud Rate Calculations—Timer 2
♦ If a different time base (other than SYSCLK) is required,
setting the C/T2 bit (in T2CON register) to 1 will allow the
time base to be derived from the external input pin T2
♦ In this case, the baud rate for the UART is calculated as:
♦ FCLK is the frequency of the signal supplied to timer 2 and
[RCAP2H, RCAP2L] is the 16-bit value held in the capture
registers
(65536 [ 2 , 2 ]) 16
CLKF
BaudRate
RCAP H RCAP L
=
− ×
24. 24
UARTx Interrupt Flags—Receiving Data
♦ The receive and transmit flags (RIx and TIx) in SCONx play
an important role in serial communications
♦ Both the bits are set by hardware but must be cleared by
software
♦ RIx is set at the end of character reception and indicates
“receive buffer full”
♦ This condition is tested in software (polled) or programmed
to cause an interrupt
♦ If the application wishes to input (i.e. read) a character from
the device connected to the serial port (e.g. COM1 port of
PC), it must wait until RIx is set, then clear RIx and read the
character from SBUFx
Note: x = 0 or 1 for UART0 or UART1
25. 25
UARTx Interrupt Flags—Receiving Data
void UART0_ISR(void) interrupt 4
{
//-- Pending flags RI0 (SCON0.0) and TI0(SCON0.1)
if ( RI0 == 1) //-- Interrupt caused by
{ // received byte
received_byte = SBUF0; //-- Read the input buffer
RI0 = 0; //-- Clear the flag
new_cmd_received=1;
}
if ( TI0 == 1) //-- Interrupt caused by
{ // transmitted byte
TI0 = 0; //-- Clear the flag
}
}
26. 26
UARTx Interrupt Flags—Sending Data
♦ TIx is set at the end of character transmission and indicates
“transmit buffer empty”
♦ If the application wishes to send a character to the device
connected to the serial port, it must first check that the serial
port is ready
♦ If a previous character was sent, we must wait until
transmission is finished before sending the next character
27. 27
UARTx Interrupt Flags—Sending Data
void Init_UART0(void)
{
//-- Set up Timer 1 to generate the baud rate (115200) for UART0
CKCON |= 0x10; //-- T1M=1; Timer 1 uses the
// system clock 22.11845 MHz
TMOD = 0x20; //-- Timer 1 in Mode 2 (8-bit auto-reload)
TH1 = 0xF4; //-- Baudrate = 115200
TR1 = 1; //-- Start Timer 1 (TCON.6 = 1)
T2CON &= 0xCF; //-- Timer 1 overflows are used for receive
// and transmit clock. RCLK0=0 and TCLK0=0
//-- Set up the UART0
PCON |= 0x80; //-- SMOD0=1 (UART0 baud rate divide-by-2
// disabled)
SCON0 = 0x50; //-- UART0 Mode 1, Logic level of stop bit
// ignored and Receive enabled
//-- Enable UART0 interrupt
IE |= 0x10;
RI0 = 0; //-- Clear the receive interrupt flag;
// Ready to receive more
TI0 = 1; //-- TX0 ready to transmit
}
28. 28
UARTx Interrupt Flags—Sending Data
int i,n;
char sendbuf[20]; //-- Buffer to hold string for
// transmission
n = sprintf(sendbuf, "Hello! %c", '0');
for (i=0; i<n; i++)
{
while (TI0 == 0); //-- Wait while the transmission is
// going on
TI0 = 0; //-- Clear TI0
SBUF0 = sendbuf[i]; //-- Load the serial buffer
// with the char to send
}
♦ Data transmission is initiated by writing to SBUFx
♦ The TIx transmit interrupt flag (SCONx.1) is set at the beginning of the
stop-bit time
♦ TIx bit must be cleared manually by software
&lt;number&gt;
We start this lecture by looking at the functional block diagram of the UART. We will learn how to program the UARTs and the different modes in which UARTs may be configured. We will learn how to program Timer 1 and Timer 2 to generate the baud rate. The interrupt flags for receiving and sending data will be covered.
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Asynchronous transmission is easy to implement but less efficient (i.e. slower) as it requires an extra 2-3 control bits for every 8 data bits.
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Asynchronous transmission is easy to implement but less efficient (i.e. slower) as it requires an extra 2-3 control bits for every 8 data bits.
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This diagram shows the various functional blocks of the UART. UART0 and UART1 are identical in their operation. There are two SFRs - SBUFx and SCONx – used to control and manage the serial communication.
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Even though the ‘programmer’s model” has only one Serial Port Buffer (SBUFx), there are essentially two separate and distinct hardware buffers (registers) - the transmit write-only buffer and the receive read-only register. Writing to SBUF0 sends the data out serially from the Transmit Shift register through the TX0 pin. The data received on RX0 pin is accumulated in the Receive Latch. A read of SBUF0 fetches the data from the Receive Latch.
The Serial Port Control register (SCONx) contains the status and control bits. The control bits set the operating mode for the serial port, and status bits indicate the end of the character transmission or reception. The status bits are tested in software (polling) or programmed to cause an interrupt.
&lt;number&gt;
This slide discusses the need for timers to be used with UARTs. Clock accuracy is important for proper UART communication. With a worst case scenario of tx being +2% and rx being –2%, the difference is 4%. This is still under 5%, which is the actual accuracy specified for UARTs (RS-232 specifically). If baud rates differ more than this, then the received bytes can have bit errors.
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There are no dedicated pins available for TX and RX. These must be allocated by programming the crossbar. A suitable timer needs to be programmed to generate the baud rate. Program the SCONx register to select the serial port operation mode and enable/disable UART reception. Enable UART interrupts and set priority (if desired).
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SM0x-SM1x bits in SCONx register used to configure the mode of operation. In this lecture we will discuss only the 8-Bit UART with Variable Baud Rate (Mode 1).
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The SCONx register is used to select the serial port operation mode and enable/disable UART reception. The mode of operation is configured by programming the SM0x-SM1x bits. For Mode 1 operation, set these bits to 01. TIx and RIx are the Transmit Interrupt Flag and Receive Interrupt Flag respectively.
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The baud rate doubler enable (SMODx) bit is in PCON register.
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Timer 1 can be used to generate the baudrate for UART0 and UART1 in Mode 2 (8-bit Auto-reload mode).
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This slide shows the equation used to calculate the reload value of TH1 register when Timer 1 is used to generate the baud rate. The baud rate is dependent on the value of SMODx (Baudrate doubler) bit and T1M (SYSCLK divide-by-two enable/disable) bit.
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A code segment to initialise the UART0. Uses Timer 1 to generate the baud rate.
In T2CON register, RCLK0 is set to 0 (i.e. Timer 1 overflows used for receive clock) and TCLK0 is set to 0 (i.e. Timer 1 overflows used for transmit clock).
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To generate the baudrate using Timer 2 (or Timer 4), it must be configured for Mode 2 operation (Auto-Reload Mode).
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The baud rate is dependent on SYSCLK and RCAP2 (reload value in capture register).
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A code segment to initialise the UART0. Uses Timer 2 to generate the baud rate.
In T2CON register, RCLK0 is set to 1 (i.e. Timer 2 overflows used for receive clock) and TCLK0 is set to 1 (i.e. Timer 2 overflows used for transmit clock).
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A different time base (other than SYSCLK) may be derived from the external input pin T2 to generate the baud rate.
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The Receive Interrupt and Transmit Interrupt flags (RIx and TIx) in SCONx are both set by hardware but must be cleared by software.
RIx is set at the end of character reception and indicates “receive buffer full”. This condition is tested in software (polled) or programmed to cause an interrupt.
If the application wishes to input (i.e. read) a character from the device connected to the serial port, it must wait until RIx is set (i.e. the receive buffer is full), then clear RIx flag and read the character from SBUFx.
&lt;number&gt;
A typical UART interrupt service routine is shown here. This ISR will be executed when either RI or TI flag is set, assuming that the UART interrupts have been enabled. Inside the ISR, we need to check whether the function was invoked due to RI or TI being set.
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The TIx flag is set at the end of character transmission and indicates “transmit buffer empty”. If the application wishes to send a character to the device connected to the serial port, it must first check that the serial port is ready. If a previous character was sent, we must wait until transmission is finished before sending the next character.
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In the initialisation routine, TI0 is set to logic “1”. This means the transmit buffer is empty and the UART is now ready to send data through TX0.
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Data transmission commences as soon as SBUF0 is written to. Just prior to loading the data in the SBUF0 register, clear the TI0 flag, this will indicate that transmit buffer is ‘not empty’. Subsequently poll the TI0 flag and wait for it to set to 1 (i.e. wait for the transmit buffer to become empty).
