The presentation is about USART and serial communication of pic microcontroller

1. EEE446
REAL TIME EMBEDDED SYSTEMS
LECTURE 13&14
PIC18: SERIAL COMMUNICATION; UNIVERSAL
ASYNCHRONOUS RECEIVER-TRANSMITTER (USART)
BY MUHAMMAD ZEESHAN SAEED

2. Serial versus Parallel Data Transfer
INTRODUCTION
• Computers transfer data in two ways: Parallel and Serial.
• Parallel: Eight or more data lines, few feet only, short time
• Serial: Single data line, long distance
• The PIC18 has serial communication capability built into it

3. SERIAL DATA-TRANSMISSION
0 1 1 0 0 0 0 1
The Transmitter Holding Register (8-bits)
0 1 1 0 0 0 0 1
The transmitter’s internal ‘shift’ register
clock
Software outputs a byte
of data to the THR
The bits are immediately
copied into an internal
‘shift’-register
The bits are shifted out,
one-at-a-time, in sync
with a clock-pulse
1-0-1-1-0-0-0-0-1-0
start
bit
stop
bit
data-bits
clock-pulses
trigger bit-shifts

4. PC-PC COMMUNICATION
rackmount
PC system
student
workstation
KVM cable
rackmount
PC system
student
workstation
KVM cable
‘null-modem’ serial cable
ethernet cables

5. SERIAL COMMUNICATION
• The byte of data must be converted to serial bits using a
parallel-in-serial-out shift register
• The receiving end must be a serial-in-parallel-out shift register
and pack them into a byte
• Two methods of serial data communication: Asynchronous and
Synchronous

6. TRANSMISSION MODES

7. ASYNCHRONOUS COMMUNICATION
• In the asynchronous method, each character is placed between
start and stop bits (framing)
Framing ASCII ‘A’ (41H)
LSB
MSB

8. UART
• Beforehand Knowledge
• Need to know Transmitting speed (and therefore Receiving speed)
• Need to know packet construction (# data and formatting bits)
• Packet Construction:
• Start Bit (1 bit)
• Data Bits (8-9 bits)
• 8 Data bits + Parity Bit (1 bit) …optional
• Stop Bit (1 bit)
• LSB transmit and receive first

9. PACKET FORMAT-ASCII CHARACTER ‘H’
(WITH EVEN PARITY AND ODD PARITY)

10. FULL TRANSMISSION FORMAT
(idle line) EOT ! o l l e H (idle
line)
H = 0x48 = 0b1001000
e = 0x65 = 0b1100101
l = 0x6C = 0b1101100
l = 0x6C = 0b1101100
o = 0x6F = 0b1101111
! = 0x21 = 0b0100001
EOT = 0x04 = 0b0000100 (End Of Transmission)
• Packet composition = Start Bit + 9 Data Bits [+ Parity Bit (odd parity scheme) as last Data Bit] +
Stop Bit

11. REQUIREMENT OF COMMUNICATION
EQUIPMENT
• Original purpose of the UART was for PCs to communicate via the
telephone network
• Telephones were for voice communication (analog signals) whereas
computers need so exchange discrete data (digital signals)
• Special ‘communication equipment’ was needed for doing the signal
conversions (i.e. a modulator/demodulator, or modem)
• DTE (Data Terminal Equipment): Equipment which needs service
• DCE (Data Communication Equipment): Equipment which provides
service, usually a modem

12. BITRATE AND BAUD RATE
• Bitrate or bits per second is exactly what it sounds like. If 1000 bits get
transmitted at 1000 bps, it will take exactly one second to transmit them
• Baud rate is number of actual data bits per second
• The rate at which information is transferred in a communication channel. In the serial
port context, "9600 baud" means that the serial port is capable of transferring a
maximum of 9600 data bits per second
• NRZ binary has two symbols, one for each bit 0 or 1, that represent voltage levels. In
this case, the baud or symbol rate is the same as the bit rate
• However, it’s possible to have more than two symbols per transmission interval,
whereby each symbol represents multiple bits. With more than two symbols, data is
transmitted using modulation techniques.
• For example, if the symbol rate is 4800 baud and each symbol represents two bits,
that translates into an overall bit rate of 9600 bits/s
• If N is the number of bits per symbol, then the number of required symbols is S = 2N
• Bitrate = baud rate x log2S = baud rate x 3.32 log10S

13. RS232 STANDARD
• Standard for serial comm (COM port)
• 1: -3V to -25V;
• 0: +3V to +25V
• Reason: for long distance wired line
• Input-output voltage are not TTL compatible
• So, we need MAX232/233 for voltage converter. Commonly known as
line drivers
• Connectors:
• Minimally, 3 wires: RxD, TxD, GND
• Could have 9-pin or 25-pin
DB-25
25-Pin Connector
DB-9
9-Pin Connector

14. DB-9
1
5
6
9
1
6
9
Carrier Detect
Rx data
Tx data
Data Terminal Ready
Signal Ground
Data Set Ready
Request To Send
Clear To Send
Ring Indicator
5
CD: Carrier Detect The modem asserts this signal to indicate that it successfully made its
connection to a remote device
RI: Ring Indicator The modem asserts this signal to indicate that the phone is ringing at
the other end of its connection
DSR: Data Set Ready Modem to PC
DTR: Data Terminal Ready PC to Modem
RTS: Request To Send PC is ready for the
modem to relay some received data
CLS: Clear To Send Modem is ready for
the PC to begin transmitting some data
Typical PC (DTE) to Modem Connections (DCE)

15. DB-9 NULL-MODEM CABLE CONNECTIONS
CD
RxD
TxD
GND
DSR
DTR
RTS
CTS
RI
CD
RxD
TxD
GND
DSR
DTR
RTS
CTS
RI
Data
Terminal
Equipment
Data
Terminal
Equipment
Without modem DTE
to DTE communication
connections
DB-9
Minimally only 3
connections need
RxD TxD

16. PIC18 CONNECTION TO RS232
Line driver
(a) Inside MAX232 (b) its Connection to the PIC18

17. ENHANCED USART MODULE
• The EUSART can be configured in the following modes:
• Asynchronous (full-duplex) with:
- Auto-wake-up on Break signal
- Auto-baud calibration
- 12-bit Break character transmission
• Synchronous – Master (half-duplex) with selectable clock polarity
• Synchronous – Slave (half-duplex) with selectable clock polarity
• The pins of the Enhanced USART are multiplexed with PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT/SDO as an EUSART:
• SPEN bit (RCSTA<7>) must be set (= 1)
• TRISC<7> bit must be set (= 1)
• TRISC<6> bit must be set (= 1)
• The operation of the Enhanced USART module is controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)

18. REGISTERS
• TXSTA
• RCSTA
• BAUDCON
• SPBRG
• TXREG
• RCREG
• PIR1

19. TXSTA: TRANSMIT
STATUS AND
CONTROL REGISTER

20. RCSTA: RECEIVE
STATUS AND
CONTROL REGISTER

21. BAUDCON: BAUD
RATE CONTROL
REGISTER

22. PIR1 (PERIPHERAL INTERRUPT REQUEST
REGISTER 1)

23. BAUD RATE GENERATOR (BRG)
• A dedicated 8-bit, or 16-bit, generator that supports both the Asynchronous and Synchronous modes
of the EUSART
• By default, the BRG operates in 8-bit mode. Setting the BRG16 bit (BAUDCON<3>) selects 16-bit
mode
• The SPBRGH:SPBRG register pair controls the period of a free-running timer
• In Asynchronous mode, bits, BRGH (TXSTA<2>) and BRG16 (BAUDCON<3>), control the baud rate
• BAUD RATE FORMULAS
• Given the desired baud rate and FOSC, the nearest integer value for the SPBRGH:SPBRG registers can be calculated
using the following formulas
• It may be advantageous to use the high baud rate (BRGH = 1), or the 16-bit BRG to reduce the baud rate error,
or achieve a slow baud rate for a fast oscillator frequency.

24. SPBRG REGISTER AND BAUD RATE IN THE
PIC18
•The baud rate in is
programmable
•loaded into the
SPBRG
•decides the baud
rate
•8-Bit mode formula
Desired Baud Rate = Fosc
64*(n+1)(
Standard
Baud
Rates
SPBRG
(Hex Value)
38400 3
19200 7
9600 F
4800 20
2400 40
1200 81
*For XTAL = 10MHz only!

25. CALCULATING BAUD RATE ERROR

26. PROGRAMMING TO TRANSMIT
1. TXSTA register = 20H: Indicating
asynchronous mode with 8-bit data frame,
low baud rate and transmit enabled
2. Set Tx pin an output (RC6)
3. Loaded SPBRG for baud rate
4. Enabled the serial port (SPEN = 1 in RCSTA)
5. The character byte to transmit must be
written into TXREG
6. Keep Monitor TXIF bit
7. To transmit next character, go to step 5

27. PROGRAMMING TO RECEIVE
1. RCSTA register = 90H: To enable the
continuous receive in addition to the 8-
bit data size option
2. The TXSTA register = 00H: To choose
the low baud rate option
3. Loaded SPBRG for baud rate
4. Set Rx pin an input
5. Keep Monitor RCIF bit
6. Move RCREG into a safe place

28. SIMPLIFIED USART TRANSMIT BLOCK
DIAGRAM

29. EXAMPLE 1

30. EXAMPLE 2

31. EXAMPLE 3

32. EXAMPLE 4

33. EXAMPLE 5