single phase half bridge inverter, full bridge inverter, parallel inverter, load commutated inverter with working and waveforms. download and watch the animations. it will be effective. single phase bridge inverter harmonic analysis.

2. *Contents
1. Introduction
2. 1-ph Half Bridge inverter
3. 1-ph Full Bridge inverter
4. Harmonic Analysis
5. Basic Series inverter
6. 1-ph Parallel inverter

3. *DC to AC power at desired output voltage and frequency.
*Classification based on Nature of source: Voltage Fed Inverter
(VFI or VSI) and Current Fed Inverter (CFI or CSI).
*VSI - negligibly small source impedance so terminal voltage
remains substantially constant for variations in load.
*Short circuit causes current to rise instantaneously due to less
time constant and current should be interrupted by Fast Acting
Fuses.
*CSI - supplies with controlled current from a DC source with
large impedance.
*Typically a rectifier feeds the inverter with a regulated current
through large series inductor.
*Introduction

4. *Classification based on wave shape of output:
Square wave inverter
Quasi Square wave inverter
Pulse Width Modulated inverter
*Introduction

5. * 1-ph Half Bridge Inverter

6. LOAD
Vs/2
Vs/2
S1
S2 D2
D1
+- V0I0
Is1
Is2
*Schematic

7. LOAD
Vs/2
Vs/2
S1
S2 D2
D1
+- V0I0
Is1
Mode1: S1-ON, V0 is +ve, Io is +ve, Is1 is +ve. Load takes power from source; VT2=Vs
, VD1=0V, VD2= -Vs.
Mode 2: S1-OFF, D2 ON;V0 is -ve, Io is +ve, Is2 is –ve; Load delivers power to
source,VT1=Vs, VT2=0V, VD1=-Vs.
Mode 3: S2-ON, V0 is -ve, Io is -ve, Is2 is +ve. Load takes power from source;
VT1=Vs, VD1= -Vs, VD2=0V.
Mode 4: S2-OFF, D1 ON;V0 is +ve, Io is -ve, Is1 is –ve; Load delivers power to
source,V =0V, V =V , V =-V .
Is2

8. LOAD
Vs/2
Vs/2
S1
S2 D2
D1
+- V0I0
Is1
Mode1: S1-ON, V0 is +ve, Io is +ve, Is1 is +ve. Load takes power from source; VT2=Vs
, VD1=0V, VD2= -Vs.
Mode 2: S1-OFF, D2 ON;V0 is -ve, Io is +ve, Is2 is –ve; Load delivers power to
source,VT1=Vs, VT2=0V, VD1=-Vs.
Mode 3: S2-ON, V0 is -ve, Io is -ve, Is2 is +ve. Load takes power from source;
VT1=Vs, VD1= -Vs, VD2=0V.
Mode 4: S2-OFF, D1 ON;V0 is +ve, Io is -ve, Is1 is –ve; Load delivers power to
source,V =0V, V =V , V =-V .
Is2

9. t1 t2 t3 t5 t6t4
Vo,i0
iS1
t
iS2
iD1
iD2
t
t
t
is
+Vs/2
T/2 T
* Waveforms
S1 D2 S2 D1 S1 D2 S2 D1
Is1 Is2
-Vs/2

10. *1-ph Full Bridge Inverter

11. RL-LOAD
I0
V0
T1
T3 T2
T4D1
D3 D2
D4
Vs
*Schematic

12. *4 Modes of operation:
1. Thyristors 1,2 in ON.
2. Diodes 3,4 in conduction.
3. Thyristors 3,4 in ON.
4. Diodes 1,2 in conduction.

13. RL-LOAD
T1
T3 T2
T4D1
D3 D2
D4
Vs
MODE 1: T1, T2 ON, SOURCE DELIVERING POWER TO LOAD – Vo +ve, Io +ve.
MODE 2: FREE WHEELING INTERVAL, LOAD DELIVERING POWER TO SOURCE
THROUGH D3, D4 – Vo –ve, Io +ve.
MODE 3: T3, T4 ON, SOURCE DELIVERING POWER TO LOAD, Vo –ve, Io –ve.
MODE 4: FREE WHEELING INTERVAL, LOAD DELIVERING POWER TO SOURCE
THROUGH D1, D2 – Vo +ve, Io –ve.

14. RL-LOAD
I0
V0
T1
T3 T2
T4D1
D3 D2
D4
Vs
MODE 1: T1, T2 ON, SOURCE DELIVERING POWER TO LOAD – Vo +ve, Io +ve.
MODE 2: FREE WHEELING INTERVAL, LOAD DELIVERING POWER TO SOURCE
THROUGH D3, D4 – Vo –ve, Io +ve.
MODE 3: T3, T4 ON, SOURCE DELIVERING POWER TO LOAD, Vo –ve, Io –ve.
MODE 4: FREE WHEELING INTERVAL, LOAD DELIVERING POWER TO SOURCE
THROUGH D1, D2 – Vo +ve, Io –ve.

15. t1 t2 t3 t5 t6t4
Vo,i0
iS1, iS2
t
iS3, iS4
iD1, iD2
iD3, iD4
t
t
t
is
+Vs
T/2 T
* Waveforms

16. *T1, T2 are made ON at t=t1 sec (decided by the load angle
: tan-1(X/R) of the load.
*At t=t2, SCRs are force-commutated to OFF which results in
free-wheeling of current to source.
*T3, T4 are made ON at t=t3 sec.
*At t=t4, SCRs are force-commutated to OFF resulting in a
free-wheeling action of current to source by the diodes.
*The switching action here employed is Zero Current
Switching (ZCS) during turn-on.
*For a pure inductive load, T1, T2 are to be fired at t=T/4
instant due to the nature of the inductor current lagging
the supply voltage by 900 ( half of an half cycle).

17. *Harmonic Analysis

18. V
o
T/2 T
t
Fundamental
component
of voltage
Fundamental
component
of current
φ
*Harmonic Analysis with RL
load(say):
 
 
0a
02sinsin0sinsin
2
2
;2
2
sin
2
sin)0(sin
2
sin
2
coscos
2
sincos
2
)(
0
0
0
2/
2/
0
0
...3,2,1
0
0





















 














dc
dc
T
T
dc
T
dc
n
nn
V
a
f
T
as
T
TT
T
V
a
tdtVdttV
T
a
tnbtna
a
tv

19. * Contd.,
 
 
 
er.dge invert- half brif ain case o
nπ
V
-φφfullfor ant Volts
n
4V
tv
n
V
For
bnFor
n
n
V
b
nnn
n
V
b
Tn
T
n
T
n
Tn
V
b
dttnVdttnV
T
b
a
nnn
n
V
a
T
f
T
nTn
T
n
Tn
V
a
dttnVdttnV
T
a
dc
n
dc
dc
n
dc
n
dc
n
dc
n
T T
T
dcdcn
n
dc
n
dc
n
T T
T
dcdcn
1
2
inverterbridge1....sin)(
4
.b1,3,5,....n
;0,....6,4,2
cos22
2coscoscos1
2
2
cos
2
cos
2
cos0cos
2
sinsin
2
0
0sin2sin0sin
2
2
2
2
2
sinsin0sin
2
sin
2
coscos
2
*
..5,3,1
*
0
n
2/
0 2/
2/
0 2/

 
 



































 
























 

















20. * Contd.,
rature.e in tempeing to risheat leadsipated asand is dis
eful workdoes no usc currentth harmoniociated wipower assThe output
.plicationsof the aprk in mostuseful wor does theental poweThe fundam
rrentof load cucomponentndamentalis the fuwhere IRIP
given bypower isental loadThe fundam
rad
R
X
and
fnya frequencedance atis the impXnRwhere
tn
Zn
V
i
n bynt is giveload curre
n
n
n
dc
.
tan
.Z,
Amps)sin(
.
4
01
2
0101
1
n
222
n
..5,3,1
0


















21. *Harmonics are unwanted components of frequency other than
fundamental frequency component.
*A square wave output voltage will have odd numbered harmonics and the
3rd harmonic being dominant.
*To eliminate harmonics, filters are designed and PWM schemes are
employed.
*As the filtering components’ size (size of L and C) mainly depend upon
frequency in a inverse proportional relation, designing of filters are
suitable for removing higher frequency components as the size of the
filter reduces with increasing frequency.
*The lower order frequencies especially 3rd, 5th, 7th, 9th,etc could be
removed by employing pulse width modulation schemes such as single
pulse modulation, multiple pulse and sinusoidal pulse modulations etc.

22. *Basic Series Inverter

23. *Inverters in which commutating components are
permanently connected in series with the load are
called Series Inverters.
*Also called Load commutated inverters of self
commutated inverters and operate at 200Hz to
100kHz.

24. T1
T2
L
C
R
L
O
A
DIO
Vs
*Schematic
* The circuit should be under-damped always.

25. T1
T2
L
C
R
L
O
A
D
Vs
* Mode-1: T1 is made ON with T2 in OFF. Cap charges to Vs+Vco with left
plate +ve, current naturally comes to zero and T1 OFFs. Hence load current
is +ve.
* Mode-3: T2 is made ON, cap discharges through T2, load, L. So load current
is –ve.

26. T1
T2
L
C
R
L
O
A
D
Vs

27. Ig
Io
VL
Vc
Ig1
Ig2
t
t
t
t
t1 t2 t3 t4
t5 t6
T1 off
T2 off
* Waveforms
T/2 Toff
Vdc+Vc

28. *Mode-I: During ON period of T1 with T2 in OFF, let the cap
has an initial voltage of Vco, then,
  
 )cos()(
)cos()(
)sin()(
)(
2
1
2
1
2
,
1
1
)(
1
tan
122
22
22
2
0
22






















































tktand
wheret
dt
di
Lt
and
t
L
ti
sL
sI
j
L
R
LC
j
L
R
s
LCL
R
dampedunderiscircuittheAs
LC
s
L
R
L
LCsRCs
Cs
s
sI
VVidt
Cdt
di
LRi
v
e
VV
v
e
VV
VV
s
VV
VV
c
tcos
L
tcos
cos
co
cos
cos

29. *Mode-2: During this mode, both the SCRs are in OFF
state, with capacitor holding its voltage and inductor
voltage is zero.
*Mode-3: During this mode, T2 is made ON and cap
discharges through L and R. Nature of current is the
same as that obtained in Mode-1.

30. *Single phase Parallel Inverter

31. Vdc
Is
is
vc
+
-
T1
T2
i0
+
-
vo
N1 N2
+
-
v1ic
iT1
iT2
*Schematic

32. Vdc
Is
Vc=2Vs
+
-
T1
T2
i0
+
-
vo
iT1
iT2
* MODE-1 – Assumed that cap has initial voltage of +2Vs with upper plate +ve. T1
is ON, load current is +ve by dot convention. It can be seen that T2 is in forward
blocking state due to T1 (short circuited T1).
* Cap will be charged to 2Vs because of
the two halves of the primary
winding linking the same flux.

33. Vdc
Is
2Vs to 0 +
-
T1
T2
i0
+
-
vo
ic
iT1
iT2
* MODE-2 – T2 is turned ON due to which T1 is driven to OFF as it is RB by cap
voltage 2Vs. Cap now discharges to 0 upto which load current is +ve assuming
cap current > source current and by dot convention.

34. Vdc
Is
Vc=-2Vs
T1
T2
i0
+
-
vo
iT1
iT2
+
-
* MODE-3 – Cap has been charged to -2Vs with lower plate +ve. T2 is in ON state
and load current is –ve by dot convention. It can be seen that T1 is in forward
blocking state due to T2 ( Short circuited T2).

35. Vdc
Is
-2Vs to 0
+
-
T1
T2
i0
+
-
vo
ic
iT1
iT2
* MODE-4 – T1 is turned ON due to which T2 is driven to OFF as it is RB by cap
voltage -2Vs. Cap now discharges to 0 upto which load current is -ve assuming
cap current > source current and by dot convention.

36. Vdc
Is
Vc=2Vs
+
-
T1
T2
i0
+
-
vo
iT1
iT2
* Cap has been charged to +2Vs with upper plate +ve. T1 is in ON state, load
current is +ve by dot convention. It can be seen that T2 is in forward blocking
state due to T1 (short circuited T1). Again MODE-1 prevails.

37. Ig
Vc
VT!
Vo
Ic,iT1
Ig2
Ig1 Ig2
t
t
t
t
t
-Vs
-2Vs
Vs
2Vs
2Vs
Io
I II III IV I
* Waveforms