The document describes the design of a FIFO (first-in first-out) buffer. It explains the FIFO interface, protocol, datapath and control path. The FIFO uses a read and write pointer to control reading and writing of data to an internal memory buffer. Status signals like full and empty are generated by comparing the read and write pointers. The design aims to ensure reliable operation by following the specified protocol of not allowing a write when full or a read when empty.

1. FIFO Design
Aditya Mittal

2. Objective
• Use Design Framework
• Request/Grant Handshake
• Valid/Busy Handshake
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3. FIFO Interface
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4. FIFO Protocol
• FIFO not guaranteed to work if protocol
violated
• Write Data qualified by Push
• Read Data validated by !Empty
• Should not Push when Full
• Should not Pop when Empty
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5. FIFO Protocol
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6. FIFO Datapath
• Input Data (bus)
• Output Data (bus)
• Data Store (memory /flop array)
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7. FIFO Datapath
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8. FIFO Control Path
• Data Path Control
– Write Control
– Read Control
• Flow Control
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9. FIFO Write Control
• Write Pointer: Next memory address to
write
• Convention: Push causes write pointer to
move to next location
• Decode of write pointer enables memory
locations
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10. FIFO Read Control
• Read Pointer: Next memory address to
read
• Convention: Pop causes read pointer to
move to next location
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11. FIFO Read/Write
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12. FIFO Flow Control
• Write Interface: Full signal
• Read Interface: Empty signal
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14. FIFO Full Generation
• Full Condition: Both pointers are pointing
to same location
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15. FIFO Empty Generation
• Empty Condition: Both pointers are
pointing to same location
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16. Pointer Wrap State
• Set wrap bit every time pointer “wraps
around” the max value
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17. FIFO Full/Empty
Conditions
• Full when pointer values are same and
wrap states are different
• Empty when pointer values are same and
wrap states are same
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