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Arrow Devices MIPI MPHY Verification IP Solution
The document describes Arrow Devices' MIPI MPHY "CheckMate" Verification IP. It provides an overview of the MPHY system and verification requirements. It then details the features of Arrow's verification solution, including a UVM testbench with constrained random and compliance tests, an assertion checker, error injection capabilities, and debugging features. A customer testimonial praises the solution for its ease of use and ability to find design issues.
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Arrow Devices MIPI MPHY Verification IP Solution
- 1. MIPI MPHY “Checkmate”Verification IP An Introduction Nov 2014 CheckMate VIPs Verification Conquered.
- 2. Introduction 2 “Easyto Use” “Catches tricky corner cases” “Provides complete comprehensive test coverage” These are some of the things being said by our customers about our MIPI MPHY Verification IP Solution. Our MIPI MPHY Verification IP Solution has been adopted by many top SoC/IP companies. In the coming slides, we talk about the major aspects of our mature MIPI MPHY Verification Solution.
- 3. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Assertion Checker Monitor - BFM Capabilities & Architecture - Error injection capabilities ▪ Customer Testimonial Contents - Test bench Capabilities & Architecture - Debugging Features ▪ Youtube Demo Video
- 4. 4 MIPI MPHYSystem Overview
- 5. 5 MIPI MPHYMTX Overview
- 6. 6 MIPI MPHYMTX FSM Overview
- 7. MIPI MPHY MRXOverview Arrow Devices Confidential 7
- 8. 8 MIPI MPHYMRX FSM Overview
- 9. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 10. MPHY DUT Verification Requirements 1. FSM transition 2. Error Scenarios 3. OMC Verification 4. HS Mode operation (Gears 1-3, Series A/B) 5. LS Mode operation (Gears 0-7) 6. Type-1/Type-2 operation 7. Register (Shadow and Effective) Read/Write 8. Reset Verification (Power ON Reset and Line Reset) 9. Line Encoding (8B10B) 10. Line Signaling (PWM and NRZ) 11. Clock and Data Recovery 8. Loop back mode (near, far, digital) 9. Parameterized RMMI Data Interface Width(10, 20, 40) 10
- 11. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 12. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 13. MPHY Test-Bench Capabilities Standard UVM compliant test-bench Built-in Constrained Random and Compliance Test Suites Assertion Checker/Monitor for protocol checks Built-in property based compliance coverage RMMI level Score Board for Data integrity Checks Sequences to generate bursts random Data Sequences to generate Line reset, Register read/writes, speed & gear changes Sequences to exercise the MTX and MRX State machines Supports Loopback Mode verification 13
- 14. MPHY UVM TestBench 14 MPHY_DUT_TX_LANE_Driver M-PHY TX RMMI CNTL RMMI DATA BFM DUT M-PHY RX RMMI CNTL RMMI DATA M-PHY RX RMMI CNTL RMMI DATA M-PHY TX RMMI CNTL RMMI DATA DP DN DP DN MPHY_DUT_TX _ RMMI_Driver MPHY_TX_CMD_DATA_ Sequencer SCORE BOARD MPHY_DUT_RX _ RMMI_Driver MPHY_BFM_RX _RMMI_Driver MPHY_BFM_TX _RMMI_Driver MPHY_DUT_RX_LANE_Driver MPHY_RX_CMD_DATA_ Sequencer M-PHY TB ENVIRONMENT Global Objects MPHY_TB_State MPHY_TB_Config Assertion Checker Monitor
- 15. MPHY Test-suite •Combination of Directed Compliance and Constrained Random - Simple Data Transfer - FSM Transitions - Register read/write - Reset - Error Injection - Jitter/PPM injection 15
- 16. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 17. 17 MPHY AssertionChecker Monitor RX Registers Model RX FSM Model RX Register Handler RX SV Assertions MPHY TX DUT RMMI Tx Cntrl Intf TX DP TX DN TX Registers Model TX FSM Model TX Register Handler TX SV Assertions RMMI Tx Data Intf MPHY RX DUT MTX Checker Monitor RMMI Rx Cntrl Intf RMMI Rx Data Intf MRX Checker Monitor RX DP RX DN
- 18. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 19. MPHY BFM Capabilities Supports MPHY v2.0, MPHY v3.0 , MPHY v3.1 Support for LS (PWM) and HS Mode Support for all PWM gears(0-7) and all HS(1-3)gears Supports both series A, B Supports OMC Capabilities Support for 10, 20 and 40 Data width interface Support for programmable sync and Prepare length Support for bypassing 8b10b Encoding Support for Jitter and PPM testing (RX and TX) Support for Dithering Support for inverted driver polarity Built in Error injection Events for synchronization with Test-bench Pure SystemVerilog – No Language/Methodology translators 19
- 20. MPHY BFM -MTX Architecture 20 TX_FSM RMMI Data Intf Logic 8b10 Encoding PWM NRZ DP DN RMMI Ctrl Intf RMMI Data Intf Serial Intf TX RMMI Cntrl Interface handler TX Config
- 21. MPHY BFM -MRX Architecture 21 RX_FSM RMMI Data Intf Logic 8b10 Decoding DP DN Symbol Clk Generation PWM NRZ Data and clk recovery RMMI Ctrl Intf RMMI Data Intf Serial Intf RMMI RX Cntrl Intf Handler RX Config
- 22. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - MPHY Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - MPHY BFM Capabilities & Architecture ▪ Youtube Demo Video
- 23. Error injection capabilities • Spec defined errors • 3b4b Encoding Error (Data/Control Symbols) • 5b6b Encoding Error (Data/Control Symbols) • Running Disparity Error • Reserved symbol Error • Non Spec defined errors • Bit Add and Bit Drop on Line • MK0 Corruption • TOB Corruption • Timing Error (Line reset ,Prepare, Sync length) 23
- 24. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 25. MPHY State TransitionDebug with our inhouse PDA Debug Tool • Makes debug easier by presenting state machine states and transitions along with conditions that caused state transition • Each column is a state machine with states, transitions and state change conditions listed in time order 25
- 26. MPHY Symbol andControl Debug with our PDA Debug Tool 26
- 27. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 28. Customer Testimonial "Ourteam at Mixel used Arrow Devices' MIPI MPHY VIP to validate our Type-I MPHY design. The VIP is easy to use and provides complete comprehensive test coverage for MPHY. With approximately ~300 tests (directed compliance as well as constrained random tests), the VIP helped us catch tricky corner case issues in our design. After verifying our design with Arrow Devices VIP, we are much more confident about our MPHY design to be risk free and standard compliant. We found Arrow Devices team very helpful, committed and, easy to work with. It provided excellent support throughout the verification phase.Overall, working with Arrow Devices has been very good and useful experience." Anupama Dikhit, Senior Design Engineer, Mixel
- 29. Before You Leave… 29 Check out our other MIPI and JEDEC VIPs • MIPI Unipro Verification IP • MIPI CSI-3 Verification IP • JEDEC UFS Device Verification IP • JEDEC UFS Host Verification IP
- 30. ▪ MPHY SystemOverview ▪ MPHY DUT Verification Requirements ▪ Arrow Devices’ MPHY “CheckMate” Verification IP - Test Bench Capabilities & Architecture - Assertion Checker Monitor - Error Injection Capabilities - Debugging Features ▪ Customer Testimonial Contents - BFM Capabilities & Architecture ▪ Youtube Demo Video
- 31. Before You Leave… 31 Also Check Out Our Youtube Demo Video for MIPI MPHY Verification IP Solution!
- 32. Thank You 32 Download Product Brochure Now! For more information Contact Us!