This document summarizes a research paper that proposes a new low-power full adder cell design using carbon nanotube field-effect transistors (CNTFETs) in 32 nanometer technology. Simulation results show that the design, which uses 24 CNTFETs, reduces power consumption compared to previous CNTFET full adder designs. The power and power-delay product increase with supply voltage but are largely unaffected by temperature. Compared to previous designs, the proposed cell has lower power, delay, and power-delay product, especially at 0.65V supply voltage, demonstrating its improved energy efficiency.