This document provides information about a digital signal processing laboratory manual, including:
- An index listing 12 experiments covering topics like DSP chip architecture, linear and circular convolution, FIR and IIR filter design, FFT implementation, frequency response analysis, and power spectral density computation.
- General instructions for successfully completing experiments within the 3-hour laboratory period and guidance for laboratory reports.
- Procedures for working with MATLAB and Code Composer Studio software to execute experiments and programs on a DSP processor.
- An introduction to digital signal processors and an overview of the architecture of the TMS320C67xx DSP chip used, including its CPU, memory, peripherals, and advanced parallel processing capabilities
Salient Features:
The magnitude response is nearly constant(equal to 1) at lower frequencies
There are no ripples in passband and stop band
The maximum gain occurs at Ω=0 and it is H(Ω)=1
The magnitude response is monotonically decreasing
As the order of the filter ‘N’ increases, the response of the filter is more close to the ideal response
Salient Features:
The magnitude response is nearly constant(equal to 1) at lower frequencies
There are no ripples in passband and stop band
The maximum gain occurs at Ω=0 and it is H(Ω)=1
The magnitude response is monotonically decreasing
As the order of the filter ‘N’ increases, the response of the filter is more close to the ideal response
Using Chebyshev filter design, there are two sub groups,
Type-I Chebyshev Filter
Type-II Chebyshev Filter
The major difference between butterworth and chebyshev filter is that the poles of butterworth filter lie on the circle while the poles of chebyshev filter lie on ellipse.
The Presentation includes Basics of Non - Uniform Quantization, Companding and different Pulse Code Modulation Techniques. Comparison of Various PCM techniques is done considering various Parameters in Communication Systems.
Objective of Pulse Code Modulation
Block Diagram of PCM
Process of PCM
Sampling
Quantization
Encoding
PCM Standards
Bit Rate and Bandwidth in PCM
Advantages and Disadvantages of PCM
Applications of PCM
IMAGE CAPTURE, PROCESSING AND TRANSFER VIA ETHERNET UNDER CONTROL OF MATLAB G...Christopher Diamantopoulos
This implemented DSP system utilizes TCP socket communication. Upon message reception, it decides the appropriate process to be executed based on cases which can be categorized as follows:
1) image capture
2) image transfer
3) image processing
4) sensor calibration
A user-friendly MATLAB GUI, named DIPeth, facilitates the system's control.
EELE 5331 Digital ASIC DesignLab ManualDr. Yushi Zhou.docxtoltonkendal
EELE 5331: Digital ASIC Design
Lab Manual
Dr. Yushi Zhou
Department of Electrical Engineering
Lakehead University
Thunder Bay, Ontario, Canada
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 MOSFET Devices and Layout Tutorial . . . . . . . . . . . . . 4
2.1 Prepare For Schematic . . . . . . . . . . . . . . . . . . 4
2.2 Perform Simulation . . . . . . . . . . . . . . . . . . . . 7
2.3 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.4 Layout Veri�cation . . . . . . . . . . . . . . . . . . . . 17
2.5 Report . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.6 How to understand DRC error report . . . . . . . . . . 26
3 CMOS Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.1 Design speci�cations . . . . . . . . . . . . . . . . . . . 27
3.2 Lab Procedure . . . . . . . . . . . . . . . . . . . . . . 29
3.3 Report . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1
EELE5331:Digital ASIC Design [email protected]
1 Introduction
This lab manual is an essential components of EELE5331: Digital ASIC
Design, o�ered by Dr. Yushi Zhou. The lab works consists of schematic
entry, symbol generation, pre-layout simulation, layout, physical and logic
veri�cation, extraction and post-layout simulation for the design. All the
students are required to submit individual lab report before the deadline.
All reports must be typed and professionally prepared. The content that
needs to be included in the report are given at the end of each lab. There
are total three labs, and each part will be released before the lab starts.
• Lab 1: MOSFET devices and layout tutorial
• Lab 2: CMOS Inverter
• Lab 3: CMOS Digital Logic Circuits
It should be noted that the students are not limited to the assigned lab
time, which may not be enough to complete the lab. Students are expected
to work on the lab during their free time if that case is required. You may
use remote log-in to complete the labs.
TSMC CMOS 180 nm technology process design kit (PDK) is a 1-Poly,
6-Metal technology, with a maximum supply voltage of 1.8 V for thin oxide
devices and 3.3 V for thick oxide devices. This process is suitable for design-
ing analog, digital, RF and mixed-signal circuits and systems. In this course,
all the labs are designed based upon CMOS 180 nm process. The computer-
aided design (CAD) tools that are adopted in this course are from Cadence
Design Systems for the purpose of schematic entry, simulation, implemen-
tation and veri�cation. The Cadence custom IC design platform provides
a graphical interface for various stages in the design �ow. An overview of
the design �ow and which tools are involved in each stage is shown in Fig.1.
As you may notice that there are loops, indicating iterative procedures. For
instance, if the physical layout does not pass design rules check or LVS check,
Page 2
EELE5331:Digital ASIC Design [email protected]
the modi�cation of.
Using Chebyshev filter design, there are two sub groups,
Type-I Chebyshev Filter
Type-II Chebyshev Filter
The major difference between butterworth and chebyshev filter is that the poles of butterworth filter lie on the circle while the poles of chebyshev filter lie on ellipse.
The Presentation includes Basics of Non - Uniform Quantization, Companding and different Pulse Code Modulation Techniques. Comparison of Various PCM techniques is done considering various Parameters in Communication Systems.
Objective of Pulse Code Modulation
Block Diagram of PCM
Process of PCM
Sampling
Quantization
Encoding
PCM Standards
Bit Rate and Bandwidth in PCM
Advantages and Disadvantages of PCM
Applications of PCM
IMAGE CAPTURE, PROCESSING AND TRANSFER VIA ETHERNET UNDER CONTROL OF MATLAB G...Christopher Diamantopoulos
This implemented DSP system utilizes TCP socket communication. Upon message reception, it decides the appropriate process to be executed based on cases which can be categorized as follows:
1) image capture
2) image transfer
3) image processing
4) sensor calibration
A user-friendly MATLAB GUI, named DIPeth, facilitates the system's control.
EELE 5331 Digital ASIC DesignLab ManualDr. Yushi Zhou.docxtoltonkendal
EELE 5331: Digital ASIC Design
Lab Manual
Dr. Yushi Zhou
Department of Electrical Engineering
Lakehead University
Thunder Bay, Ontario, Canada
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 MOSFET Devices and Layout Tutorial . . . . . . . . . . . . . 4
2.1 Prepare For Schematic . . . . . . . . . . . . . . . . . . 4
2.2 Perform Simulation . . . . . . . . . . . . . . . . . . . . 7
2.3 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.4 Layout Veri�cation . . . . . . . . . . . . . . . . . . . . 17
2.5 Report . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.6 How to understand DRC error report . . . . . . . . . . 26
3 CMOS Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.1 Design speci�cations . . . . . . . . . . . . . . . . . . . 27
3.2 Lab Procedure . . . . . . . . . . . . . . . . . . . . . . 29
3.3 Report . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1
EELE5331:Digital ASIC Design [email protected]
1 Introduction
This lab manual is an essential components of EELE5331: Digital ASIC
Design, o�ered by Dr. Yushi Zhou. The lab works consists of schematic
entry, symbol generation, pre-layout simulation, layout, physical and logic
veri�cation, extraction and post-layout simulation for the design. All the
students are required to submit individual lab report before the deadline.
All reports must be typed and professionally prepared. The content that
needs to be included in the report are given at the end of each lab. There
are total three labs, and each part will be released before the lab starts.
• Lab 1: MOSFET devices and layout tutorial
• Lab 2: CMOS Inverter
• Lab 3: CMOS Digital Logic Circuits
It should be noted that the students are not limited to the assigned lab
time, which may not be enough to complete the lab. Students are expected
to work on the lab during their free time if that case is required. You may
use remote log-in to complete the labs.
TSMC CMOS 180 nm technology process design kit (PDK) is a 1-Poly,
6-Metal technology, with a maximum supply voltage of 1.8 V for thin oxide
devices and 3.3 V for thick oxide devices. This process is suitable for design-
ing analog, digital, RF and mixed-signal circuits and systems. In this course,
all the labs are designed based upon CMOS 180 nm process. The computer-
aided design (CAD) tools that are adopted in this course are from Cadence
Design Systems for the purpose of schematic entry, simulation, implemen-
tation and veri�cation. The Cadence custom IC design platform provides
a graphical interface for various stages in the design �ow. An overview of
the design �ow and which tools are involved in each stage is shown in Fig.1.
As you may notice that there are loops, indicating iterative procedures. For
instance, if the physical layout does not pass design rules check or LVS check,
Page 2
EELE5331:Digital ASIC Design [email protected]
the modi�cation of.
The increasing demand for computing power in fields such as biology, finance, machine learning is pushing the adoption of reconfigurable hardware in order to keep up with the required performance level at a sustainable power consumption. Within this context, FPGA devices represent an interesting solution as they combine the benefits of power efficiency, performance and flexibility. Nevertheless, the steep learning curve and experience needed to develop efficient FPGA-based systems represents one of the main limiting factor for a broad utilization of such devices.
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ile-CDS is a 3D deterministic propagation tool with unlimited potential in areas such as; RF characterization of specific regions, wireless protocol evaluation and military applications. Its internal engine is based on ray-tracing technology and the code is fully parallelized, specially designed for 4G/5G Simulation (e.g. LTE or mmW)
We leave in the era where the atomic building elements of silicon computers, e.g., transistors and wires, are no longer visible using traditional optical microscopes and their sizes are measured in just tens of Angstroms. In addition, power dissipation per unit volume is bounded by the laws of Physics that all resulted among others in stagnating processor clock frequencies. Adding more and more processor cores that perform simpler and simpler tasks in an attempt to efficiently fill the available on-chip area seems to be the current trend taken by the Industry.
This article proposes a closer-to-metal approach of RTL inspection in microprocessor
design for use in education, engineering, and research. Signals of interest are tapped
throughout the microprocessor hierarchical design and are then output to the top-level
entity and finally displayed to a VGA monitor. Input clock signal can be fed as slow as
one wish to trace or debug the microprocessor being designed. An FPGA development
board, along with its accompanying software package, is used as the design and
test platform. The use of VHDL commands ’type’ and ’record’ in the hierarchy
provides key ingredients in the overall design, since this allows simple, clean, and
tractable code. The method is tested on MIPS single-cycle microprocessor blueprint.
The result shows that the technique produces more consistent display of the true
contents of registers, ALU input/output signals, and other wires – compared to the
standard, widely-used simulation method. This approach is expected to increase
confidence in students and designers since the reported signals’ values are the true
values. Its use is not limited to the development of microprocessors; every FPGAbased
digital design can benefit from it.
This study paper portrays a fresh approach for
a course and laboratory design to establish low cost prototypes
and other entrenched devices that accentuate virtual
programmable logic device (VPLD), object oriented java and
real time processing tactics. JAVA is used for software
development. The study encompasses the use of host and node
application. A high performance, low power AVR with high
endurance non-volatile memory segments and with an advance
RISC structure is used to construct prototypes. The paperwork
deals with the VPLD board which is capable to work as
corresponding digital logic analyzer, equation parser, standard
digital IC and design wave studio
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Palestine last event orientationfvgnh .pptxRaedMohamed3
An EFL lesson about the current events in Palestine. It is intended to be for intermediate students who wish to increase their listening skills through a short lesson in power point.
The Roman Empire A Historical Colossus.pdfkaushalkr1407
The Roman Empire, a vast and enduring power, stands as one of history's most remarkable civilizations, leaving an indelible imprint on the world. It emerged from the Roman Republic, transitioning into an imperial powerhouse under the leadership of Augustus Caesar in 27 BCE. This transformation marked the beginning of an era defined by unprecedented territorial expansion, architectural marvels, and profound cultural influence.
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Under Augustus, the empire experienced the Pax Romana, a 200-year period of relative peace and stability. Augustus reformed the military, established efficient administrative systems, and initiated grand construction projects. The empire's borders expanded, encompassing territories from Britain to Egypt and from Spain to the Euphrates. Roman legions, renowned for their discipline and engineering prowess, secured and maintained these vast territories, building roads, fortifications, and cities that facilitated control and integration.
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Roman architecture and engineering achievements were monumental. They perfected the arch, vault, and dome, constructing enduring structures like the Colosseum, Pantheon, and aqueducts. These engineering marvels not only showcased Roman ingenuity but also served practical purposes, from public entertainment to water supply.
Synthetic Fiber Construction in lab .pptxPavel ( NSTU)
Synthetic fiber production is a fascinating and complex field that blends chemistry, engineering, and environmental science. By understanding these aspects, students can gain a comprehensive view of synthetic fiber production, its impact on society and the environment, and the potential for future innovations. Synthetic fibers play a crucial role in modern society, impacting various aspects of daily life, industry, and the environment. ynthetic fibers are integral to modern life, offering a range of benefits from cost-effectiveness and versatility to innovative applications and performance characteristics. While they pose environmental challenges, ongoing research and development aim to create more sustainable and eco-friendly alternatives. Understanding the importance of synthetic fibers helps in appreciating their role in the economy, industry, and daily life, while also emphasizing the need for sustainable practices and innovation.
Operation “Blue Star” is the only event in the history of Independent India where the state went into war with its own people. Even after about 40 years it is not clear if it was culmination of states anger over people of the region, a political game of power or start of dictatorial chapter in the democratic setup.
The people of Punjab felt alienated from main stream due to denial of their just demands during a long democratic struggle since independence. As it happen all over the word, it led to militant struggle with great loss of lives of military, police and civilian personnel. Killing of Indira Gandhi and massacre of innocent Sikhs in Delhi and other India cities was also associated with this movement.
This is a presentation by Dada Robert in a Your Skill Boost masterclass organised by the Excellence Foundation for South Sudan (EFSS) on Saturday, the 25th and Sunday, the 26th of May 2024.
He discussed the concept of quality improvement, emphasizing its applicability to various aspects of life, including personal, project, and program improvements. He defined quality as doing the right thing at the right time in the right way to achieve the best possible results and discussed the concept of the "gap" between what we know and what we do, and how this gap represents the areas we need to improve. He explained the scientific approach to quality improvement, which involves systematic performance analysis, testing and learning, and implementing change ideas. He also highlighted the importance of client focus and a team approach to quality improvement.
2024.06.01 Introducing a competency framework for languag learning materials ...Sandy Millin
http://sandymillin.wordpress.com/iateflwebinar2024
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2024.06.01 Introducing a competency framework for languag learning materials ...
Dsp lab manual 15 11-2016
1. DIGITAL SIGNAL PROCESSING
LABORATORY MANUAL
(R13) III – B. Tech., II-Semester
ECE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
RAMACHANDRA COLLEGE OF ENGINEERING, ELURU – 534 007
(Approved by AICTE, New Delhi & Affiliated to JNTUK: Kakinada)
West Godavari District, Andhra Pradesh
2. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 2
DIGITAL SIGNAL PROCESSING LAB
(R13) III – B. Tech., ECE II- Semester
Index
S. No. Name of the Experiment
1. Study of architecture of DSP chips – TMS 320C 5X/6X Instructions.
2. Verification of Linear convolution.
3. Verification of Circular convolution.
4.
Design of FIR filter (LP/HP) using windowing technique
a) Using rectangular window b) Using triangular window c) Using Kaiser
window
5. Implementation of IIR filter (LP/HP) on DSP Processors
6. Implementation of N-point FFT algorithm.
7. MATLAB program to generate sum of sinusoidal signals.
8. MATLAB program to find frequency response of analog LP/HP filters.
9. Computation of Power Density Spectrum of a Sequence.
10. Computation of the FFT of given 1-D signal.
11.
Frequency responses of anti imaging and anti aliasing filters.
3. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 3
GENERAL INSTRUCTIONS:
1. The experiments have been designed to be performed with in the 3-hour
laboratory time.
2. To successfully complete the experiment in one lab turn, come prepared to the
laboratory.
3. Read the experiment in advance.
4. List and collect the components for the experiment.
5. Be sure that the specifications and values of the components are as per
design.
6. Follow the experimental steps judiciously.
7. Record stepwise observations using proper test instruments.
8. Get the observation signed by the instructor.
9. Always take safety precautions while performing experiments.
GUIDANCE FOR THE LABORATORY REPORT:
1. Format of the report
Exp. No: Date:
Expt. Title:
Objective:
List of instruments and components:
Theory in brief
Procedure, Observations, Graph if any
Result
2. Write the experimental observations and measurements stepwise.
3. Plot the graph neatly. Always label the axes and indicate units too. Wherever
frequency response is to be drawn, use the semi-log graph paper.
4. Compare the results with theoretical values with remarks/comments.
5. Wherever necessary, sketch the circuit diagram neatly and label the
components.
4. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 4
WORKING PROCEDURE WITH MATLAB:
1) Double click on Matlab icon. -> Then Matlab will be opened
2) To write the Matlab Program Goto file menu-> New -> Script(Mfile) -> In the opened
Script file write the Matlab code and save the file with an extension of .m
Ex: “linear.m”
3)To execute Matlab Program Select the all lines in matlab program(ctrl+A) of mfile and press “F9”
to execute the matlab code
4)Entering the inputs in command window
If the command window is displaying the message like “enter the input sequence” then
enter the sequence with square brackets and each sample values is spaced with single
space
Ex: Enter input sequence [1 2 3 4]
If it is asking a value input write the value without brackets
Ex: “enter length of sequence 4”
After entering inputs It displays the Output Graphs.
PROCEDURE TO WORK ON CODE COMPOSER STUDIO
PROCEDURE FOR EXECUTING NON REAL TIME PROGRAMS
(EX: LINEAR & CIRCULAR CONVOLUTION, FFT, PSD)
Test the USB port by running DSK Port test from the start menu
Use StartProgramsTexas InstrumentsCode Composer StudioCode Composer Studio
CDSK6713 Tools DSK6713 Diagnostic Utilities
Select StartSelect DSK6713 Diagnostic Utility Icon from Desktop
Select Start Option
Utility Program will test the board
After testing Diagnostic Status you will get PASS
To create the New Project
Project New (File Name. pjt , Eg: Vectors.pjt)
To Create a Source file
File New Type the code (Save & give file name, Eg: sum.c).
To Add Source files to Project
Project Add files to Project c/ccs studio3.1/my projects/your project name/
sum.c(select the file type as c/c++ source files)
To Add rts.lib file & hello.cmd:
Project Add files to Project rts6700.lib
(Path:c/ccs studio3.1/cg tools/c6000/lib/ rts6700.lib)
Note: Select Object & Library in(*.o,*.l) in Type of files
Project Add files to Project hello.cmd
CMD file – Which is common for all non real time programs.
(Path: c/ccs studio3.1tutorialdsk 6713 hello1hello.cmd)
Note: Select Linker Command file(*.cmd) in Type of files
Compile:
To Compile: Project Compile project
To Build: Project build project,
To Rebuild: Project rebuild,
Which will create the final .out executable file.(Eg. Vectors.out).
5. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 5
Procedure to Load and Run program:
Load the program to DSK: File Load program Vectors. out
To Execute project: Debug Run.
1. Execution should halt at break point.
2. Now press F10. See the changes happening in the watch window.
3. Similarly go to view & select CPU registers to view the changes happening in CPU registers.
Configure the graphical window as shown below
INPUT
x[n] = {1, 2, 3, 4,0,0,0,0}
h[k] = {1, 2, 3, 4,0,0,0,0}
OUTPUT:
b)PROCEDURE FOR EXECUTING REAL TIME PROGRAMS
(EX:IIR FILTERS,FIR FILTERS DESIGNING)
CONNECTING DSP PROCESSOR TO PC
Connect the dsp processor to the pc using usb cable connector.
Check the DSK6713 diagnostics (IF you get the “pass”then click on ok).
Click on ccs studio3.1 desktop icon. Then the window will be opened.
Go to debug click on connect (then target device will be connected to pc)
TO CREATE PROJECT
Project new given project name and select the family’TMS320C67XX’Then click ok
File new source file write deown the ‘c’program and save it with.’c’ exetention in
current project file
File new dsp/bios.config file select dsk67xx click on dsk6713 and save it in current
project.
Project add files to project add source file
Project add files to project add library file by following the given path
c/ccs studio3.1/cgtools/c6000/dsk6713/DSK6713.bs/file.
Project add files to the project .Add the configuration file.
Now files are generated and included in generated files . in that open the 3rd file, and copy the
header file and paste it in source file. Copy the include files named as ”dsk6713.h” and
“dsk6713_aic23.h” paste it in current project folder.
Now compile project.(project compile)
Project build.
Project rebuild all.
File load program projectname.pjt debug “project name .out” file click on open
debug click on run
Now apply the input sine wave to line in of dsk6713 kit.
Observe the output at line out of dsk6713 by using CRO.
6. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 6
EXPERIMENT-1: STUDY OF ARCHITECTURE OF DSP CHIPS-TMS 320C 5X/6X
AIM: To study the Architecture of DSP chips-TMS 320c 5x/6xinstructions.
INTRODUCTION TO DSP PROCESSORS
A signal can be defined as a function that conveys information, generally about the state or
behavior of a physical system. There are two basic types of signals viz. Analog (continuous time
signals which are defined along a continuum of times) and Digital (discrete-time).Remarkably, under
reasonable constraints; a continuous time signal can be adequately represented by samples, obtaining
discrete time signals. Thus digital signal processing is an ideal choice for anyone who needs the
performance advantage of digital manipulation along with today’s analog reality. Hence a processor
which is designed to perform the special operations (digital manipulations) on the digital signal
within very less time can be called as a Digital signal processor. The difference between a DSP
processor, conventional microprocessor and a microcontroller are listed below.
Microprocessor or General Purpose Processor such as Intel xx86 or Motorola 680xx family
Contains - only CPU
-No RAM
-No ROM
-No I/O ports
-No Timer
Microcontroller such as 8051 family
Contains - CPU
- RAM
- ROM
-I/O ports
- Timer &
- Interrupt circuitry
Some Micro Controllers also contain A/D, D/A and Flash Memory
DSP Processors such as Texas instruments and Analog Devices
Contains - CPU
- RAM
-ROM
- I/O ports
- Timer
Optimized for – fast arithmetic
- Extended precision
- Dual operand fetch
- Zero overhead loop
- Circular buffering
The basic features of a DSP Processor are
Feature Use
Fast-Multiply accumulate Most DSP algorithms, including filtering, transforms, etc. are multiplication- intensive
Multiple – access memory
architecture
Many data-intensive DSP operations require reading a program instruction and multiple data items
during each instruction cycle for best performanceSpecialized addressing modes Efficient handling of data arrays and first-in, first-out buffers in memory
Specialized program control Efficient control of loops for many iterative DSP algorithms. Fast interrupt handling for frequent I/O
operations.On-chip peripherals and I/O
interfaces
On-chip peripherals like A/D converters allow for small low cost system designs. Similarly I/O
interfaces tailored for common peripherals allow clean interfaces to off-chip I/O devices.
7. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 7
ARCHITECTURE OF 6713 DSP PROCESSOR
This chapter provides an overview of the architectural structure of the TMS320C67xx DSP, which
comprises the central processing unit (CPU), memory, and on-chip peripherals. The C67xE DSPs use
an advanced modified Harvard architecture that maximizes processing power with eight buses.
Separate program and data spaces allow simultaneous access to program instructions and data,
providing a high degree of parallelism. For example, three reads and one write can be performed in a
single cycle. Instructions with parallel store and application-specific instructions fully utilize this
architecture. In addition, data can be transferred between data and program spaces. Such Parallelism
supports a powerful set of arithmetic, logic, and bit-manipulation operations that can all be
performed in a single machine cycle. Also, the C67xx DSP includes the control mechanisms to manage
interrupts, repeated operations, and function calling.
Fig 2 – 1 BLOCK DIAGRAM OF TMS 320VC 6713
Bus Structure
The C67xx DSP architecture is built around eight major 16-bit buses (four program/data buses and
four address buses):
_ The program bus (PB) carries the instruction code and immediate operands from program memory.
_ Three data buses (CB, DB, and EB) interconnect to various elements, such as the CPU, data address
generation logic, program address generation logic, on-chip peripherals, and data memory.
_ The CB and DB carry the operands that are read from data memory.
_ The EB carries the data to be written to memory.
_ Four address buses (PAB, CAB, DAB, and EAB) carry the addresses needed for instruction
execution.
8. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 8
The C67xx DSP can generate up to two data-memory addresses per cycle using the two auxiliary
register arithmetic units (ARAU0 and ARAU1). The PB can carry data operands stored in program
space (for instance, a coefficient table) to the multiplier and adder for multiply/accumulate
operations or to a destination in data space for data move instructions (MVPD and READA). This
capability, in conjunction with the feature of dual-operand read, supports the execution of single-
cycle, 3-operand instructions such as the FIRS instruction. The C67xx DSP also has an on-chip
bidirectional bus for accessing on-chip peripherals. This bus is connected to DB and EB through the
bus exchanger in the CPU interface. Accesses that use this bus can require two or more cycles for
reads and writes, depending on the peripheral’s structure.
Central Processing Unit (CPU)
The CPU is common to all C67xE devices. The C67x CPU contains:
_ 40-bit arithmetic logic unit (ALU)
_ Two 40-bit accumulators
_ Barrel shifter
_ 17 × 17-bit multiplier
_ 40-bit adder
_ Compare, select, and store unit (CSSU)
_ Data address generation unit
_ Program address generation unit
Arithmetic Logic Unit (ALU)
The C67x DSP performs 2s-complement arithmetic with a 40-bit arithmetic logic unit (ALU) and two
40-bit accumulators (accumulators A and B). The ALU can also perform Boolean operations. The ALU
uses these inputs:
_ 16-bit immediate value
_ 16-bit word from data memory
_ 16-bit value in the temporary register, T
_ Two 16-bit words from data memory
_ 32-bit word from data memory
_ 40-bit word from either accumulator
The ALU can also function as two 16-bit ALUs and perform two 16-bit operations simultaneously.
Fig 2 – 2 ALU UNIT
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Accumulators
Accumulators A and B store the output from the ALU or the multiplier/adder block. They can also
provide a second input to the ALU; accumulator A can be an input to the multiplier/adder. Each
accumulator is divided into three parts:
_ Guard bits (bits 39–32)
_ High-order word (bits 31–16)
_ Low-order word (bits 15–0)
Instructions are provided for storing the guard bits, for storing the high- and the low-order
accumulator words in data memory, and for transferring 32-bit accumulator words in or out of data
memory. Also, either of the accumulators can be used as temporary storage for the other.
Barrel Shifter
The C67x DSP barrel shifter has a 40-bit input connected to the accumulators or to data memory
(using CB or DB), and a 40-bit output connected to the ALU or to data memory (using EB). The barrel
shifter can produce a left shift of 0 to 31 bits and a right shift of 0 to 16 bits on the input data. The shift
requirements are defined in the shift count field of the instruction, the shift count field (ASM) of
status register ST1, or in temporary register T (when it is designated as a shift count register).The
barrel shifter and the exponent encoder normalize the values in an accumulator in a single cycle. The
LSBs of the output are filled with 0s, and the MSBs can be either zero filled or sign extended,
depending on the state of the sign-extension mode bit (SXM) in ST1. Additional shift capabilities
enable the processor to perform numerical scaling, bit extraction, extended arithmetic,and overflow
prevention operations.
Multiplier/Adder Unit
The multiplier/adder unit performs 17 _ 17-bit 2s-complement multiplication with a 40-bit addition
in a single instruction cycle. The multiplier/adder block consists of several elements: a multiplier, an
adder, signed/unsigned input control logic, fractional control logic, a zero detector, a rounder (2s
complement), overflow/saturation logic, and a 16-bit temporary storage register (T). The multiplier
has two inputs: one input is selected from T, a data-memory operand, or accumulator A; the other is
selected from program memory, data memory, accumulator A, or an immediate value. The fast, on-
chip multiplier allows the C54x DSP to perform operations efficiently such as convolution,
correlation, and filtering. In addition, the multiplier and ALU together execute multiply/accumulate
(MAC) computations and ALU operations in parallel in a single instruction cycle. This function is
used in determining the Euclidian distance and in implementing symmetrical and LMS filters, which
are required for complex DSP algorithms. See section 4.5, Multiplier/Adder Unit, on page 4-19, for
more details about the multiplier/adder unit.
Fig 2 – 3 MULTIPLIER/ADDER UNIT
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These are the some of the important parts of the processor and you are instructed to go through the
detailed architecture once which helps you in developing the optimized code for the required
application.
RESULT: The architecture of DSP chips-TMS 320c 5x/6x is studied successfully.
VIVA QUESTIONS
1. Define signal and signal processing
2. Differentiate digital and analog signals?
3. How the DSP processor will differ from conventional processors?
4. Expand the abbreviation TMS320C 5X/6X
5. What kind of processor is DSP processor?
6. What are the main building blocks of DSP processor?
7. What is the main function of MAC unit?
8. Explain VLIW architecture?
9. What is meant by circular buffer?
10. What is meant by emulator and JTAG?
11. RCE DIGITAL SIGNAL PROCESSING LAB
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EXPERIMENT-2:
VERIFICATION OF LINEAR CONVOLUTION USING MATLAB AND CC STUDIO
AIM: To verify Linear Convolution using MATLAB AND CC STUDIO.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
DSK6713 DSP Starter kit CCS Studio 3-1
USB Cable OS: Windows XP
Power Adapter
THEORY:
Convolution is a formal mathematical operation, just as multiplication, addition, and integration.
Addition takes two numbers and produces a third number, while convolution takes two signals and
produces a third signal. Convolution is used in the mathematics of many fields, such as probability
and statistics. In linear systems, convolution is used to describe the relationship between three signals
of interest: the input signal, the impulse response, and the output signal.
In this equation, x1(k), x2(n-k) and y(n) represent the input to and output from the system at time n.
Here we could see that one of the inputs is shifted in time by a value every time it is multiplied with
the other input signal. Linear Convolution is quite often used as a method of implementing filters of
various types.
Linear Convolution Using MATLAB:-
Program:
clc;
clear all;
close all;
disp('linear convolution program');
x=input('enter i/p x(n):');
m=length(x);
h=input('enter i/p h(n):');
n=length(h);
x=[x,zeros(1,n)];
subplot(2,2,1), stem(x);
title('i/p sequence x(n)is:');
xlabel('---->n');
ylabel('---->x(n)');grid;
h=[h,zeros(1,m)];
subplot(2,2,2), stem(h);
title('i/p sequence h(n)is:');
xlabel('---->n');
ylabel('---->h(n)');grid;
disp('convolution of x(n) & h(n) is y(n):');
y=zeros(1,m+n-1);
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for i=1:m+n-1
y(i)=0;
for j=1:m+n-1
if(j<i+1)
y(i)=y(i)+x(j)*h(i-j+1);
end
end
end
y
subplot(2,2,[3,4]),stem(y);
title('convolution of x(n) & h(n) is :');
xlabel('---->n');
ylabel('---->y(n)');grid;
Output :
Linear Convolution Using CCSTUDIO:-
Procedure to create new Project:
1. To create project, go to Project and Select New.
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2. Give project name and click on finish.
(Note: Location must be c:CCStudio_v3.1MyProjects)
3. Click on File New Source File, to write the Source Code.
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Mathematical Formula:
The linear convolution of two continuous time signals x(t) and h(t) is defined by
For discrete time signals x(n) and h(n), is defined by
Where x(n) is the input signal and h(n) is the impulse response of the system.
In linear convolution length of output sequence is,
Length (y(n)) = length(x(n)) + length(h(n)) – 1
Program:
#include<stdio.h>
main()
{ int m=4; /*Lenght of i/p samples sequence*/
int n=4; /*Lenght of impulse response Co-efficients */
int i=0,j;
int x[10]={1,2,3,4,0,0,0,0}; /*Input Signal Samples*/
int h[10]={1,2,3,4,0,0,0,0}; /*Impulse Response Co-efficients*/
/*At the end of input sequences pad 'M' and 'N' no. of zero's*/
int *y;
y=(int *)0x0000100;
for(i=0;i<m+n-1;i++)
{
y[i]=0;
for(j=0;j<=i;j++)
y[i]+=x[j]*h[i-j];
}
for(i=0;i<m+n-1;i++)
printf("%dn",y[i]);
}
Output:
1, 4, 10, 20, 25, 24, 16.
4. Enter the source code and save the file with “.C” extension.
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5. Right click on source, Select add files to project and Choose “.C “ file Saved before.
6. Right Click on libraries and select add files to Project and choose
C:CCStudio_v3.1C6000cgtoolslibrts6700.lib and click open.
7. a) Go to Project to Compile .
b) Go to Project to Build.
c) Go to Project to Rebuild All.
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8. Go to file and load program and load “.out” file into the board..
9. Go to Debug and click on run to run the program.
Here it
shows
error if
any
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10. Observe the output in output window.
11. To see the Graph go to View and select time/frequency in the Graph, And give the correct Start
address provided in the program, Display data can be taken as per user.
12. Green line is to choose the point, Value at the point can be seen (Highlighted by circle at the left
corner).
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RESULT: Hence Linear Convolution is verified successfully using MATLAB and CC Studio.
VIVA QUESTIONS
1. Explain the significance of convolution.
2. Define linear convolution.
3. Why linear convolution is called as a periodic convolution?
4. Why zero padding is used in linear convolution?
5. What are the four steps to find linear convolution?
6. What is the length of the resultant sequence in linear convolution?
7. How linear convolution will be used in calculation of LTI system response?
8. List few applications of linear convolution in LTI system design.
9. Give the properties of linear convolution.
10. How the linear convolution will be used to calculate the DFT of a signal?
19. RCE DIGITAL SIGNAL PROCESSING LAB
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EXPERIMENT NO-3:
VERIFICATION OF CIRCULAR CONVOLUTION USING MATLAB AND CC STUDIO
AIM: To verify Circular Convolution using MATLAB AND CC STUDIO.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
DSK6713 DSP Starter kit CCS Studio 3-1
USB Cable OS: Windows XP
Power Adapter
THEORY
Circular convolution is another way of finding the convolution sum of two input signals. It resembles
the linear convolution, except that the sample values of one of the input signals is folded and right
shifted before the convolution sum is found. Also note that circular convolution could also be found
by taking the DFT of the two input signals and finding the product of the two frequency domain
signals. The Inverse DFT of the product would give the output of the signal in the time domain which
is the circular convolution output. The two input signals could have been of varying sample lengths.
But we take the DFT of higher point, which ever signals levels to. For example, If one of the signal is
of length 256 and the other spans 51 samples, then we could only take 256 point DFT. So the output of
IDFT would be containing 256 samples instead of 306 samples, which follows N1+N2 – 1 where N1 &
N2 are the lengths 256 and 51 respectively of the two inputs. Thus the output which should have been
306 samples long is fitted into 256 samples. The256 points end up being a distorted version of the
correct signal. This process is called circular convolution.
Circular Convolution using MATLAB:-
Program:
clc;
clear all;
close all;
disp('circular convolution program');
x=input('enter i/p x(n):');
m=length(x);
h=input('enter i/p sequence h(n)');
n=length(h);
subplot(2,2,1),
stem(x);
title('i/p sequence x(n)is:');
xlabel('---->n');
ylabel('---->x(n)');
grid;
subplot(2,2,2),
stem(h);
title('i/p sequence h(n)is:');
xlabel('---->n');
ylabel('---->h(n)');
grid;
disp('circular convolution of x(n) & h(n) is y(n):');
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if(m-n~=0)
if(m>n)
h=[h,zeros(1,m-n)];
n=m;
end
x=[x,zeros(1,n-m)];
m=n;
end
y=zeros(1,n);
y(1)=0;
a(1)=h(1);
for j=2:n
a(j)=h(n-j+2);
end
%circular convolution
for i=1:n
y(1)=y(1)+x(i)*a(i);
end
for k=2:n
y(k)=0;
% circular shift
for j=2:n
x2(j)=a(j-1);
end
x2(1)=a(n);
for i=1:n
if(i<n+1)
a(i)=x2(i);
y(k)=y(k)+x(i)*a(i);
end
end
end
y
subplot(2,2,[3,4]),stem(y);
title('convolution of x(n) & h(n) is:');
xlabel('---->n');
ylabel('---->y(n)');grid;
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OUTPUT :
Circular Convolution using CCStudio :-
Procedure to create new Project:
1. To create project, go to Project and Select New.
2. Give project name and click on finish.
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( Note: Location must be c:CCStudio_v3.1MyProjects ).
3. Click on File New Source File, to write the Source Code.
Circular Convolution:
Let x1(n) and x2(n) are finite duration sequences both of length N with DFT’s X1(k) and X2(k).
Convolution of two given sequences x1(n) and x2(n) is given by the equation,
x3(n) = IDFT[X3(k)]
X3(k) = X1(k) X2(k)
N-1
x3(n) = ∑ x1(m) x2((n-m))N
m=0
Program:
#include<stdio.h>
int m,n,x[30],h[30],y[30],i,j,temp[30],k,x2[30],a[30];
void main()
{
int *y;
y=(int *)0x0000100;
printf(" enter the length of the first sequencen");
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scanf("%d",&m);
printf(" enter the length of the second sequencen");
scanf("%d",&n);
printf(" enter the first sequencen");
for(i=0;i<m;i++)
scanf("%d",&x[i]);
printf(" enter the second sequencen");
for(j=0;j<n;j++)
scanf("%d",&h[j]);
if(m-n!=0) /*If length of both sequences are not equal*/
{
if(m>n) /* Pad the smaller sequence with zero*/
{
for(i=n;i<m;i++)
h[i]=0;
n=m;
}
for(i=m;i<n;i++)
x[i]=0;
m=n;
}
y[0]=0;
a[0]=h[0];
for(j=1;j<n;j++) /*folding h(n) to h(-n)*/
a[j]=h[n-j];
/*Circular convolution*/
for(i=0;i<n;i++)
y[0]+=x[i]*a[i];
for(k=1;k<n;k++)
{
y[k]=0;
/*circular shift*/
for(j=1;j<n;j++)
x2[j]=a[j-1];
x2[0]=a[n-1];
for(i=0;i<n;i++)
{
a[i]=x2[i];
y[k]+=x[i]*x2[i];
}}
/*displaying the result*/
printf(" the circular convolution isn");
for(i=0;i<n;i++)
printf("%d ",y[i]);
}
Output:
enter the length of the first sequence
4
enter the length of the second sequence
4
enter the first sequence
4 3 2 1
enter the second sequence
1 1 1 1
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the circular convolution is
10 10 10 10
4. Enter the source code and save the file with “.C” extension.
5. Right click on source, Select add files to project .. and Choose “.C “ file Saved before.
6. Right Click on libraries and select add files to Project.. and choose
C:CCStudio_v3.1C6000cgtoolslibrts6700.lib and click open.
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7. a) Go to Project to Compile .
b) Go to Project to Build.
c) Go to Project to Rebuild All.
In case
of any
errors
or
warnin
gs it
will be
display
ed here
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8. Go to file and load program and load “.out” file into the board..
9. Go to Debug and click on run to run the program.
10. Enter the input data to calculate the circular convolution.
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The corresponding output will be shown on the output window as shown below
11. To see the Graph go to View and select time/frequency in the Graph, and give the correct Start
address provided in the program, Display data can be taken as per user.
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12. Green line is to choose the point, Value at the point can be seen (Highlighted by circle at the left
corner).
RESULT : Hence Circular Convolution is verified successfully using MATLAB and CC Studio.
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VIVA QUESTIONS
1. Give mathematical definition of circular convolution
2. Why circular convolution is called as periodic convolution?
3. Difference between linear convolution and circular convolution
4. Explain the circular shift
5. How circular convolution is used to calculate the Z-transform of a signal?
6. List few Applications of circular convolution
7. What are the different methods used to calculate circular convolution?
8. Explain properties of circular convolution?
9. Explain modulo N operation
10. What is the importance of circular convolution to realization of digital systems or digital
filters?
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EXPERIMENT NO-4:
DESIGN OF FIR FILTER (LP/HP) USING WINDOWING TECHNIQUE
AIM: To design FIR filters (LP/HP) by using following windowing techniques on MATLAB and
DSK6713 KIT:
1) Rectangular 2) Triangular 3) Kaiser
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
DSK6713 DSP Starter kit CCS Studio 3-1
USB Cable OS: Windows XP
Power Adapter
Jack Cables
CRO, Probes, Function generator
THEORY:
A Finite Impulse Response (FIR) filter is a discrete linear time-invariant system whose output is
based on the weighted summation of a finite number of past inputs. An FIR transversal filter
structure can be obtained directly from the equation for discrete-time convolution.
10)()()(
1
0
Nnknhkxny
N
k
In this equation, x(k) and y(n) represent the input to and output from the filter at time n. h(n-k) is
the transversal filter coefficients at time n. These coefficients are generated by using FDS (Filter
Design Software or Digital filter design package).
FIR – filter is a finite impulse response filter. Order of the filter should be specified. Infinite
response is truncated to get finite impulse response. Placing a window of finite length does this.
Types of windows available are Rectangular, Bartlett, Hamming, Hanning, Blackmann window
etc., This FIR filter is an all zero filter.
FIR filter design using MATLAB:-
%fir filt design window techniques %
clc;
clear all;
close all;
rp=input('enter passband ripple');
rs=input('enter the stopband ripple');
fp=input('enter passband freq');
fs=input('enter stopband freq');
f=input('enter sampling freq ');
wp=2*fp/f;
ws=2*fs/f;
num=-20*log10(sqrt(rp*rs))-13;
dem=14.6*(fs-fp)/f;
n=ceil(num/dem);
n1=n+1;
if(rem(n,2)~=0)
n1=n;
n=n-1;
end
c=input('enter your choice of window function 1. rectangular 2. triangular 3.kaiser: n ');
if(c==1)
y=rectwin(n1);
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disp('Rectangular window filter response');
end
if (c==2)
y=triang(n1);
disp('Triangular window filter response');
end
if(c==3)
y=kaiser(n1);
disp('kaiser window filter response');
end
%LPF
b=fir1(n,wp,y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
subplot(2,2,1);plot(o/pi,m);
title('LPF');
ylabel('Gain in dB-->');
xlabel('(a) Normalized frequency-->');
%HPF
b=fir1(n,wp,'high',y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
subplot(2,2,2);plot(o/pi,m);
title('HPF');
ylabel('Gain in dB-->');
xlabel('(b) Normalized frequency-->');
%BPF
wn=[wp ws];
b=fir1(n,wn,y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
subplot(2,2,3);plot(o/pi,m);
title('BPF');
ylabel('Gain in dB-->');
xlabel('(c) Normalized frequency-->');
%BSF
b=fir1(n,wn,'stop',y);
[h,o]=freqz(b,1,256);
m=20*log10(abs(h));
subplot(2,2,4);plot(o/pi,m);
title('BSF');
ylabel('Gain in dB-->');
xlabel('(d) Normalized frequency-->');
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OUTPUT:
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C PROGRAM FOR KAISER WINDOW LPF:
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//float filter_coeff[]={-0.000019,-0.000170,-0.000609,-0.001451,-0.002593,
// -0.003511,-0.003150,0.000000,0.007551,0.020655,
// 0.039383,0.062306,0.086494,0.108031,0.122944,
// 0.128279,0.122944,0.108031,0.086494,0.062306,
// 0.039383,0.020655,0.007551,0.000000,-0.003150,
// -0.003511,-0.002593,-0.001451,-0.000609,-0.000710,
// -0.000019};// kaiser low pass fir filter pass band range 0-
500Hz
//float filter_coeff[]={-0.000035,-0.000234,-0.000454,0.000000,0.001933,
// 0.004838,0.005671,-0.000000,-0.013596,-0.028462,
// -0.029370,0.000000,0.064504,0.148863,0.221349,
// 0.249983,0.221349,0.148863,0.064504,0.000000,
// -0.029370,-0.028462,-0.013596,-0.000000,0.005671,
// 0.004838,0.001933,0.000000,-0.000454,-0.000234,
// -0.000035};// kaiser low pass fir filter pass band range 0-1000Hz
float filter_coeff[]={-0.000046,-0.000166,0.000246,0.001414,0.001046,
-0.003421,-0.007410,0.000000,0.017764,0.020126,
-0.015895,-0.060710,-0.034909,0.105263,0.289209,
0.374978,0.289209,0.105263,-0.034909,-0.060710,
-0.015895,0.020126,0.017764,0.000000,-0.007410,
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-0.003421,0.001046,0.001414,0.000246,-0.000166,
-0.000046};//Kaiser low pass fir filter pass band range 0-1500Hz
//static short int in_buffer[100];
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=(Int16)FIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int FIR_FILTER(float * h, signed int x)
{
int i=0;
signed long output=0;
static short int in_buffer[100];
in_buffer[0] = x;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1];
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
//output = x;
return(output);
}
KAISER WINDOW HPF:
#include "filtercfg.h"
#include "dsk6713.h"
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#include "dsk6713_aic23.h"
#include "stdio.h"
//float filter_coeff[]={0.000050,0.000223,0.000520,0.000831,0.000845,
// -0.000000,-0.002478,-0.007437,-0.015556,-0.027071,
// -0.041538,-0.057742,-0.073805,-0.087505,-0.096739,
// 0.899998,-0.096739,-0.087505,-0.073805,-0.057742,
// -0.041538,-0.027071,-0.015556,-0.007437,-0.002478,
// -0.000000,0.000845,0.000831,0.000520,0.000223,
// 0.000050};//FIR High pass Kaiser filter pass band range 400Hz-3.5KHz
float filter_coeff[]={0.000000,-0.000138,-0.000611,-0.001345,-0.001607,
-0.000000,0.004714,0.012033,0.018287,0.016731,
0.000000,-0.035687,-0.086763,-0.141588,-0.184011,
0.800005,-0.184011,-0.141588,-0.086763,-0.035687,
0.000000,0.016731,0.018287,0.012033,0.004714,
-0.000000,-0.001607,-0.001345,-0.000611,-0.000138,
0.000000};//FIR High pass Kaiser filter pass band range
800Hz-3.5KHz
//float filter_coeff[]={-0.000050,-0.000138,0.000198,0.001345,0.002212,-0.000000,
// -0.006489,-0.012033,-0.005942,0.016731,0.041539,0.035687,
// -0.028191,-0.141589,-0.253270,0.700008,-0.253270,-0.141589,
// -0.028191,0.035687,0.041539,0.016731,-0.005942,-0.012033,
// -0.006489,-0.000000,0.002212,0.001345,0.000198,-0.000138,
// -0.000050};//FIR High pass Kaiser filter pass band range
1200Hz-3.5KHz
//static short int in_buffer[100];
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=(Int16)FIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
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}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int FIR_FILTER(float * h, signed int x)
{
int i=0;
signed long output=0;
static short int in_buffer[100];
in_buffer[0] = x;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1];
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
//output = x;
return(output);
}
RECTANGULAR LPF:
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//float filter_coeff[]={-0.008982,-0.017782,-0.025020,-0.029339,-0.029569,
// -0.024895,-0.014970,0.000000,0.019247,0.041491,
// 0.065053,0.088016,0.108421,0.124473,0.134729,
// 0.138255,0.134729,0.124473,0.108421,0.088016,
// 0.065053,0.041491,0.019247,0.000000,-0.014970,
// -0.024895,-0.029569,-0.029339,-0.025020,-0.017782,
// -0.008982};//FIR Low pass Rectangular Filter pass band
range 0-500Hz
//float filter_coeff[]={-0.015752,-0.023869,-0.018176,0.000000,0.021481,
// 0.033416,0.026254,-0.000000,-0.033755,-0.055693,
// -0.047257,0.000000,0.078762,0.167080,0.236286,
// 0.262448,0.236286,0.167080,0.078762,0.000000,
// -0.047257,-0.055693,-0.033755,-0.000000,0.026254,
// 0.033416,0.021481,0.000000,-0.018176,-0.023869,
// -0.015752};//FIR Low pass Rectangular Filter pass band
range 0-1000Hz
float filter_coeff[]={-0.020203,-0.016567,0.009656,0.027335,0.011411,
-0.023194,-0.033672,0.000000,0.043293,0.038657,
-0.025105,-0.082004,-0.041842,0.115971,0.303048,
0.386435,0.303048,0.115971,-0.041842,-0.082004,
-0.025105,0.038657,0.043293,0.000000,-0.033672,
-0.023194,0.011411,0.027335,0.009656,-0.016567,
-0.020203};//FIR Low pass Rectangular Filter pass band range 0-1500Hz
//static short int in_buffer[100];
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DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=(Int16)FIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int FIR_FILTER(float * h, signed int x)
{
int i=0;
signed long output=0;
static short int in_buffer[100];
in_buffer[0] = x;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1];
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
//output = x;
return(output);
}
RECTANGULAR HPF:
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//float filter_coeff[]={0.021665,0.022076,0.020224,0.015918,0.009129,
// -0.000000,-0.011158,-0.023877,-0.037558,-0.051511,
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// -0.064994,-0.077266,-0.087636,-0.095507,-0.100422,
// 0.918834,-0.100422,-0.095507,-0.087636,-0.077266,
// -0.064994,-0.051511,-0.037558,-0.023877,-0.011158,
// -0.000000,0.009129,0.015918,0.020224,0.022076,
// 0.021665};//FIR High pass Rectangular filter pass band range 400Hz-3.5KHz
float filter_coeff[]={0.000000,-0.013457,-0.023448,-0.025402,-0.017127,
-0.000000,0.020933,0.038103,0.043547,0.031399,
0.000000,-0.047098,-0.101609,-0.152414,-0.188394,
0.805541,-0.188394,-0.152414,-0.101609,-0.047098,
0.000000,0.031399,0.043547,0.038103,0.020933,
-0.000000,-0.017127,-0.025402,-0.023448,-0.013457,
0.000000};//FIR High pass Rectangular filter pass band
range 800Hz-3.5KHz
//float filter_coeff[]={-0.020798,-0.013098,0.007416,0.024725,0.022944,
// -0.000000,-0.028043,-0.037087,-0.013772,0.030562,
// 0.062393,0.045842,-0.032134,-0.148349,-0.252386,
// 0.686050,-0.252386,-0.148349,-0.032134,0.045842,
// 0.062393,0.030562,-0.013772,-0.037087,-0.028043,
// -0.000000,0.022944,0.024725,0.007416,-0.013098,
// -0.020798};//FIR High pass Rectangular filter pass band range 1200Hz-3.5KHz
//static short int in_buffer[100];
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=(Int16)FIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
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}
signed int FIR_FILTER(float * h, signed int x)
{
int i=0;
signed long output=0;
static short int in_buffer[100];
in_buffer[0] = x;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1];
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
//output = x;
return(output);
}
TRANGULAR LPF:
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//float filter_coeff[]={0.000000,-0.001185,-0.003336,-0.005868,-0.007885,
// -0.008298,-0.005988,0.000000,0.010265,0.024895,
// 0.043368,0.064545,0.086737,0.107877,0.125747,
// 0.138255,0.125747,0.107877,0.086737,0.064545,
// 0.043368,0.024895,0.010265,0.000000,-0.005988,
// -0.008298,-0.007885,-0.005868,-0.003336,-0.001185,
// 0.000000};//FIR Low pass Triangular Filter pass band range 0-500Hz
//float filter_coeff[]={0.000000,-0.001591,-0.002423,0.000000,0.005728,
// 0.011139,0.010502,-0.000000,-0.018003,-0.033416,
// -0.031505,0.000000,0.063010,0.144802,0.220534,
// 0.262448,0.220534,0.144802,0.063010,0.000000,
// -0.031505,-0.033416,-0.018003,-0.000000,0.010502,
// 0.011139,0.005728,0.000000,-0.002423,-0.001591,
// 0.000000};//FIR Low pass Triangular Filter pass band range 0-1000Hz
float filter_coeff[]={0.000000,-0.001104,0.001287,0.005467,0.003043,
-0.007731,-0.013469,0.000000,0.023089,0.023194,
-0.016737,-0.060136,-0.033474,0.100508,0.282844,
0.386435,0.282844,0.100508,-0.033474,-0.060136,
-0.016737,0.023194,0.023089,0.000000,-0.013469,
-0.007731,0.003043,0.005467,0.001287,-0.001104,
0.000000};//FIR Low pass Triangular Filter pass band range 0-1500Hz
//static short int in_buffer[100];
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
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void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=(Int16)FIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int FIR_FILTER(float * h, signed int x)
{
int i=0;
signed long output=0;
static short int in_buffer[100];
in_buffer[0] = x;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1];
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
//output = x;
return(output);
}
TRANGULAR HPF
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//float filter_coeff[]={0.000000,0.001445,0.002648,0.003127,0.002391,
// -0.000000,-0.004383,-0.010943,-0.019672,-0.030353,
// -0.042554,-0.055647,-0.068853,-0.081290,-0.092048,
// 0.902380,-0.092048,-0.081290,-0.068853,-0.055647,
// -0.042554,-0.030353,-0.019672,-0.010943,-0.004383,
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// -0.000000,0.002391,0.003127,0.002648,0.001445,
// 0.000000};//FIR High pass Triangular filter pass band range
400Hz-3.5KHz
//float filter_coeff[]={0.000000,-0.000897,-0.003126,-0.005080,-0.004567,
// -0.000000,0.008373,0.017782,0.023225,0.018839,
// 0.000000,-0.034539,-0.081287,-0.132092,-0.175834,
// 0.805541,-0.175834,-0.132092,-0.081287,-0.034539,
// 0.000000,0.018839,0.023225,0.017782,0.008373,
// -0.000000,-0.004567,-0.005080,-0.003126,-0.000897,
// 0.000000};//FIR High pass Triangular filter pass band range
800Hz-3.5KHz
float filter_coeff[]={0.000000,-0.000901,0.001021,0.005105,0.006317,
-0.000000,-0.011581,-0.017868,-0.007583,0.018931,
0.042944,0.034707,-0.026541,-0.132736,-0.243196,
0.708287,-0.243196,-0.132736,-0.026541,0.034707,
0.042944,0.018931,-0.007583,-0.017868,-0.011581,
-0.000000,0.006317,0.005105,0.001021,-0.000901,
0.000000};//FIR High pass Triangular filter pass band range
1200Hz-3.5KHz
//static short int in_buffer[100];
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=(Int16)FIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
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signed int FIR_FILTER(float * h, signed int x)
{
int i=0;
signed long output=0;
static short int in_buffer[100];
in_buffer[0] = x;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1];
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
//output = x;
return(output);
}
DSP STARTER KIT DSK6713
SNAP SHOTS:
1. APPLIED INPUT TO FILTER
Fig : applying 2V p-p as input for the filter
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OUT PUT OF L.P.FILTER AT CUTOFF FREQUENCY
L.P.FILTER OUT PUT WILL BE ZERO AFTER CUTOFF FREQUENCY
EXPERMENTAL SETUP OF FINAL IMPLIMENTATION OF LPF
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RESULT: The design of FIR filters (LP/HP) by using various windowing techniques is done
successfully using MATLAB and DSK6713 KIT.
VIVA QUESTIONS
1. What is a filter?
2. Differentiate analog filter and digital filter.
3. Define FIR filter.
4. What are the differences between recursive and non recursive systems?
5. List a few Applications of FIR filters.
6. Explain advantages of FIR filters over IIR filters.
7. Explain limitations of FIR filters.
8. What is the different method to design FIR filters?
9. Explain different window functions.
10. Differentiate rectangular, triangular and Kaiser windows.
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EXPERIMENT NO-5:
IIR FILTER (LP/HP) IMPLEMENTATION ON DSP PROCESSORS
AIM: To implement the IIR FILTERS (LPF/HPF) on DSK 6713 DSP starter kit
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
DSK6713 DSP Starter kit CCS Studio 3-1
USB Cable OS: Windows XP
Power Adapter
CRO, Probes, Function Generator
THEORY:
The IIR filter can realize both the poles and zeroes of a system because it has a rational transfer
function, described by polynomials in z in both the numerator and the denominator
m and n are order of the two polynomials b and a are the filter coefficients. These
filter coefficients are generated using FDS (Filter Design software or Digital Filter design package. IIR
filters can be expanded as infinite impulse response filters. In designing IIR filters, cutoff frequencies
of the filters should be mentioned. The order of the filter can be estimated using Butterworth
polynomial. That’s why the filters are named as Butterworth filters. Filter coefficients can be found
and the response can be plotted.
C PROGRAM IIR_BUTERWORTH_LP FILTER
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//const signed int filter_coeff[] = {2366,2366,2366,32767,-18179,13046};//IIR_BUTTERWORTH_LP
FILTER pass band range 0-2.5kHZ
//const signed int filter_coeff[] = {312,312,312,32767,-27943,24367};//IIR_BUTTERWORTH_LP
FILTER pass band range 0-800Hz
const signed int filter_coeff[] = {15241,15241,15241,32761,10161,7877};//IIR_BUTERWORTH_LP
FILTER pass band range 0-8kHz
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 3);
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while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=IIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int IIR_FILTER(const signed int * h, signed int x1)
{
static signed int x[6] = {0,0,0,0,0,0};
static signed int y[6] = {0,0,0,0,0,0};
int temp=0;
temp = (short int)x1;
x[0] = (signed int) temp;
temp = ( (int)h[0] * x[0]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[2] * x[2]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[5] * y[2]);
temp >>=15;
if ( temp > 32767 )
{
temp = 32767;
}
else if ( temp < -32767)
{
temp = -32767;
}
y[0] = temp;
y[2] = y[1];
y[1] = y[0];
x[2] = x[1];
x[1] = x[0];
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return (temp<<2);
}
IIR BUTTERWORTH HP FILTER
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//const signed int filter_coeff[] = {20539,-20539,20539,32767,-
18173,13406};//IIR_BUTTERWORTH_HP FILTER pass band range 2.5kHz-11KHz
//const signed int filter_coeff[] = {15241,-15241,15241,32761,-10161,7877};//IIR_BUTTERWORTH_HP
FILTER pass band range 4kHz-11KHz
const signed int filter_coeff[] = { 7215,-7215,7215,32767,5039,6171};//IIR_BUTTERWORTH_HP
FILTER pass band range 7kHz-11Khz
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 3);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=IIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int IIR_FILTER(const signed int * h, signed int x1)
{
static signed int x[6] = {0,0,0,0,0,0};
static signed int y[6] = {0,0,0,0,0,0};
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int temp=0;
temp = (short int)x1;
x[0] = (signed int) temp;
temp = ( (int)h[0] * x[0]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[2] * x[2]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[5] * y[2]);
temp >>=15;
if ( temp > 32767 )
{
temp = 32767;
}
else if ( temp < -32767)
{
temp = -32767;
}
y[0] = temp;
y[2] = y[1];
y[1] = y[0];
x[2] = x[1];
x[1] = x[0];
return (temp<<2);
}
IIR CHEBYSHEV LP FILTER
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//const signed int filter_coeff[] = {1455,1455,1455,32767,-23410,21735};//IIR_CHEB_LP FILTER pass
band range 0-2.5kHz
//const signed int filter_coeff[] = {168,168,168,32767,-30225,28637};//IIR_CHEB_LP FILTER pass
band range 0-800Hz
const signed int filter_coeff[] = {11617,11617,11617,32767,8683,15506};//IIR_CHEB_LP FILTER pass
band range 0-8kHz
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
49. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 49
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 3);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=IIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
signed int IIR_FILTER(const signed int * h, signed int x1)
{
static signed int x[6] = {0,0,0,0,0,0};
static signed int y[6] = {0,0,0,0,0,0};
int temp=0;
temp = (short int)x1;
x[0] = (signed int) temp;
temp = ( (int)h[0] * x[0]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[2] * x[2]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[5] * y[2]);
temp >>=15;
if ( temp > 32767 )
{
temp = 32767;
}
else if ( temp < -32767)
50. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 50
{
temp = -32767;
}
y[0] = temp;
y[2] = y[1];
y[1] = y[0];
x[2] = x[1];
x[1] = x[0];
return (temp<<2);
}
IIR CHEBYSHEV HP FILTER
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
#include "stdio.h"
//const signed int filter_coeff[] = {12730,-12730,12730,32767,-18324,21137};//IIR_CHEB_HP FILTER
pass band range 2.5kHz-11KHz
//const signed int filter_coeff[] = {9268,-9268,9268,32767,-7395,18367};//IIR_CHEB_HP FILTER pass
band range 4kHz-11KHz
const signed int filter_coeff[] = { 3842,-3842,3842,32767,12360,19289};//IIR_CHEB_HP FILTER pass
band range 7kz-11KHz
DSK6713_AIC23_Config
config={0x0017,0x0017,0x00d8,0x00d8,0x0011,0x0000,0x0000,0x0043,0x0081,0x0001};
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
Uint32 l_input, r_input,l_output, r_output;
DSK6713_init();
hCodec = DSK6713_AIC23_openCodec(0, &config);
DSK6713_AIC23_setFreq(hCodec, 3);
while(1)
{
while(!DSK6713_AIC23_read(hCodec, &l_input));
while(!DSK6713_AIC23_read(hCodec, &r_input));
l_output=IIR_FILTER(&filter_coeff ,l_input);
r_output=l_output;
while(!DSK6713_AIC23_write(hCodec, l_output));
while(!DSK6713_AIC23_write(hCodec, r_output));
}
DSK6713_AIC23_closeCodec(hCodec);
}
51. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 51
signed int IIR_FILTER(const signed int * h, signed int x1)
{
static signed int x[6] = {0,0,0,0,0,0};
static signed int y[6] = {0,0,0,0,0,0};
int temp=0;
temp = (short int)x1;
x[0] = (signed int) temp;
temp = ( (int)h[0] * x[0]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[1] * x[1]);
temp += ( (int)h[2] * x[2]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[4] * y[1]);
temp -= ( (int)h[5] * y[2]);
temp >>=15;
if ( temp > 32767 )
{
temp = 32767;
}
else if ( temp < -32767)
{
temp = -32767;
}
y[0] = temp;
y[2] = y[1];
y[1] = y[0];
x[2] = x[1];
x[1] = x[0];
return (temp<<2);
}
52. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 52
DSP STARTER KIT DSK6713
OUTPUT SNAP SHOTS
1. APPLIED INPUT TO FILTER
Fig : applying 2V p-p as input for the filter
OUT PUT OF L.P.FILTER AT CUTOFF FREQUENCY
L.P.FILTER OUT PUT WILL BE ZERO AFTER CUTOFF FREQUENCY
53. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 53
EXPERMENTAL SETUP OF FINAL IMPLIMENTATION OF LPF
RESULT: Hence implementation of IIR FILTERS (LPF/HPF) on DSK 6713 DSP starter kit is done
successfully.
VIVA QUESTIONS
1. List some advantages of digital filters over analog filters.
2. Write some differences between FIR and IIR filters.
3. What are the different methods to design IIR filters?
4. Why IIR filters are not reliable?
5. What are different applications of IIR filters?
6. What are advantages of IIR filters?
7. What are disadvantages of IIR filters?
8. Differentiate Butterworth and Chebyshev approximations.
9. What is meant by impulse response?
10. What is the importance of impulse response to calculate the o/p response of the filter?
54. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 54
EXPERIMENT NO-6:
VERIFICATION OF N-POINT FAST FOURIER TRANSFORM ALGORITHM
AIM: To verify N-point Fast Fourier Transform Algorithm.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
THEORY:
The Fast Fourier Transform is useful to map the time-domain sequence into a continuous function
of a frequency variable. The FFT of a sequence {x(n)} of length N is given by a complex-valued
sequence X(k).
The above equation is the mathematical representation of the DFT. As the number of
computations involved in transforming an N point time domain signal into its corresponding
frequency domain signal was found to be N2 complex multiplications, an alternative algorithm
involving lesser number of computations is opted.
PROGRAM:
clc;
clear all;
close all;
tic;
x=input('enter the sequence');
n=input('enter the length of fft');
%compute fft
disp('fourier transformed signal');
X=fft(x,n)
subplot(1,2,1);stem(x);
title('i/p signal');
xlabel('n --->');
ylabel('x(n) -->');grid;
subplot(1,2,2);stem(X);
title('fft of i/p x(n) is:');
xlabel('Real axis --->');
ylabel('Imaginary axis -->');grid;
55. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 55
OUTPUT:
RESULT: Hence N-point Fast Fourier Transform Algorithm is verified successfully.
VIVA QUESTIONS
1. Define transform. What is the need for transform?
2. Differentiate Fourier transform and discrete Fourier transform.
3. Differentiate DFT and DTFT.
4. What are the advantages of FFT over DFT?
5. Differentiate DITFFT and DIFFFT algorithms.
6. What is meant by radix?
7. What is meant by twiddle factor and give its properties?
8. How FFT is useful to represent a signal?
9. Compare FFT and DFT with respect to number of calculation required?
10. How the original signal is reconstructed from the FFT of a signal?
56. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 56
EXPERIMENT NO-7:
GENERATION OF SUM OF SINUSOIDAL SIGNALS USING MATLAB
AIM: to generate Sum of Sinusoidal Signals using MATLAB.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
OS: Windows XP
THEORY:
When two sinusoids are added together the result depends upon their amplitude, frequency and phase. The
effects are easiest to observe when only one of these is varied between the two sinusoids being added.
In the simplest case, when two sinusoids with the same frequency and phase but with different amplitudes are
added together the result is a sinusoid who's amplitude is the sum of the originals and who's frequency and
phase remain unchanged.
When the two sinusoids have different frequencies the result is more complicated. The new signal is no longer a
sinusoid since it doesn't follow the simple up and down pattern. Instead we see the higher frequency sinusoid as
a `ripple' superimposed on the lower frequency sinusoid (see figure). The frequency of the resulting signal will
be the lower of the two original frequencies. In the figure we can see that the resulting signal goes through two
and a half cycles (that is it repeats itself this many times) just like the second sinusoid. The amplitude of the
resulting signal is the sum of the originals and the phase is unchanged.
Adding together sinusoids with different phases can have surprising results. If two sinusoids are `in phase' then
their peaks and troughs coincide and the result is as observed earlier. If the sinusoids are `out of phase' or in
other words if they differ in phase by π radians then their peaks and troughs oppose each other and they will
cancel each other out. The phase of the resulting sinusoid is the sum of the phases of the constituents.
57. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 57
Adding up more than two sinusoids can produce complex looking waveforms. When a number of different
frequencies are combined the frequency of the result will in general be that of the lowest frequency component.
This is often called the fundamental frequency of the signal.
PROGRAM:
clc;
clear all;
close all;
tic;
%giving linear spaces
t=0:.01:pi;
% t=linspace(0,pi,20);
%generation of sine signals
y1=sin(t);
y2=sin(3*t)/3;
y3=sin(5*t)/5;
y4=sin(7*t)/7;
y5=sin(9*t)/9;
y = sin(t) + sin(3*t)/3 + sin(5*t)/5 + sin(7*t)/7 + sin(9*t)/9;
plot(t,y,t,y1,t,y2,t,y3,t,y4,t,y5);
legend('y','y1','y2','y3','y4','y5');
title('generation of sum of sinusoidal signals');grid;
ylabel('---> Amplitude');
xlabel('---> t');
toc;
58. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 58
OUTPUT:
RESULT: Hence Sum of Sinusoidal Signals using MATLAB is generated successfully.
VIVA QUESTIONS
1. Define Gibb’s phenomena.
2. What is meant by ringing effect?
3. Why do we need to represent a signal in frequency domain?
4. Why Fourier Series converges only for periodic signals?
5. How the ringing effect can be rectified?
6. What are the different forms of Fourier series?
7. What are the limitations of Fourier series?
8. Write few applications of Fourier series.
9. Explain the MATLAB functions ‘tic’ and ‘toc’.
10. Explain the MATLAB function ‘legend’.
59. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 59
EXPERIMENT NO-8:
VERIFICATION THE FREQUENCY RESPONSE OF ANALOG LP/HP FILTERS USING MATLAB
AIM: To verify the frequency response of analog LP/HP filters using MATLAB.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
OS: Windows XP
THEORY:
Analog Low pass filter & High pass filter are obtained by using Butterworth or Chebyshev filter with
coefficients are given. The frequency – magnitude plot gives the frequency response of the filter.
PROGRAM:
clc;
clear all;
close all;
warning off;
disp('enter the IIR filter design specifications');
rp=input('enter the passband ripple');
rs=input('enter the stopband ripple');
wp=input('enter the passband freq');
ws=input('enter the stopband freq');
fs=input('enter the sampling freq');
w1=2*wp/fs;w2=2*ws/fs;
[n,wn]=buttord(w1,w2,rp,rs,'s');
c=input('enter choice of filter 1. LPF 2. HPF n ');
if(c==1)
disp('Frequency response of IIR LPF is:');
[b,a]=butter(n,wn,'low','s');
end
if(c==2)
disp('Frequency response of IIR HPF is:');
[b,a]=butter(n,wn,'high','s');
end
w=0:.01:pi;
[h,om]=freqs(b,a,w);
m=20*log10(abs(h));
an=angle(h);
figure,subplot(2,1,1);plot(om/pi,m);
title('magnitude response of IIR filter is:');
xlabel('(a) Normalized freq. -->');
ylabel('Gain in dB-->');
subplot(2,1,2);plot(om/pi,an);
title('phase response of IIR filter is:');
xlabel('(b) Normalized freq. -->');
ylabel('Phase in radians-->');
60. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 60
OUTPUT:
RESULT: Hence the frequency response of analog LP/HP filters using MATLAB is verified
successfully.
VIVA QUESTIONS
1. What are the filter specifications required to design the analog filters?
2. What is meant by frequency response of filter?
3. What is meant by magnitude response?
4. What is meant by phase response?
5. Differentiate ideal filter and practical filter responses.
6. What are the different types of analog filter approximations?
7. Define order of the filter and explain important role it plays in designing of a filter.
8. Explain advantages and disadvantages of Butterworth filter
9. Explain advantages and disadvantages of Chebyshev filter
10. Why Chebyshev is better than Butterworth filter?
61. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 61
EXPERIMENT NO-9:
COMPUTATION OF POWER DENSITY SPECTRUM OF A SEQUENCE USING MATLAB
AIM: to compute Power Density Spectrum of a sequence using MATLAB.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
OS: Windows XP
THEORY:
By the definition of energy spectral density require that the Fourier transforms of the signals
exist, that is, that the signals are integrable/summable or square-integrable/square-summable. (Note:
The integral definition of the Fourier transform is only well-defined when the function is integrable. It
is not sufficient for a function to be simply square-integrable. In this case one would need to use the
Plancherel theorem.) An often more useful alternative is the power spectral density (PSD), which
describes how the power of a signal or time series is distributed with frequency. Here power can be
the actual physical power, or more often, for convenience with abstract signals, can be defined as the
squared value of the signal, that is, as the actual power dissipated in a load if the signal were a
voltage applied across it. This instantaneous power (the mean or expected value of which is the
average power) is then given by
P(t) = s(t)2 for a signal s(t).
PROGRAM:
t = 0:0.001:0.6;
x = sin(2*pi*50*t)+sin(2*pi*120*t);
y = x + 2*randn(size(t));
figure, plot(1000*t(1:50),y(1:50)) ;
title('Signal Corrupted with Zero-Mean Random Noise');
xlabel('time (milliseconds)');
Y = fft(y,512);
%The power spectral density, a measurement of the energy at various frequencies, is:
Pyy = Y.* conj(Y) / 512;
f = 1000*(0:256)/512;
figure, plot(f,Pyy(1:257));
title('Frequency content of y');
xlabel('frequency (Hz)');
62. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 62
OUTPUT:
RESULT: Hence the Power Density Spectrum of a given sequence using MATLAB is computed
successfully.
VIVA QUESTIONS
1. Define power signal.
2. Define energy signal.
3. Define power spectral density of a signal.
4. How the energy of a signal can be calculated?
5. Explain difference between energy spectral density and power spectral density.
6. Explain the PSD plot.
7. What is the importance of PSD?
8. What are the applications of PSD?
9. Explain MATLAB function randn(size(n)).
10. What is the need to represent the signal in frequency domain?
63. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 63
EXPERIMENT NO-10:
COMUTATION OF FFT OF 1-D SIGNAL USING MATLAB
AIM: To find the FFT of given 1-D signal and plot.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
DSK6713 DSP Starter kit CCS Studio 3-1
USB Cable, Power Adapter OS: Windows XP
THEORY:
A fast Fourier transform (FFT) is an efficient algorithm to compute the discrete Fourier
transform (DFT) and it’s inverse. There are many distinct FFT algorithms involving a wide range of
mathematics, from simple complex-number arithmetic to group theory and number theory; this
article gives an overview of the available techniques and some of their general properties, while the
specific algorithms are described in subsidiary articles linked below.
A DFT decomposes a sequence of values into components of different frequencies. This
operation is useful in many fields (see discrete Fourier transform for properties and applications of
the transform) but computing it directly from the definition is often too slow to be practical. An FFT is
a way to compute the same result more quickly: computing a DFT of N points in the naive way, using
the definition, takes (N2) arithmetical operations, while an FFT can compute the same result in only
(N log N) operations. The difference in speed can be substantial, especially for long data sets where N
may be in the thousands or million in practice, the computation time can be reduced by several orders
of magnitude in such cases, and the improvement is roughly proportional to N / log(N).
C Program:
#include<stdio.h>
#include<math.h>
#define N 32
#define pI 3.14159
typedef struct
{
float real,imag;
}
complex;
float iobuffer[N];
float y[N];
main()
{
int i;
complex w[N];
complex x[N];
complex temp1,temp2;
int j,k,upper_leg,lower_leg,leg_diff,index,step;
for(i=0;i<N;i++)
{
iobuffer[i]=sin((2*pI*2*i)/32.0);
}
for(i=0;i<N;i++)
{
x[i].real=iobuffer[i];
x[i].imag=0.0;
}
for(i=0;i<N;i++)
65. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 65
return(0);
}
OUTPUT:
Graph Of Input Signal: sinusoidal Signal
OUTPUT GRAPH: FFT of Sinusoidal Signal
RESULT: Hence the FFT of given 1-D signal is computed and plotted successfully.
VIVA QUESTIONS
1. Define signal, Give Examples for 1-D, 2-D, 3-D signals.
2. Explain mathematical formula for calculation of FFT.
3. Explain mathematical formula for calculation of IFFT.
4. How to calculate FT for 1-D signal?
5. Define DFT for 1-D signal.
6. What is meant by magnitude plot, phase plot, power spectrum?
7. Explain the importance of FFT.
8. Explain the applications of FFT.
9. What are separable transforms?
10. Explain Modulation property of Fourier Transform.
66. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 66
EXPERIMENT-11:
FREQUENCY RESPONSE OF ANTI IMAGING AND ANTI ALIASING FILTERS
AIM: To observe the frequency responses of anti imaging and anti aliasing filters.
EQUIPMENT REQUIRED:
Hardware required Software Required
PC MATLAB
OS: Windows XP
THEORY:
The FIR Interpolator object up samples an input by the integer up sampling factor, L,
followed by an FIR anti-imaging filter. The filter coefficients are scaled by the interpolation factor. A
poly phase interpolation structure implements the filter. The resulting discrete-time signal has a
sampling rate L times the original sampling rate. The demo versions illustrate two possible decimator
design solutions. The floating-point version model uses a cascade of three poly phase FIR decimators.
This approach reduces computation and memory requirements as compared to a single decimator by
using lower-order filters. Each decimator stage reduces the sampling rate by a factor of four. The
fixed-point version uses a five-section CIC decimator to reduce the sampling rate by the same factor
of 64. While not as flexible as a FIR decimator, the CIC decimator has the advantage of not requiring
any multiply operations. It is implemented using only additions, subtractions, and delays. Therefore,
it is a good choice for a hardware implementation where computational resources are limited.
PROGRAM FOR ANTI IMAGING FILTER
clear all;
n=0:1:1023;
x=1/4*sinc((1/4)*(n-512)).^2
i=1:1024;
y=[zeros(1,2048)];
y(2*i)=x;
f=-2:1/512:2;
h1=freqz(x,1,2*pi*f);
h2=freqz(y,1,2*pi*f);
subplot(3,1,1);
plot(f,abs(h1));
xlabel('frequency');
ylabel('magnitude');
title('frequecny response of input sequence');
subplot(3,1,2);
plot(f,abs(h2));
xlabel('frequency');
ylabel('magnitude');
title('frequency reponse of up sampled input sequence ');
p=fir1(127,.3);
xf=filter(p,1,y);
h4=freqz(xf,1,2*pi*f);
subplot(3,1,3);
plot(f,abs(h4));
title('frequency response of output of an anti imanaging filter');
xlabel('frequency');
ylabel('magnitude');
67. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 67
OUTPUT:
PROGRAM FOR ANTI ALIASING FILTER:
clear all;
F=input('enter the highest normalized frequency component');
D=input('emter the dicimation factor');
n=0:1:1024;
xd=(F/2*sinc(F/2)*(n-512)).^2;
f=-2:1/512:2;
h1=freqz(xd,1,pi*f);
subplot(3,1,1);
plot(f,abs(h1));
xlabel('frequency');
ylabel('magnitude');
title('frequency response of input sequence');
if(F*D<=1)
xd1=F/2*sinc(F/2*(n-512)*D).^2;
h2=freqz(xd1,1,pi*f*D);
subplot(3,1,3)
plot(f,abs(h2));
axis([-2 2 0 1]);
h2=freqz(xd1,1,pi*f*D);
subplot(3,1,2);
plot(f*D,abs(h2));
axis([-2*D 2*D 0 1]);
else
p=fir1(127,1/D);
xf=filter(p,1,xd);
h4=freqz(xf,1,pi*f);
subplot(3,1,3);
plot(f,abs(h4));
title('FREQUENCY RESPONSE OF OUTPUT OF ANTI ALIASING FILTER');
xlabel('frequency');
ylabel('magnitude');
i=1:1:1024/D;
68. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 68
xr=xf(i*D);
h5=freqz(xr,1,pi*f*D);
subplot(3,1,2);
plot(f*D,abs(h5));
title('frequency response of output of downsampler');
xlabel('frequency');
ylabel('magnitude');
end;
enter the highest normalized frequency component 0.25
enter the decimation factor 5
OUTPUT:
RESULT: Hence the frequency responses of anti imaging and anti aliasing filters are observed
successfully.
VIVA QUESTIONS
1. Explain about multi rate digital signal processing.
2. List the Applications of multi rate digital signal processing.
3. Define interpolation.
4. Define decimation.
5. Define aliasing.
6. What is meant anti aliasing?
7. What is the effect of anti imaging filter?
8. Define sampling rate.
9. What is the use of sampling rate convertors?
10. Explain advantages of anti aliasing filters.
69. RCE DIGITAL SIGNAL PROCESSING LAB
Department of Electronics & Communication Engineering 69
PROCEDURE FOR HARDWARE EXECUTION
I. Consignment list
1. A main board of DSP6713 -1No
2. Power Supply 5V, 3A. - 1No
3. USB Programmer-1No
4. USB Cable -1No
4. Head Phone with MIC -1No
5. Audio Jack -3No [1+2]
6. Sample and Syllabus Programs CD -1No
7. DSP Lab Manual -1No
II. Introduction of main board
1. USB2.0 CY7C68013-56PVC, compatible with USB2.0 and USB1.1, including 8051
2. DSP TMS320C6713 TQFP-208 Package Device with, 4 layers board
3. SDRAM MT48LC4M16A2 1meg*16 *4 bank micron
4. FLASH AM29LV800B 8Mbit1Mbyte of AMD
5. RESET chip specialize for reset with button for manually reset
6. POWER supply externally, special 5V, 3.3V, 1.6V chip for steady voltage with remaining for other
devices.
7. EEPROM 24LC64 for download of USB firmware
8. CPLD XC95144XL
9. AIC TLV320AIC23B sampling with 8-96KHZ, 4 channels
III. The setup of XDS510 USB emulator in CCS V3.1
1. Install CCS V3.1 software according to the Custom Install default Custom Install_could changes the
installation directory. Following is an example of install the software under C disk root directory.
2. Install USB Emulator choose to install directory from CCS v3.1 that is if CCSv3.1 is installed in C: /
CCStudio_v3.1 directory, then install the USB emulator driver in this directory.
3. Replace TIXDS510_Connection.xml file [From CCStudio_v3.1driversTargetDB connection
with the TIXDS510_Connection.xml in xds510_setup directory.]
Procedure to Setup Emulator:
Start->Program->Texas Instrument-> Code Composer Studio 3.1 ->Setup Code Composer Studio
v3.1, the window of Code Composer Studio Setup will show up.
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1. Open the Setup CCStudio v3.1
2. Select Create Board (Marked in Circle, can witness in the below Figure)
Chose this option
3. Right Click on the TI XDS510 emulator and select add to system.. Enter,
(After selecting that options a Connection Properties window will be opened as shown in step
4).
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4. Provide Connection Name as ChipMax_6713 and click on Next.
5. Choose the option falling edge is JTAG Standard in TMS/TDO Output Timing.
6. Right Click on TMS320C6710 and Select Add to System…Enter.
7. a) Provide Processor Name as TMS320C6713_0
b) Select GEL File, Click on browse icon and select DSP621x_671x.gel.
c) Select N/A in Master/Slave.
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d) Click on Ok.
8. Click on Save and quit (highlighted by Circle).
9. Click on Yes to start Code Composer Studio.
10. Go to Debug and select the option connect by holding Reset button on the Board.
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11. Now Target is connected