The document compares Intel Core i3, i5, and i7 processors as well as Core 2 Duo processors. It provides details on the architecture and features of each:
- Core i3 processors have dual cores with hyper-threading. Core i5 processors have dual cores with slightly higher clock speeds than i3, hyper-threading, and turbo boost. Core i7 processors have dual or quad cores with higher clock speeds than i5, hyper-threading, turbo boost, virtualization support, and new instruction sets.
- Core 2 Duo processors were Intel's previous dual-core processors before the Core i-series. They provided benefits of multitasking over single-core processors but were about 20
Double Data Rate Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR SDRAM, is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM, DDR3 SDRAM, and DDR4 SDRAM, and soon will be superseded by DDR5 SDRAM. None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work in DDR1-equipped motherboards, and vice versa.
Compared to single data rate (SDR) SDRAM, the DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals. Implementations often have to use schemes such as phase-locked loops and self-calibration to reach the required timing accuracy.[4][5] The interface uses double pumping (transferring data on both the rising and falling edges of the clock signal) to double data bus bandwidth without a corresponding increase in clock frequency. One advantage of keeping the clock frequency down is that it reduces the signal integrity requirements on the circuit board connecting the memory to the controller. The name "double data rate" refers to the fact that a DDR SDRAM with a certain clock frequency achieves nearly twice the bandwidth of a SDR SDRAM running at the same clock frequency, due to this double pumping.
Double Data Rate Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR SDRAM, is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM, DDR3 SDRAM, and DDR4 SDRAM, and soon will be superseded by DDR5 SDRAM. None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work in DDR1-equipped motherboards, and vice versa.
Compared to single data rate (SDR) SDRAM, the DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals. Implementations often have to use schemes such as phase-locked loops and self-calibration to reach the required timing accuracy.[4][5] The interface uses double pumping (transferring data on both the rising and falling edges of the clock signal) to double data bus bandwidth without a corresponding increase in clock frequency. One advantage of keeping the clock frequency down is that it reduces the signal integrity requirements on the circuit board connecting the memory to the controller. The name "double data rate" refers to the fact that a DDR SDRAM with a certain clock frequency achieves nearly twice the bandwidth of a SDR SDRAM running at the same clock frequency, due to this double pumping.
PIC A special purpose integrated circuit that function as an overall manager in an interrupt driven system.
It accepts request from the peripheral equipment,determines which of the incoming request is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination.
found this one in one of my abandoned folders. AC(students from JUCSE need no introduction but for others you should never want to know him :-O) assigned this task to me and 3 of my fellow classmates to create a presentation on this uninteresting and weird topic. We pulled it off however :P
It is a presentation for the Embedded System Basics. It will be very useful for the engineering students who need to know the basics of Embedded System.
PIC A special purpose integrated circuit that function as an overall manager in an interrupt driven system.
It accepts request from the peripheral equipment,determines which of the incoming request is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination.
found this one in one of my abandoned folders. AC(students from JUCSE need no introduction but for others you should never want to know him :-O) assigned this task to me and 3 of my fellow classmates to create a presentation on this uninteresting and weird topic. We pulled it off however :P
It is a presentation for the Embedded System Basics. It will be very useful for the engineering students who need to know the basics of Embedded System.
INTRODUCTION TO COMPUTER SYSTEMS ARCHITECTURE1_17 December 2023.pptMozammelHaque53
This is a lecture PowerPoint slide for the students of universities worldwide who desire to learn and advance his or her knowledge and expertise on Computer systems architecture.
Automobile Management System Project Report.pdfKamal Acharya
The proposed project is developed to manage the automobile in the automobile dealer company. The main module in this project is login, automobile management, customer management, sales, complaints and reports. The first module is the login. The automobile showroom owner should login to the project for usage. The username and password are verified and if it is correct, next form opens. If the username and password are not correct, it shows the error message.
When a customer search for a automobile, if the automobile is available, they will be taken to a page that shows the details of the automobile including automobile name, automobile ID, quantity, price etc. “Automobile Management System” is useful for maintaining automobiles, customers effectively and hence helps for establishing good relation between customer and automobile organization. It contains various customized modules for effectively maintaining automobiles and stock information accurately and safely.
When the automobile is sold to the customer, stock will be reduced automatically. When a new purchase is made, stock will be increased automatically. While selecting automobiles for sale, the proposed software will automatically check for total number of available stock of that particular item, if the total stock of that particular item is less than 5, software will notify the user to purchase the particular item.
Also when the user tries to sale items which are not in stock, the system will prompt the user that the stock is not enough. Customers of this system can search for a automobile; can purchase a automobile easily by selecting fast. On the other hand the stock of automobiles can be maintained perfectly by the automobile shop manager overcoming the drawbacks of existing system.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
Event Management System Vb Net Project Report.pdfKamal Acharya
In present era, the scopes of information technology growing with a very fast .We do not see any are untouched from this industry. The scope of information technology has become wider includes: Business and industry. Household Business, Communication, Education, Entertainment, Science, Medicine, Engineering, Distance Learning, Weather Forecasting. Carrier Searching and so on.
My project named “Event Management System” is software that store and maintained all events coordinated in college. It also helpful to print related reports. My project will help to record the events coordinated by faculties with their Name, Event subject, date & details in an efficient & effective ways.
In my system we have to make a system by which a user can record all events coordinated by a particular faculty. In our proposed system some more featured are added which differs it from the existing system such as security.
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About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdfKamal Acharya
The College Bus Management system is completely developed by Visual Basic .NET Version. The application is connect with most secured database language MS SQL Server. The application is develop by using best combination of front-end and back-end languages. The application is totally design like flat user interface. This flat user interface is more attractive user interface in 2017. The application is gives more important to the system functionality. The application is to manage the student’s details, driver’s details, bus details, bus route details, bus fees details and more. The application has only one unit for admin. The admin can manage the entire application. The admin can login into the application by using username and password of the admin. The application is develop for big and small colleges. It is more user friendly for non-computer person. Even they can easily learn how to manage the application within hours. The application is more secure by the admin. The system will give an effective output for the VB.Net and SQL Server given as input to the system. The compiled java program given as input to the system, after scanning the program will generate different reports. The application generates the report for users. The admin can view and download the report of the data. The application deliver the excel format reports. Because, excel formatted reports is very easy to understand the income and expense of the college bus. This application is mainly develop for windows operating system users. In 2017, 73% of people enterprises are using windows operating system. So the application will easily install for all the windows operating system users. The application-developed size is very low. The application consumes very low space in disk. Therefore, the user can allocate very minimum local disk space for this application.
Saudi Arabia stands as a titan in the global energy landscape, renowned for its abundant oil and gas resources. It's the largest exporter of petroleum and holds some of the world's most significant reserves. Let's delve into the top 10 oil and gas projects shaping Saudi Arabia's energy future in 2024.
Vaccine management system project report documentation..pdfKamal Acharya
The Division of Vaccine and Immunization is facing increasing difficulty monitoring vaccines and other commodities distribution once they have been distributed from the national stores. With the introduction of new vaccines, more challenges have been anticipated with this additions posing serious threat to the already over strained vaccine supply chain system in Kenya.
Water scarcity is the lack of fresh water resources to meet the standard water demand. There are two type of water scarcity. One is physical. The other is economic water scarcity.
Explore the innovative world of trenchless pipe repair with our comprehensive guide, "The Benefits and Techniques of Trenchless Pipe Repair." This document delves into the modern methods of repairing underground pipes without the need for extensive excavation, highlighting the numerous advantages and the latest techniques used in the industry.
Learn about the cost savings, reduced environmental impact, and minimal disruption associated with trenchless technology. Discover detailed explanations of popular techniques such as pipe bursting, cured-in-place pipe (CIPP) lining, and directional drilling. Understand how these methods can be applied to various types of infrastructure, from residential plumbing to large-scale municipal systems.
Ideal for homeowners, contractors, engineers, and anyone interested in modern plumbing solutions, this guide provides valuable insights into why trenchless pipe repair is becoming the preferred choice for pipe rehabilitation. Stay informed about the latest advancements and best practices in the field.
The Benefits and Techniques of Trenchless Pipe Repair.pdf
Difference between i3 and i5 and i7 and core 2 duo
1. Difference between i3 and i5 and i7 and core 2
duo
Generally speaking the current generation of Core i3/i5/i7 have about 20% more processing power than
their Core 2 Duo counterparts.
Core i3:
-Dual Core CPU
-Hyper Threading
Core i5:
-Dual Core CPU
-Slightly higher clock speeds than core i3
-Hyper Threading
-Turbo Boost (it's like an automatic overclock if the CPU is not too hot)
Core i7:
-Dual Core CPU (models ending with M)
-Quad Core CPU (models ending with QM)
-Higher clockspeed than the Core i5
-Hyper Threading
-Turbo Boost
-Virtualization (you can run multiple operating systems at the same time)
-Has circuitry that allows for easier and more secure remote access for corporate IT departments to
trouble issues in a business environment.
-AE5 New Instruction set
Dual core processors are new generation processors which have two cores in one processor. Like
Pentium 4 processors had only one/single core in them but after 2005, intel produced dual core
processors and named it "Core 2 Duo". With one core processor, u can do multitasking but it will slow
down ur computer. but with dual core processors, u can do multitasking without slowing down ur pc. Like
with intel's dual core processor "Core 2 Duo" with speed of 2.2GHz, u can allot one core to scan for virus
and simultaneously u can play a game!!
Intel's Core 2 Duo is now behind Intel's Core 2 Quad processors where u have 4 cores!! Intel's Core 2
Extreme processors are also quad processors but are specially produced for gaming rigs!!
Turbo Boost Technology
Intel® Turbo Boost Technology 2.01
automatically allows processor cores to run faster than the
rated operating frequency if they’re operating below power, current, and temperature specification
limits.
2. Intel Turbo Boost Technology 2.0 is activated when the Operating System (OS) requests a frequency
higher than the rated frequency of the processor. Whether the processor enters into and the
amount of time the processor spends in the Intel Turbo Boost Technology 2.0 state depends on the
workload and operating environment.
Maximum turbo frequency indicates the highest possible frequency achievable when conditions allow
the processor to enter turbo mode. Intel Turbo Boost Technology frequency varies depending on
workload, hardware, software and overall system configuration.
Due to varying power characteristics, some parts with Intel Turbo Boost Technology 2.0 may not
achieve maximum turbo frequencies when running heavy workloads and using multiple cores
concurrently.
Availability and frequency upside of Intel Turbo Boost Technology 2.0 state depends upon a number
of factors including, but not limited to the following:
Type of workload
Number of active cores
Estimated current consumption
Estimated power consumption
Processor temperature
When the processor is operating below these limits and the user's workload demands additional
performance, the processor frequency will dynamically increase until the upper limit of frequency is
reached. Intel Turbo Boost Technology 2.0 has multiple algorithms operating in parallel to manage
current, power, and temperature to maximize frequency and energy efficiency. Note: Intel Turbo
Boost Technology 2.0 allows the processor to operate at a power level that is higher than its TDP
configuration and data sheet specified power for short durations to maximize performance.
What is workstation
A workstation is a special computer designed for technical or scientific applications. Intended
primarily to be used by one person at a time, they are commonly connected to a local area
network and run multi-user operating systems. The term workstation has also been used loosely to
refer to everything from a mainframe computer terminal to a PC connected to a network, but the
most common form refers to the group of hardware offered by several current and defunct
companies such as Sun Microsystems, Silicon Graphics, Apollo Computer, DEC, HP and IBM which
opened the door for the 3D graphics animation revolution of the late 1990s.
Workstations offered higher performance than mainstream personal computers, especially with
respect to CPU and graphics, memory capacity, and multitasking capability. Workstations were
optimized for the visualization and manipulation of different types of complex data such as 3D
3. mechanical design, engineering simulation (e.g. computational fluid dynamics), animation and
rendering of images, and mathematical plots. Typically, the form factor is that of a desktop computer,
consist of a high resolution display, a keyboard and amouse at a minimum, but also offer multiple
displays, graphics tablets, 3D mice (devices for manipulating 3D objects and navigating scenes), etc.
Workstations were the first segment of the computer market to present advanced accessories
and collaboration tools.
The increasing capabilities of mainstream PCs in the late 1990s have blurred the lines somewhat
with technical/scientific workstations. The workstation market previously employed proprietary
hardware which made them distinct from PCs; for instance IBM used RISC-based CPUs for its
workstations and Intel x86 CPUs for its business/consumer PCs during the 1990s and 2000s.
However by the late 2000s this difference disappeared, as workstations now use
highly commoditized hardware dominated by large PC vendors, such asDell and HP & Fujitsu,
selling Microsoft Windows or GNU/Linux systems running on x86-64 architecture such as
Intel Xeon or AMDOpteron CPUs.
What is Bit Slice Processor?
Bit slicing is a technique for constructing a processor from modules of smaller bit width. Each of
these components processes one bit field or "slice" of an operand. The grouped processing
components would then have the capability to process the chosen full word-length of a particular
software design. Bit slice processors usually consist of an arithmetic logic unit (ALU) of 1, 2, 4 or 8
bits and control lines (including carry or overflow signals that are internal to the processor in non-
bitsliced designs). For example, two 4-bit ALUs could be arranged side by side, with control lines
between them, to form an 8-bit,16-bit,32-bit words (so the designer can add as many slices he wants
to make it to manipulate longer words lengths). A microsequencer or Control ROM would be used to
execute logic to provide data and control signals to regulate function of the component ALUs.
Examples of bit-slice microprocessor modules can be seen in the Intel 3000 family, the AMD's
Am2900 family the National Semiconductor IMP-16 and IMP-8 family, and the 74181.
what is tri-state buffer
We've had a long discussion about what a tri-state buffer is, but not about what such
a device is good for.
4. Recall (from earlier) that a common way for many devices to communicate with one
another is on a bus, and that a bus should only have one device writing to it, although
it can have many devices reading from it.
Since many devices always produce output (such as registers) and these devices are
hooked to a bus, we need a way to control what gets on the bus, and what doesn't.
A tri state buffer is good for that.
Here's an example:
There are three devices, each of which output 32 bits. These devices have their
outputs hooked to a 32 bit bus.
We want to prevent more than one device from writing to the bus. Ordinarily, these
devices always generate output, so we're in trouble merely by attaching more than one
device's output to the bus.
As long as at most one of the following control bits, c0, c1, c2, is 1, the bus is fine.
That is, the bus will not have two devices attempting to write to it at the same time.
5. Alternative: Using a MUX
Tri-state buffers are one way of preventing an output from making it to the bus.
An alternate way is to use a MUX. For example, we might have a 32 bit, 3-1 MUX.
The advantage of a MUX is that we're guaranteed only one device makes it to the bus.
The drawback is that we might want no devices to make it to the bus.
One solution is to add an enable input to a MUX. When the enable is active, the
output is selected from one of the inputs. When the enable is not active, then the
output is Z.
Summary
A tri-state buffer is a device that allows you to control when an output signal makes
it to the bus. When the tri-state buffer's control bit is active, the input of the device
makes it to the output. This is when the "valve" is open.
When it's not active, the output of the device is Z, which is high-impedance or,
equivalently, nothing. This is when the "valve" is closed, and no electrical signal is
allowed to pass to the output.
The "valve" analogy helps make it easy to understand the behavior of a tri-state
buffer.
1) What type of architecture used in 8085 microprocessor?
Ans. 8085 has Von Neumann architecture. It is named after the mathematician John
Von Neumann. It is based on the concept of stored program control. In this architecture
both the data and the program is stored in the same memory.
2) What is the function of accumulator?Interview Questions on Microprocessor 8085
Ans. Accumulator is an 8 bit register which stores data and performs arithmetic and logical
operations. The result of the operation is stored in the accumulator. It is designated by the letter
‘A’.
3) What are the different types of flags in 8085 microprocessor?Interview Questions on
Microprocessor 8085
6. Ans. There are 5 different flags in 8085 microprocessor. Though the flag register is of 8 bit but 3
bits are not in use. Only 5 bits are used for the different flags. They are:-
a) Sign flag(s)- This is designated by the letter ‘S’. If sign bit is 1 then the sign flag is set to 1
and if the sign bit is zero then sign flag is reset to zero.
b) Zero flag(z)- This is designated by the letter ‘z’. If the result of any arithmetic or logical
operation is zero i.e. all the bits are zero then zero flag is set to 1 else it is set to zero.
c) Auxiliary carry- (AC) This flag is set to 1 only when any intermediate carry is produced. Else
it is reset to 0.
d) Parity flag (P) – when the result of any operation has odd number of ones then parity flag is
set to 1 else if it has even number of ones then it is reset to 0.
e) Carry flag(C) – this flag is set to 1 only when a carry is produced in the result i.e. the carry bit
is 1 else if the carry bit is zero then the flag is reset to zero.
4) What are the types of general purpose registers in 8085?
Ans. There are 6 general purpose registers in 8085 microprocessor. They are designated by the
letters – B, C, D, E, H, and L. These are 8 bit registers and are used to store data temporarily
during the execution of any program. These registers can also be used to store 16 bit data by
using them in pairs i.e. BC, DE and HL. These pairs cannot be changed as B cannot pair with
any other register other than C.
5) What is the length of stack pointer in 8085 microprocessor? And what is its use?
Interview Sample paper question answer on 8085 Microprocessor.
Ans. stack pointer is of 16 bits length and is used to point to the value at top of the stack for the
currently executed instruction.
6) What is the memory size of 8085 microprocessor? Placement Interview Sample paper
question answer on 8085 Microprocessor
Ans. 8085 has 8 data lines and 16 address lines. The memory size of any microprocessor depends
on the number of address lines. The general formula is 2^n, where n= number of address lines.
For 8085 there are 2^16= 64 Kbytes memory size.
7) How many bits is 8085 microprocessor? Sample Paper Interview question answer
7. Ans. Microprocessor is named on the basis of number of data lines in it. 8085 is a 8 bit
microprocessor as it has 8 bit data lines.
8) What are the various interrupts in 8085 microprocessor? Which is the highest priority
interrupt? Important questions on Microprocessor 8085
There are 5 types of interrupts in 8085. They are
a) TRAP
b) RST 7.5
c) RST 6.5
d) RST 5.5
e) INTR
TRAP has the highest priority among all the interrupts.
9) Which type of cycle is used for fetch and execute instruction? Sample Paper Interview
question answer
Ans. Instruction cycle is used for the fetch and execute instruction.
In this cycle the instruction is fetched, decoded and executed to produce the required output.
10) How many address lines are there in 8085 microprocessor? Sample Paper Interview
question answer
Ans. There are 16 address lines in 8085. They are multiplexed address and data lines. Address
bus of 8085 is of 16 bits. During the first machine cycle these address lines are used as data lines
and in the next machine cycle all the 16 lines act as address lines.
The multiplexed 8 address and data lines refer to lower order address bit and the rest 8 for higher
order address bits.
11) What is a Microprocessor?
Ans:- Microprocessor is a program-controlled device, that fetches the instructions from memory,
decode it & executes the instructions. Generally Microprocessor are single- chip devices.
12) Why crystal is being preferred as a clock source?
8. Ans:- Reasons-high stability, large Q (Quality Factor) & the frequency that doesn’t drift with
aging. so crystal is used as a clock source most of the times.
13) Name High order / Low order Register in 8085 microprocessor?
Ans:-Flag is called Low order register & Accumulator is called High order Register in 8085
microprocessor.
14) Describe Tri-state logic?
Ans:- Three Logic Levels are used and they are known as High, Low, High impedance state. The
high and low are said to be normal logic levels where as high impedance state is electrical open
circuit conditions. Tri-state logic has a enable line as third line
15) What will happen if HLT instruction is executed in processor?
Ans:- The Micro Processor will enter into Halt-State and the buses will be tri-stated.
16) Which Stack is used in 8085?
Ans:- LIFO (Last In First Out) stack is used in 8085.In this type of Stack the information which
is stored last will be taken out or retrieved first.
17) Describe briefly Program counter?
Ans:- Program counter does either of the two things that is it holds the address of either the first
byte of the next instruction to be fetched for execution or the address of the next byte of a multi
byte instruction, which was not completely fetched. In both the cases it is incremented
automatically one by one as the instruction bytes will be fetched. Program register also keeps the
next instruction address.
18) Name the 1st / 2nd / 3rd / 4th generation processor?
Ans:-The processor are made of PMOS / NMOS / HMOS / HCMOS technology which is called
1st / 2nd / 3rd / 4th generation processor, and that is made up of 4 / 8 / 16 / 32 bits respectively.
19) Name the processor lines of two major manufacturers?
Ans:- The Processor lines names of two major manufacturers are as follows:- At High-end: Intel
– Pentium (II, III, IV), AMD – Athlon. At Low-end: Intel – Celeron, AMD – Duron. 64-bit: Intel
– Itanium 2, AMD – Opteron
20) Mention the speed and device maximum specs for Firewire?
9. Ans:-IEEE 1394 (Firewire) with speeds up to 400 Mbps can support the maximum of 63
connected devices
21) Where’s MBR located on the disk?
Ans:- The place where MBR is situated is in sector 0, track 0, head 0, cylinder 0 of the primary
active partition.
22) Where does CPU Enhanced mode originate from?
Ans:- Intel’s 80386 was the first 32-bit processor, and so the company had to backward-support
the 8086. All the modern Intel-based processors run in the enhanced mode which are capable to
switch in between real mode and protected mode, which is the current mode of operation.
23) What are the types of buses?
Ans:- Three types of buses are there:-
Address bus: It carries the Address to the memory to fetch either instruction..
Data bus : It carries data from the memory.
Control bus : It carries the control signals like RD/WR, Select etc.
24) What does EU do?
Ans:- Execution Unit receives both program instruction codes & data from Bus Interface Unit
and then executes these instructions and the result is being stored in registers.
25) Mention RST for the TRAP?
Ans:- RST 4.5
26) Can an RC circuit be used as clock source for 8085?
Ans:-Yes,RC circuit can be used as clock source if in case an accurate clock frequency is not
required. The cost of RC is low as compared to LC.
Microprocessor interview questions on 8086
27) What are the types of flags in 8086?
Ans:- In 8086 there are 9 types of flags which are as follows Carry flag, Parity flag, Auxiliary
carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag, Direction flag, and Sign flag.
28) What are the various interrupts in 8086?
10. Ans:- Two types of interrupts:-Maskable interrupts, Non-Maskable interrupts.
29) What is meant by Maskable interrupts?
Ans:- An interrupt that can be turned off by the programmer is known as Maskable interrupts are
those interrupts which can be turned off by the programmer or can be ignored by the
programmer.
30) What is Non-Maskable interrupts?
Ans:- A processor interrupt which can be never be turned off (i.e.disabled) or cannot be ignored
by the programmer is known as Non-Maskable interrupt.
31) Which interrupts are generally used for critical events?
Ans:- Non-Maskable interrupts are generally used in critical events. For example- Power failure,
Emergency, Shut off etc.
32) Give some examples for Maskable interrupts?
Ans:- Some examples for maskable interrupts are as follows:- RST 7.5, RST6.5, RST5.5
33) Give some example for Non-Maskable interrupts?
Ans:- Trap is called as Non-Maskable interrupts, which is used during emergency condition.
34) What is the Maximum clock frequency in 8086?
Ans:- 5 Mhz
35) Name the various segment registers in 8086?
Ans:- The various segment registers in 8085 are- Code, Data, Stack, Extra Segment registers.
36) Which Stack is used in 8086?
Ans:- FIFO (First In First Out) stack is used in 8086.In this type of Stack the information which
is stored first is taken out or retrieved first.
37) What is SIM and RIM instructions?
Ans:- SIM is Set Interrupt Mask. which is used to mask the hardware interrupts. RIM is Read
Interrupt Mask which is used to check whether the interrupt is masked or not.
38) Which is the tool which is used to connect the user and the computer?
Ans:- Interpreter
39) What is the position of the Stack Pointer after the PUSH instruction?
Ans:- The address line is 02 less than the earlier value.
40) What is the position of the Stack Pointer after the POP instruction?
Ans:- The address line is 02 greater than the earlier value.