The digitally implemented QPSK modulator is developed for satellite communication for future satellite missions. As we know that for space application power and bandwidth are most important parameters.The size of PCB and component count are also important parameters. To reduce these all parameters we design new approach. The new approach also minimizes the component count and hence reduces the PCB size. In this modulator summation, orthogonal sub-carrier generation and mixing of subcarrier with data are all digitally implemented inside the FPGA

1. DESIGN AND IMPLEMENTATION
OF QPSK MODULATOR USING DIGITAL SUBCARRIER
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2. AGENDA
 Overview of Satellite Communication
 Overview of Digital Modulation
 Description of QPSK Modulator
 Steps of Project Implementation
 Matlab Simulation of QPSK Modulator
 Hardware Implementation of QPSK Modulator
 Results
 Conclusion
 Future Scope
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3. OVERVIEW OF SATELLITE COMMUNICATION
 Digital Modulation
schemes are used in
Satellite Communication
Systems.
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4. DIGITAL MODULATION
 Digital Modulation
 The aim of digital modulation is to transfer a digital bit stream over
an analog bandpass channel, for example over the public switched
telephone network (where a bandpass filter limits the frequency
range to between 300 and 3400 Hz), or over a limited radio
frequency band.
 The purpose of digital modulation is to convert an information-
bearing discrete-time symbol into a continuous-time waveform.
 The objective of a digital communication system is to transport
digital data between two or more nodes.
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5. DIGITAL MODULATION
 In communications, the analog signal shape, by pre-agreed convention,
stands for a certain number of bits and is called a symbol.
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Digital information travels on analog carrier.

6. DIGITAL MODULATION
 Bit Error Rate (BER): Better accuracy of the transmitted digital
signal is measured by BER. Simply put Bit Error Rate is:
The number of Error Bits
 BER= ----------------------------
The total number of Bits
 A lower Bit Error Rate implies that the signal has been more
accurately transmitted and demodulated.
 A Bit Error Rate of one error in 10,000 Bits transmitted is quite
normal for modulated signals. After error correction is applied,
the Error further falls down to one part in 100,000 Million Bits. 6

7. DESCRIPTION OF QPSK MODULATION
Data
Phase Shift Keying :
BPSK
 An M-phase PSK modulator puts
the phase of carrier into one of M -
states according to the value of a
input . QPSK
 By increasing states , it can
transmit more data in same 8PSK
bandwidth
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8. DESCRIPTION OF QPSK MODULATION
 Quadrature Phase-Shift Keying (QPSK) is effectively two independent
BPSK systems (I-In phase and Q-Out of phase) and therefore exhibits
the same performance but twice the bandwidth efficiency.
 Sometimes this is known as quaternary PSK, quadriphase PSK, 4-PSK,
or 4-QAM (although the root concepts of QPSK and QAM are different,
the resulting modulated radio wave are exactly the same.)
 QPSK uses four points on the constellation diagram, equispaced
around a circle.
 With 4 phases, QPSK can encode two bits per symbol to minimize the
BER – sometimes misperceived as twice the BER of BPSK.
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9. DESCRIPTION OF QPSK MODULATION
 More advanced modulation techniques convey multiple bits of
information simultaneously by providing multiple states in each
symbol of transmitted information. This helps transmit more digital
data.
 Quadrature Phase-Shift Keying (QPSK) conveys 2 bits per symbol and
is prevalent in satellite communication.
 Digital (DVB-S) satellite broadcasts universally use Phase
Modulation-actually QPSK
 Satellite transmissions have a few unique characteristics
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 The signal has to travel an extremely large distance (36000 km)
from the ground to the satellite and then another similar distance
back to the earth.

10. Description of QPSK
Modulator
Block Diagram Constellation
sin ωct
Q - Signal
0 bit = 90 o
I data 01 bit =135 o 00 bit = 45 o
Modulator
Output
+
Q data
1 bit = 180 o
11 bit = 225 o 10 bit = 315 o
Cos ωct
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1 bit = 270 o

11. Description of QPSK
Modulator
Equations Phasor Diagram
I Q I Mod Q Mod QPSK O/P QPSK
Data data O/P O/P O/P Q - Signal
Phase +cos ωct
0 0 sin ωct cos ωct sin ωct + cos ωct 45˚
= sin ( wct + 45 ) sin (ωct + 135 ) sin (ωct + 45 )
0 1 sin ωct -cos ωct sin ωct - cos ωct 135˚
= sin (ωct + 135)
I - Signal
1 0 - sin ωct cos ωct - sin ωct + cos ωct 315˚ -sin ωct +sin ωct
= sin (ω ct - 45 )
1 1 - sin ωct -cos ωct - sin ωct - cos ωct 225˚
sin (ωct - 135 )
= sin (ωct - 135 )
-cos ωct 11

12. Description of QPSK
Modulator
Time Domain
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13. BLOCK DIAGRAM OF QPSK
MODULATOR
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14. LVDS DATA WITH LINE RECEIVER
 LVDS is the abbreviation of Low Voltage Differential
Signaling.
 It is an electrically digital signaling standard that
can run at very high speed over inexpensive twisted
pair copper cables.
 It is a dual wire system which can running at 180°of
each other.
 In our project we use DS90C032 3V LVDS Quad
CMOS Differential Line receiver.
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15. FPGA
 Here our motive is to provide complete digital
system and miniaturization of circuit so this can be
done using FPGA.
 Here we provide only two Inputs, one is our
information and second is the sample clock We get
the Digital QPSK signal from the FPGA
 The internal functions of FPGA is Data scrambling,
Differential coding,Convolutional encoding, Carrier
generation, mixing the data with carriers and finally
generate complete QPSK signal.
 In this project we concentrate to use the
ProASIC3E FPGA devices part no:A3PE600
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16. DAC(DIGITAL TO ANALOG
CONVERTER)
 The output of FPGA is Digital QPSK signal.
 To construct analog signal from this we must use
Digital to analog converter.
 we use 10-bit current type DAC.
 In our project we use 10-bit, 170 MSPS, AD9731
DAC.
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17. SMOOTHING FILTER
 Digitally modulated QPSK samples out from DAC is
a stair case type.
 There need to be smoothened by a smoothing filter
to have a analog look of the modulated signal.
 The center frequency is 1.024 MHz with symbol
rate 512 K bits/s, in order to preserve the main lobe
while smoothing.
 For our application we develop fifth order
Butterworth low pass filter
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18. BIPOLAR CONVERTER
 The DAC output is current type with an offset in the
-ve direction because the DAC output is ECL type.
 PSK or QPSK is suppressed carrier modulated
system.
 Carrier suppression is possible only if there is no
DC in the data, this requires conversion of QPSK
samples to be converted into bipolar type so that
there is no overall DC so bipolar converter circuit
serve this purpose
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19. SUB CARRIER GENERATION USING
FPGA
 The main part is generation of carriers means sine
and cosine signals. These signals are generated at
1.024 MHz.
 These signals are generated inside the FPGA using
the quantized value of samples of both signals.
 There are several techniques to generate sine and
cosine wave digitally.
 Its called NCO (Numerically Controlled Oscillator)
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20. SUB CARRIER GENERATION USING
FPGA
 There are several techniques to implement NCO
1. LUT Based NCO
2. CORDIC Based NCO
3. Xilinx ROM Based NCO
 Among all these we implement LUT based NCO for
our application.
 In this technique a NCO consists of a lookup table
made up of quantized sinusoidal sample
values(usually implemented as a read only
memory, ROM), a binary counter for addressing the
ROM, and a clock signal to drive the counter. 20

21. SIMULATION RESULTS
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22. FLOW DIAGRAM OF MATLAB
SIMULATION
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23. MATLAB SIMULATION RESULTS
 As per flow diagram COSINE and SINE carriers for
I and Q data respectively are generated.
 The sub carriers with frequency 1.024 MHz and 24
samples per cycle are generated.
 There are 4 cycles per symbols are necessary to
modulate incoming data. These carriers are first
multiplex with the I and Q data and than added
together in single FPGA.
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24. HARDWARE REALIZATION
 In hardware realization we use Actel kit with
ProASIC3000 FPGA. In this kit we load our
program which is written in verilog. The Actel Kit is
shown below:
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25. RESULT
 The output of kit is shown in logic analyzer. Here in
Actel kit Scrambler, Differential encoder,
Convolutional coder and subcarrier generator are
implemented. The setup of this implementation with
results are shown below. And as per output which is
shown in figure there is no phase and amplitude
imbalance between sin and cosine subcarriers.
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26. CONCLUSION
 In this modulator , analog components like local
oscillator and mixer are completely eliminated
which are frequency and temperature sensitive.
 Here all the functions are performed by single
FPGA. So the limitations of modulator are
completely removed for satellite communication.
 For the satellite communication PCB size is also
important parameter and using this new approach
number of component count is less and ultimately
size of PCB is become small.
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