The document discusses DC load line stabilization techniques for transistors. It provides three key points: 1) DC load lines are used to determine collector current at different collector-emitter voltages. Stabilization is needed as temperature and other factors affect the operating point. 2) Stabilization techniques like fixed bias, feedback bias, and voltage divider bias use resistive circuits to allow base current to vary and keep collector current constant with component variations. 3) Compensation techniques use temperature sensitive devices like diodes and thermistors to provide compensating voltages and currents to maintain a stable operating point. Stability factors S, S', and S" are defined and calculations shown for the fixed bias configuration.

1. DC LOAD LINE
STABILIZATION TECHNIQUES
Dr.N.G.Praveena
Associate Professor/ECE
R.M.K. COLLEGE OF ENGINEERING
AND TECHNOLOGY

2. DC LOAD LINE
 Used to determine the collector current at any
desired collector-emitter voltage.
 For dc analysis no input ac signal is applied.

3.  For dc analysis
1. Remove Vin
2. Cc are coupling capacitors – (xc= 1/2πfc)
since f =0; open circuit

4.  Apply KVL to the collector
𝑽𝒄𝒄 = 𝑰𝒄𝑹𝒄 + 𝑽𝑪𝑬
𝑰𝒄𝑹𝒄 = - 𝑽𝑪𝑬 + 𝑽𝒄𝒄
𝑰𝒄 = - ( 1/𝑹𝒄 ) 𝑽𝑪𝑬 + ( 1/𝑹𝒄 ) 𝑽𝒄𝒄 - - - (1)
On comparing equation 1 with the straight line
equation y = mx +c, Where m = - (1/ Rc)
 Apply KVL to the Base
𝑽𝒄𝒄 = 𝑰𝑩𝑹𝑩 + 𝑽𝑩𝑬
𝑰𝑩𝑹𝑩 = 𝑽𝒄𝒄 - 𝑽𝑩𝑬
𝑰𝑩𝑸 = 𝑰𝑩 =
𝑽𝒄𝒄 − 𝑽𝑩𝑬
𝑹𝑩

6. x,y coordinates
 Point A : 𝑰𝒄 = - ( 1/𝑹𝒄 ) 𝑽𝑪𝑬 + ( 1/𝑹𝒄 ) 𝑽𝒄𝒄 - - - (1)
To find y coordinate sub 𝑽𝑪𝑬 = 0 in eqn (1)
𝑰𝒄 = ( 1/𝑹𝒄 ) 𝑽𝒄𝒄
Hence Point A : ( 0 , 𝑽𝒄𝒄 / 𝑹𝒄 )
 Point B:
To find x coordinate sub 𝑰𝒄 = 0 in eqn (1)
0 = - ( 1/𝑹𝒄 ) 𝑽𝑪𝑬 + ( 1/𝑹𝒄 ) 𝑽𝒄𝒄
𝑽𝑪𝑬 = 𝑽𝒄𝒄
Hence Point B : (𝑽𝒄𝒄 , 0)

7. VARIATION OF Q POINT
 Reverse saturation current, 𝑰𝑪𝑶 which
doubles for every 10˚C increase in
temperature.
 Base-emitter voltage, 𝑽𝑩𝑬 which decreases
by 2.5 mV per ˚ C.
 Transistor current gain, β, which increases
with temperature.

8. HOW TO MAKE Q POINT STABLE
STABILIZATION COMPENSATION
TECHNIQUE TECHNIQUE

9. STABILIZATION TECHNIQUE
 Use of resistive biasing circuits which allow IB to
vary so as to keep IC relatively constant with
variations in ICBO, β and VBE.
 Fixed Bias (or) Base resistor method
 Collector-to-Base bias (or) Biasing with feedback
resistor
 Voltage-divider bias (or) Self bias (or) Emitter bias

10. COMPENSATION TECHNIQUE
 Use of temperature sensitive devices such as
diodes, sensistors, thermistors which provide
compensating voltage and currents to maintain the
operating point constant.
 Diode Compensation
 Sensistor Compensation
 Thermistor Compensation

11. STABILIZATION TECHNIQUE
 How to validate these techniques???
Stability factors
S , S′, S′′

12. Stability Factor (S)
The rate of change of collector current IC with
respect to the collector base leakage current ICO,
keeping both the current IB and the current gain β
constant.
S =
𝝏𝑰𝑪
𝝏𝑰𝑪𝑶
, β and 𝑽𝑩𝑬 constant

13. Stability factor S′
The rate of change of IC with VBE, keeping ICO and β
constant.
S′ =
𝝏𝑰𝑪
𝝏𝑽𝑩𝑬
, β and 𝑰𝑪𝑶 constant

14. Stability factor S′′
The rate of change of IC with respect to β, keeping
ICO and VBE constant.
S′′ =
𝝏𝑰𝑪
𝝏β
, 𝑰𝑪𝑶 and 𝑽𝑩𝑬 constant

15. STEPS TO DETERMINE 3S
STEP 1 :
OBTAIN AN EXPRESSION FOR IB
STEP 2:
TO OBTAIN S, DIFFERENTIATE IB WITH RESPECT TO IC
AND SUBSITUTE IN THE STANDARD EQUATION OF S
STEP 3:
TO OBTAIN S′ REPLACE IB INTERMS OF VBE IN THE
STANDARD EQUATION OF IC AND DIFFERENTIATE IT
WITH REPECT TO VBE
STEP 4 :
TO OBTAIN S′′ DIFFERENTIATE THE EQUATION
OBTAINED IN STEP 3 WITH REPSPECT TO β

16. STANDARD EQUATION OF IC
 The collector current for a CE amplifier is given by
𝑰𝑪 = β 𝑰𝑩 + (1 + β) 𝑰𝑪𝑶
 Differentiating the above equation with respect to IC,
we get
1 = β ∂ 𝑰𝑩 / ∂ 𝑰𝑪 + ( 1 + β ) ∂ 𝑰𝑪𝑶 / ∂ 𝑰𝑪
 Therefore,
1 – β ∂ 𝑰𝑩 / ∂ 𝑰𝑪 = (1 + β) / S
S =
(1 + β)
1 – β ∂ 𝑰𝑩 / ∂ 𝑰𝑪
 From this equation, it is clear that this factor S should
be as small as possible to have better thermal
stability.

17. Fixed Bias
 Biasing voltage VCC,
VBE, RB and RC are
constant quantities.
 IB remains fixed at a
particular level. It is
called fixed biasing.
Resistance RB is selected to obtain the desired
level of IB.

18.  For dc analysis
ac input signal = 0
C1 and C2 – open circuit (∵f = 0)

19. STEP 1 :OBTAIN AN EXPRESSION
FOR IB
 Apply KVL to the base
𝑉𝐶𝐶 = 𝑰𝑩𝑹𝑩 + 𝑽𝑩𝑬
𝑰𝑩 =
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
--- (1)

20. STEP 2: TO OBTIAN S , DIFFERENTIATE IB WITH
RESPECT TO IC AND SUBSITUTE IN THE
STANDARD EQUATION OF S
Differentiate eqn (1) with respect to Ic
𝝏𝑰𝑩
𝝏𝑰𝑪
= 0 --- (2)
We know that the standard equation of S is
S =
(1 + β)
1 – β ∂ 𝑰𝑩 / ∂ 𝑰𝑪
---(3)
Sub (2) in (3)
S = (1 + β )
𝑰𝑩 =
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
--- (1)

21. STEP 3: TO OBTAIN S′, REPLACE IB INTERMS OF
VBE IN THE STANDARD EQUATION OF IC AND
DIFFERENTIATE IT WITH RESPECT TO VBE
The Standard Equation of Ic is
𝑰𝑪 = β𝑰𝑩 + (1+β) 𝑰𝑪𝑶
Sub (1)
𝑰𝑪 = β
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
(∵ 𝑰𝑪𝑶 <<) - - -(4)
Differentiate eqn(4)with respect to VBE
𝝏𝑰𝑪
𝝏𝑽𝑩𝑬
= -
𝜷
𝑹𝑩
∴ S′ =
𝝏𝑰𝑪
𝝏𝑽𝑩𝑬
= -
𝜷
𝑹𝑩
𝑰𝑩 =
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
--- (1)

22. STEP 4 : TO OBTAIN S′′ DIFFERENTIATE THE
EQUATION OBTAINED IN STEP 3 WITH
REPSPECT TO β
 Differentiate eqn (4) with respect to β
𝑰𝑪 = β
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
- - -(4)
𝝏𝑰𝑪
𝝏β
=
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
∴ S′′ =
𝑽𝑪𝑪 −𝑽𝑩𝑬
𝑹𝑩
= 𝐈𝑩 USING (1)