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Chapter 2: BJT and its
applications
Module 2 : Transistor Biasing
Reference:
Robert L. Boylestad, Louis Nashelsky, Electronic Devices & Circuits
Theory, 11th Edition, PHI, 2012
Department of Electronics & Communication Engineering 1
Objectives
β€’ Discuss the concept of biasing of the transistor.
β€’ Analyse the fixed and self bias circuits.
β€’ Identify the circuit parameters that effect Q point.
Department of Electronics & Communication Engineering 2
Operating Point / Quiescent Point
For the BJT to operate effectively , it has to be properly biased.
Set a certain value of I and V in the BJT→ Biasing
These values correspond to a point on the BJT output characteristics
Department of Electronics & Communication Engineering 3
Transistor circuit in Common Emitter Configuration
Applying external dc voltages to ensure
that transistor operates in the desired region.
Applying KVL to the output loop,
𝑉𝐢𝐢 - 𝐼𝐢𝑅𝐢 -𝑉𝐢𝐸=0
𝑉𝐢𝐸 = 𝑉𝐢𝐢 - 𝐼𝐢𝑅𝐢 ------(1)
𝐼𝐢 = -
𝑉𝐢𝐸
𝑅𝐢
+
𝑉𝐢𝐢
𝑅𝐢
---------(2)
Department of Electronics & Communication Engineering 4
From equation (1), when 𝐼𝐢=0,
𝑉𝐢𝐸 = 𝑉𝐢𝐢 -------------(3)
From equation (2) when 𝑉𝐢𝐸=0,
𝐼𝐢 =
𝑉𝐢𝐢
𝑅𝐢
-------------(4)
Equation (3) and (4) form the
extremities of 𝐼𝐢 and 𝑉𝐢𝐸
Line joining these two points β†’ DC Load Line
Department of Electronics & Communication Engineering 5
The point where DC load line cuts the output characteristics is called
Quiescent Point (Q Point) / Operating point
Depending on the requirement, Q point can be moved to Saturation, Active
or Cut-off region
To set the Q Point, biasing is necessary
Note: When no biasing is applied, Q point is at the origin
Department of Electronics & Communication Engineering 6
Department of Electronics & Communication Engineering 7
Variation in load line with circuit parameters
Department of Electronics & Communication Engineering 8
Fixed Bias / Base Current Bias
Applying KVL to input loop,
𝑉𝐢𝐢-𝐼𝐡𝑅𝐡-𝑉𝐡𝐸=0
𝐼𝐡 =
π‘‰πΆπΆβˆ’π‘‰π΅πΈ
𝑅𝐡
Applying KVL to output loop,
𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸=0
𝑉𝐢𝐸 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢
Department of Electronics & Communication Engineering 9
𝐼𝐢 = β*𝐼𝐡
𝑉𝐢𝐢 is constant
𝑉𝐡𝐸 = 0.7 (for Si)
By selecting proper 𝑅𝐡 , 𝐼𝐡 can be
fixed.
𝑉𝐢𝐸 can also be fixed by selecting
appropriate 𝑅𝐢
Department of Electronics & Communication Engineering 10
Q1. For the circuit shown below, draw the DC load line and mark the Q
point/ operating point.(Si transistor used)
Apply KVL to the input loop
𝑉𝐢𝐢-𝐼𝐡𝑅𝐡-𝑉𝐡𝐸=0
𝐼𝐡 =
π‘‰πΆπΆβˆ’π‘‰π΅πΈ
𝑅𝐡
= 19.78Β΅A
𝐼𝐢𝑄 = Ξ²*𝐼𝐡 = 1.978mA
Apply KVL to the output loop
𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸= 0
𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢 = 6.04V
Department of Electronics & Communication Engineering 11
10V
100
470kΞ©
2kΞ©
To draw DC Load Line
π‘‰πΆπΈπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 =10V
πΌπΆπ‘šπ‘Žπ‘₯ =
𝑉𝐢𝐢
𝑅𝐢
= 5mA
Department of Electronics & Communication Engineering 12
𝑰π‘ͺπ’Žπ’‚π’™
π‘‰πΆπΈπ‘šπ‘Žπ‘₯
5mA
10V
6.04V
1.978mA
Q2. In a fixed bias circuit using Germanium BJT, 𝑉𝐢𝐢=12V, 𝑅𝐢= 4kΞ©, 𝑉𝐢𝐸=0.2V
Ξ²=50. Find 𝐼𝐡, 𝑅𝐡neglecting 𝐼𝐢𝐸𝑂
Apply KVL to the output loop
𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸= 0
𝐼𝐢= 2.95mA
𝐼𝐡=
𝐼𝐢
Ξ²
= 59Β΅A
Apply KVL to the input loop
𝑉𝐢𝐢-𝐼𝐡𝑅𝐡-𝑉𝐡𝐸=0
𝑅𝐡= 198.3kΞ© Department of Electronics & Communication Engineering 13
Q3. For the circuit shown below, find the base current required to
establish 𝑉𝐢𝐸𝑄=6V (Si transistor used).Also find 𝑅𝐡
Department of Electronics & Communication Engineering 14
12V
120
2.2kΞ©
Self Bias / Voltage Divider Bias
Uses two resistors 𝑅1 and 𝑅2 instead
of 𝑅𝐡
𝑅𝐸 is the emitter feedback resistance
connected between emitter and
ground.
The circuit can be simplified using
Thevenin’s Theorem
Department of Electronics & Communication Engineering 15
Department of Electronics & Communication Engineering 16
Department of Electronics & Communication Engineering 17
A
B
Thevenin’s Resistance
Department of Electronics & Communication Engineering 18
𝑅𝑇𝐻 is the resistance seen between AB with
𝑉𝐢𝐢 replaced by a short circuit
𝑅𝑇𝐻 =
𝑅1𝑅2
𝑅1+𝑅2
Thevenin’s Voltage
Department of Electronics & Communication Engineering 19
𝑉𝑇𝐻 is the open circuit voltage
between AB
𝑉𝑇𝐻 =
π‘‰πΆπΆβˆ—π‘…2
𝑅1+𝑅2
A
B
Self bias circuit with input loop replaced by Thevenin’s equivalent
circuit
Apply KVL to the input loop,
𝑉𝑇𝐻 - 𝐼𝐡𝑅𝑇𝐻 - 𝑉𝐡𝐸 - 𝐼𝐸𝑅𝐸 = 0
Substitute 𝐼𝐸 = β + 1 𝐼𝐡
𝐼𝐡=
π‘‰π‘‡π»βˆ’π‘‰π΅πΈ
𝑅𝑇𝐻 + (Ξ²+1)𝑅𝐸
Department of Electronics & Communication Engineering 20
Since Ξ²+1 ≃ Ξ² and β𝑅𝐸>> 𝑅𝑇𝐻
𝐼𝐡=
π‘‰π‘‡π»βˆ’π‘‰π΅πΈ
β𝑅𝐸
Collector current 𝐼𝐢= β*𝐼𝐡
𝐼𝐢=
π‘‰π‘‡π»βˆ’π‘‰π΅πΈ
𝑅𝐸
𝐼𝐢 is now independent of β , where β is a temperature dependent factor
Department of Electronics & Communication Engineering 21
Applying KVL to the output loop,
𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸-𝐼𝐸𝑅𝐸=0
𝑉𝐢𝐸 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝐼𝐸𝑅𝐸
Department of Electronics & Communication Engineering 22
Department of Electronics & Communication Engineering 23
Department of Electronics & Communication Engineering 24
Q4. For the self bias circuit shown below, draw the DC load line and
mark the Q point/ operating point.(Si transistor used)
𝑅𝐸= 200Ξ© , 𝑅1=10𝑅2= 10kΞ© , 𝑅𝑐=2kΞ©, Ξ²=200 , 𝑉𝐢𝐢=15V
Department of Electronics & Communication Engineering 25
𝑅𝑇𝐻 =
𝑅1𝑅2
𝑅1+𝑅2
= 0.909kΞ©
𝑉𝑇𝐻 =
π‘‰πΆπΆβˆ—π‘…2
𝑅1+𝑅2
= 1.364V
Apply KVL to the input loop,
𝑉𝑇𝐻 - 𝐼𝐡𝑅𝑇𝐻 - 𝑉𝐡𝐸 - 𝐼𝐸𝑅𝐸 = 0
Substitute 𝐼𝐸 = β + 1 𝐼𝐡
𝐼𝐡=
π‘‰π‘‡π»βˆ’π‘‰π΅πΈ
𝑅𝑇𝐻 + (Ξ²+1)𝑅𝐸
=
1.364βˆ’0.7
0.909π‘˜+ 201 200
= 16.15Β΅A
𝐼𝐢𝑄= β𝐼𝐡= 3.23mA
Department of Electronics & Communication Engineering 26
Apply KVL to the output loop,
𝑉𝐢𝐸 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝐼𝐸𝑅𝐸
𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢- Ξ² + 1 𝐼𝐡𝑅𝐸 = 7.9V
To draw DC Load Line
π‘‰πΆπΈπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 =15V
πΌπΆπ‘šπ‘Žπ‘₯ =
𝑉𝐢𝐢
𝑅𝐢+𝑅𝐸
= 6.81mA
Department of Electronics & Communication Engineering 27
Q5. For the self bias circuit shown below, draw the DC load line and
mark the Q point/ operating point.(Si transistor used)
𝑅𝐸= 100Ξ© , 𝑅1=100k Ξ©, 𝑅2= 5kΞ© , 𝑅𝑐=2kΞ©, Ξ²=50 ,
𝑉𝐢𝐢=20V
Answer:
𝑅𝑇𝐻 =
𝑉𝑇𝐻 =
𝐼𝐡=
𝑉𝐢𝐸𝑄 =
π‘‰πΆπΈπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 =
πΌπΆπ‘šπ‘Žπ‘₯ =
𝑉𝐢𝐢
𝑅𝐢+𝑅𝐸
=
Department of Electronics & Communication Engineering 28
Q6. For a self bias circuit using Si BJT, 𝑅𝐢= 500Ξ© , 𝑅𝐸= 300Ξ© 𝑉𝐢𝐢=15V,
Ξ²=100, 10𝑅2= β𝑅𝐸. Determine the value of 𝑅1 to get 𝑉𝐢𝐸𝑄=
𝑉𝐢𝐢
2
Department of Electronics & Communication Engineering 29

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Basic electronics - Bi Junction Terminals 02.pptx

  • 1. Chapter 2: BJT and its applications Module 2 : Transistor Biasing Reference: Robert L. Boylestad, Louis Nashelsky, Electronic Devices & Circuits Theory, 11th Edition, PHI, 2012 Department of Electronics & Communication Engineering 1
  • 2. Objectives β€’ Discuss the concept of biasing of the transistor. β€’ Analyse the fixed and self bias circuits. β€’ Identify the circuit parameters that effect Q point. Department of Electronics & Communication Engineering 2
  • 3. Operating Point / Quiescent Point For the BJT to operate effectively , it has to be properly biased. Set a certain value of I and V in the BJTβ†’ Biasing These values correspond to a point on the BJT output characteristics Department of Electronics & Communication Engineering 3
  • 4. Transistor circuit in Common Emitter Configuration Applying external dc voltages to ensure that transistor operates in the desired region. Applying KVL to the output loop, 𝑉𝐢𝐢 - 𝐼𝐢𝑅𝐢 -𝑉𝐢𝐸=0 𝑉𝐢𝐸 = 𝑉𝐢𝐢 - 𝐼𝐢𝑅𝐢 ------(1) 𝐼𝐢 = - 𝑉𝐢𝐸 𝑅𝐢 + 𝑉𝐢𝐢 𝑅𝐢 ---------(2) Department of Electronics & Communication Engineering 4
  • 5. From equation (1), when 𝐼𝐢=0, 𝑉𝐢𝐸 = 𝑉𝐢𝐢 -------------(3) From equation (2) when 𝑉𝐢𝐸=0, 𝐼𝐢 = 𝑉𝐢𝐢 𝑅𝐢 -------------(4) Equation (3) and (4) form the extremities of 𝐼𝐢 and 𝑉𝐢𝐸 Line joining these two points β†’ DC Load Line Department of Electronics & Communication Engineering 5
  • 6. The point where DC load line cuts the output characteristics is called Quiescent Point (Q Point) / Operating point Depending on the requirement, Q point can be moved to Saturation, Active or Cut-off region To set the Q Point, biasing is necessary Note: When no biasing is applied, Q point is at the origin Department of Electronics & Communication Engineering 6
  • 7. Department of Electronics & Communication Engineering 7
  • 8. Variation in load line with circuit parameters Department of Electronics & Communication Engineering 8
  • 9. Fixed Bias / Base Current Bias Applying KVL to input loop, 𝑉𝐢𝐢-𝐼𝐡𝑅𝐡-𝑉𝐡𝐸=0 𝐼𝐡 = π‘‰πΆπΆβˆ’π‘‰π΅πΈ 𝑅𝐡 Applying KVL to output loop, 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸=0 𝑉𝐢𝐸 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢 Department of Electronics & Communication Engineering 9
  • 10. 𝐼𝐢 = Ξ²*𝐼𝐡 𝑉𝐢𝐢 is constant 𝑉𝐡𝐸 = 0.7 (for Si) By selecting proper 𝑅𝐡 , 𝐼𝐡 can be fixed. 𝑉𝐢𝐸 can also be fixed by selecting appropriate 𝑅𝐢 Department of Electronics & Communication Engineering 10
  • 11. Q1. For the circuit shown below, draw the DC load line and mark the Q point/ operating point.(Si transistor used) Apply KVL to the input loop 𝑉𝐢𝐢-𝐼𝐡𝑅𝐡-𝑉𝐡𝐸=0 𝐼𝐡 = π‘‰πΆπΆβˆ’π‘‰π΅πΈ 𝑅𝐡 = 19.78Β΅A 𝐼𝐢𝑄 = Ξ²*𝐼𝐡 = 1.978mA Apply KVL to the output loop 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸= 0 𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢 = 6.04V Department of Electronics & Communication Engineering 11 10V 100 470kΞ© 2kΞ©
  • 12. To draw DC Load Line π‘‰πΆπΈπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 =10V πΌπΆπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 𝑅𝐢 = 5mA Department of Electronics & Communication Engineering 12 𝑰π‘ͺπ’Žπ’‚π’™ π‘‰πΆπΈπ‘šπ‘Žπ‘₯ 5mA 10V 6.04V 1.978mA
  • 13. Q2. In a fixed bias circuit using Germanium BJT, 𝑉𝐢𝐢=12V, 𝑅𝐢= 4kΞ©, 𝑉𝐢𝐸=0.2V Ξ²=50. Find 𝐼𝐡, 𝑅𝐡neglecting 𝐼𝐢𝐸𝑂 Apply KVL to the output loop 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸= 0 𝐼𝐢= 2.95mA 𝐼𝐡= 𝐼𝐢 Ξ² = 59Β΅A Apply KVL to the input loop 𝑉𝐢𝐢-𝐼𝐡𝑅𝐡-𝑉𝐡𝐸=0 𝑅𝐡= 198.3kΞ© Department of Electronics & Communication Engineering 13
  • 14. Q3. For the circuit shown below, find the base current required to establish 𝑉𝐢𝐸𝑄=6V (Si transistor used).Also find 𝑅𝐡 Department of Electronics & Communication Engineering 14 12V 120 2.2kΞ©
  • 15. Self Bias / Voltage Divider Bias Uses two resistors 𝑅1 and 𝑅2 instead of 𝑅𝐡 𝑅𝐸 is the emitter feedback resistance connected between emitter and ground. The circuit can be simplified using Thevenin’s Theorem Department of Electronics & Communication Engineering 15
  • 16. Department of Electronics & Communication Engineering 16
  • 17. Department of Electronics & Communication Engineering 17 A B
  • 18. Thevenin’s Resistance Department of Electronics & Communication Engineering 18 𝑅𝑇𝐻 is the resistance seen between AB with 𝑉𝐢𝐢 replaced by a short circuit 𝑅𝑇𝐻 = 𝑅1𝑅2 𝑅1+𝑅2
  • 19. Thevenin’s Voltage Department of Electronics & Communication Engineering 19 𝑉𝑇𝐻 is the open circuit voltage between AB 𝑉𝑇𝐻 = π‘‰πΆπΆβˆ—π‘…2 𝑅1+𝑅2 A B
  • 20. Self bias circuit with input loop replaced by Thevenin’s equivalent circuit Apply KVL to the input loop, 𝑉𝑇𝐻 - 𝐼𝐡𝑅𝑇𝐻 - 𝑉𝐡𝐸 - 𝐼𝐸𝑅𝐸 = 0 Substitute 𝐼𝐸 = Ξ² + 1 𝐼𝐡 𝐼𝐡= π‘‰π‘‡π»βˆ’π‘‰π΅πΈ 𝑅𝑇𝐻 + (Ξ²+1)𝑅𝐸 Department of Electronics & Communication Engineering 20
  • 21. Since Ξ²+1 ≃ Ξ² and β𝑅𝐸>> 𝑅𝑇𝐻 𝐼𝐡= π‘‰π‘‡π»βˆ’π‘‰π΅πΈ β𝑅𝐸 Collector current 𝐼𝐢= Ξ²*𝐼𝐡 𝐼𝐢= π‘‰π‘‡π»βˆ’π‘‰π΅πΈ 𝑅𝐸 𝐼𝐢 is now independent of Ξ² , where Ξ² is a temperature dependent factor Department of Electronics & Communication Engineering 21
  • 22. Applying KVL to the output loop, 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝑉𝐢𝐸-𝐼𝐸𝑅𝐸=0 𝑉𝐢𝐸 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝐼𝐸𝑅𝐸 Department of Electronics & Communication Engineering 22
  • 23. Department of Electronics & Communication Engineering 23
  • 24. Department of Electronics & Communication Engineering 24
  • 25. Q4. For the self bias circuit shown below, draw the DC load line and mark the Q point/ operating point.(Si transistor used) 𝑅𝐸= 200Ξ© , 𝑅1=10𝑅2= 10kΞ© , 𝑅𝑐=2kΞ©, Ξ²=200 , 𝑉𝐢𝐢=15V Department of Electronics & Communication Engineering 25
  • 26. 𝑅𝑇𝐻 = 𝑅1𝑅2 𝑅1+𝑅2 = 0.909kΞ© 𝑉𝑇𝐻 = π‘‰πΆπΆβˆ—π‘…2 𝑅1+𝑅2 = 1.364V Apply KVL to the input loop, 𝑉𝑇𝐻 - 𝐼𝐡𝑅𝑇𝐻 - 𝑉𝐡𝐸 - 𝐼𝐸𝑅𝐸 = 0 Substitute 𝐼𝐸 = Ξ² + 1 𝐼𝐡 𝐼𝐡= π‘‰π‘‡π»βˆ’π‘‰π΅πΈ 𝑅𝑇𝐻 + (Ξ²+1)𝑅𝐸 = 1.364βˆ’0.7 0.909π‘˜+ 201 200 = 16.15Β΅A 𝐼𝐢𝑄= β𝐼𝐡= 3.23mA Department of Electronics & Communication Engineering 26
  • 27. Apply KVL to the output loop, 𝑉𝐢𝐸 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢-𝐼𝐸𝑅𝐸 𝑉𝐢𝐸𝑄 = 𝑉𝐢𝐢-𝐼𝐢𝑅𝐢- Ξ² + 1 𝐼𝐡𝑅𝐸 = 7.9V To draw DC Load Line π‘‰πΆπΈπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 =15V πΌπΆπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 𝑅𝐢+𝑅𝐸 = 6.81mA Department of Electronics & Communication Engineering 27
  • 28. Q5. For the self bias circuit shown below, draw the DC load line and mark the Q point/ operating point.(Si transistor used) 𝑅𝐸= 100Ξ© , 𝑅1=100k Ξ©, 𝑅2= 5kΞ© , 𝑅𝑐=2kΞ©, Ξ²=50 , 𝑉𝐢𝐢=20V Answer: 𝑅𝑇𝐻 = 𝑉𝑇𝐻 = 𝐼𝐡= 𝑉𝐢𝐸𝑄 = π‘‰πΆπΈπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 = πΌπΆπ‘šπ‘Žπ‘₯ = 𝑉𝐢𝐢 𝑅𝐢+𝑅𝐸 = Department of Electronics & Communication Engineering 28
  • 29. Q6. For a self bias circuit using Si BJT, 𝑅𝐢= 500Ξ© , 𝑅𝐸= 300Ξ© 𝑉𝐢𝐢=15V, Ξ²=100, 10𝑅2= β𝑅𝐸. Determine the value of 𝑅1 to get 𝑉𝐢𝐸𝑄= 𝑉𝐢𝐢 2 Department of Electronics & Communication Engineering 29