This document discusses various techniques for simplifying Boolean functions including K-maps, don't care conditions, and implementing Boolean functions as logic circuits. It covers: 1) Using K-maps to solve 3-variable functions and simplify sums. 2) How don't care conditions can be represented on K-maps to simplify structures. 3) Converting Boolean functions to logic diagrams using only NAND or NOR gates as universal gates. Steps are provided to convert functions to NAND and NOR gate implementations. 4) Equivalents for NOT, AND and OR gates using only NAND or NOR gates.

2. INTRODUCTION
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7. Solving Three variable function with K – Map
Z = f(A,B,C) = A̅B̅C̅ + AB + ABC + AC
= A̅B̅C̅ + ABC + ABC +ABC + ABC + ABC
Sol. is F = B + AC + AC

8. Productionof Sums Simplification
e.g. F(A ,B ,C ,D) = Σ(0,1,2,5,8,9,10)
Solution:Creating a four variable K-map for above function , we have
In this K–map combination of 0s are made to get solution for complement of F.
so, F’ = AB + CD + BD’
Now F = (F’)’ = (AB + CD + BD’)’
= (A’ + B’) . (C’ + D’) . (B’ + D)
Which is required product of sum simplification.

9. Don’t Care Conditions
Till now we have discussed function in which the combination of variable are either 0 or 1 and
accordingly map created. The combination usually taken from the truth table for which the
value is evaluated to 1. value for all other combination is assumed to be 0. however this not
always true. There may be some certain application where for certain combination, there are
no output value e.g. in some digital circuit, if we have to take six input combination, we have to
take 3 input variables leading to total of 2³ i.e. 8 combinations. So out of these 8
combinations 2 will be unused. So we don’t care about these value. These don’t care condition
can be used in map to have simpler structure. Don’t Care combination on a K-Map are marked
with ‘X’ to distinguish them from value 0 or 1. Following point should be taken while making
combination with don’t care squares-
1. If a combination with equal no. of squares is possible with higher no. of 1’s then that
combination is given preference over the combination that contain more no. ‘X’ squares.
2. It is not necessary that all squares containing ‘X’ take part in making combinations.
3. Each combination containing X must have atleast one 1.

10. Example : Simplify F (w, x, y, z) = Σ(1, 3, 7, 11, 15)
D(w, x, y, z) = Σ(0, 2, 5)
Solution :Creatinga four variable K-map –
Finding common value in combination, the solution will be
F = wz + yz

11. IMPLEMENTING BOOLEAN EXPRESSION AS DIGITAL CIRCUITS
For any Boolean function you can design an electronicand vice versa. Since Boolean function only
requirethe AND , OR, and NOT boolean operators,which will be used to representAND (.), binary
OR (+) and compliment (‘) respectivelyin Boolean algebraicfunctions.
Using these gate we can design logical diagram for any of the Boolean function.

13. Some other logic gates which are very commonly used in designing logic circuit are given as below :

14. NAND and NOR gates as UniversalGates
One interestingfact is that you only need a single gate type to implement any electronic circuit. There
are two gates which serve this purpose. There are NAND gate and NOR gate that is why these gate
also known as universalgates.
Converting A Function Into Logic Diagram With Only NAND Gates : Following step s have
performedfor doing this:
1. Get the simplified form of function in sum of product form.
2. Draw a NAND gate for each productterm of the function that has at least two variable . Thesewill
become firstlevel gate.
3.Draw a single NAND gate in second level that have input as output from first level gate.
4. Termwith single variablecan be complementedand applied as input to second level NAND gate.
Now using same rule we will convert AND, OR And NOT into NAND gate circuits.Remember function
for these gates are already in simplified form.

15. NOT, AND, & OR gates equivalentto NAND gate :

16. E.g. F = (AB+CD) . BC
Let us draw logical diagram for this

18. Implementing Logic Circuit Using NOR Gate Only
For two level circuit, following step are performed :
1. Simplify function in product of sum form.
2. Apply same step as two level NAND implementation except term for firs level NOR gates are sum
terms.
3. Similarly,a single variableterm will need one input NOR gate.
NOT, OR & AND gates equivalentto NOR gate: