1. Unimicron is a leading substrate manufacturer that has expanded its product portfolio over time to include finer line designs and smaller bump pitches, posing new challenges for metrology.
2. 2D AOI is used to detect small "mouse bite" defects not found by electrical tests that could cause reliability issues, but it faces challenges discerning real defects from false alarms or similar features like oxidation.
3. As designs evolve to include finer lines and pitches, equipment vendors are expected to provide higher resolution 3D metrology tools that can directly assess defects without multiple scans to reduce false alarms, while also offering faster throughput and automated defect mapping.
2.5D heterogeneous and 3D wafer-level stacking are reshaping the packaging landscape.
More information on that report at https://www.i-micronews.com/advanced-packaging-report/product/p2-5d-3d-tsv-wafer-level-stacking-technology-market-updates-2019.html
Intel Foveros and TSMC 3D SoIC are competing head-to-head for high-end packaging – How will Samsung react ?More information here : https://www.i-micronews.com/products/high-end-performance-packaging-3d-2-5d-integration-2020/
Photonics applications are driving the GaAs wafer and epiwafer market into a new era.
More information on: https://www.i-micronews.com/led-report/product/vcsels-technology-industry-and-market-trends.html
Thin wafer processing and Dicing equipment market - 2016 Report by Yole Devel...Yole Developpement
Strong demand for thinner wafers and smaller die is driving the evolution of dicing technologies
Demand for thinned wafers is growing strongly!
Driven by consumer applications such as smartphones, smart cards and stacked packages, the demand for thinned wafers has increased over recent years.
We estimate that the number of thinned wafers used for MEMS devices, CMOS Image Sensors, memory and logic devices, including those with TSVs, as well as and Power devices exceeded the equivalent of 16.5 million 8-inch wafer starts per year (WSPY) in 2015. This is mainly supported by CMOS Image Sensors, followed by Power devices. We expect that this number of thinned wafers will peak at the equivalent of almost 32 million 8-inch WSPY by 2020. This would represent a 14% compound annual growth rate (CAGR) from 2015 to 2020.
Thinner wafers bring several benefits, including enabling very thin packaging, and therefore better form factors, improved electrical performance and high heat dissipation.
Miniaturization towards smaller, higher-performing, lower-cost device configurations has thinned wafers below 100 µm or even 50 µm for some applications, such as memory and power devices.
Forecasts for the number of thinned wafers by thickness and by application are analyzed in this report. It also includes insights on the number of thinning tools, breakdowns by wafer size, and technological highlights affecting the applications mentioned above...
Soon gi Park (LetinAR): PinMR: Novel Optical Solution for AR GlassesAugmentedWorldExpo
A talk from the XR Enablement Track at AWE USA 2019 - the World's #1 XR Conference & Expo in Santa Clara, California May 29-31, 2019.
Soon gi Park (LetinAR): PinMR: Novel Optical Solution for AR Glasses
LetinAR is a Seoul-based startup developing see-through optical systems for wearable augmented reality devices. Based on our unique pin mirror technology which has quite different approaches from any other existing combiner optics, LetinAR has demonstrated ultrawide field-of-view more than 80 degrees with 8K high resolution. LetinAR also presented a form-factor-oriented glasses prototype device having the same appearance of normal glasses. In this presentation, we introduce a pin mirror technology and its benefits and contributions to wearable AR hardware including high image quality without any degradation, visual comfort supporting correct vergence and accommodation, wide field-of-view providing immersive experience as well as cost effective manufacturing process. We believe that the advantages of the pin mirror technology will not only suffice the optical requirements in future AR devices, but also shorten the beginning of AR/VR/MR era.
https://awexr.com
2.5D heterogeneous and 3D wafer-level stacking are reshaping the packaging landscape.
More information on that report at https://www.i-micronews.com/advanced-packaging-report/product/p2-5d-3d-tsv-wafer-level-stacking-technology-market-updates-2019.html
Intel Foveros and TSMC 3D SoIC are competing head-to-head for high-end packaging – How will Samsung react ?More information here : https://www.i-micronews.com/products/high-end-performance-packaging-3d-2-5d-integration-2020/
Photonics applications are driving the GaAs wafer and epiwafer market into a new era.
More information on: https://www.i-micronews.com/led-report/product/vcsels-technology-industry-and-market-trends.html
Thin wafer processing and Dicing equipment market - 2016 Report by Yole Devel...Yole Developpement
Strong demand for thinner wafers and smaller die is driving the evolution of dicing technologies
Demand for thinned wafers is growing strongly!
Driven by consumer applications such as smartphones, smart cards and stacked packages, the demand for thinned wafers has increased over recent years.
We estimate that the number of thinned wafers used for MEMS devices, CMOS Image Sensors, memory and logic devices, including those with TSVs, as well as and Power devices exceeded the equivalent of 16.5 million 8-inch wafer starts per year (WSPY) in 2015. This is mainly supported by CMOS Image Sensors, followed by Power devices. We expect that this number of thinned wafers will peak at the equivalent of almost 32 million 8-inch WSPY by 2020. This would represent a 14% compound annual growth rate (CAGR) from 2015 to 2020.
Thinner wafers bring several benefits, including enabling very thin packaging, and therefore better form factors, improved electrical performance and high heat dissipation.
Miniaturization towards smaller, higher-performing, lower-cost device configurations has thinned wafers below 100 µm or even 50 µm for some applications, such as memory and power devices.
Forecasts for the number of thinned wafers by thickness and by application are analyzed in this report. It also includes insights on the number of thinning tools, breakdowns by wafer size, and technological highlights affecting the applications mentioned above...
Soon gi Park (LetinAR): PinMR: Novel Optical Solution for AR GlassesAugmentedWorldExpo
A talk from the XR Enablement Track at AWE USA 2019 - the World's #1 XR Conference & Expo in Santa Clara, California May 29-31, 2019.
Soon gi Park (LetinAR): PinMR: Novel Optical Solution for AR Glasses
LetinAR is a Seoul-based startup developing see-through optical systems for wearable augmented reality devices. Based on our unique pin mirror technology which has quite different approaches from any other existing combiner optics, LetinAR has demonstrated ultrawide field-of-view more than 80 degrees with 8K high resolution. LetinAR also presented a form-factor-oriented glasses prototype device having the same appearance of normal glasses. In this presentation, we introduce a pin mirror technology and its benefits and contributions to wearable AR hardware including high image quality without any degradation, visual comfort supporting correct vergence and accommodation, wide field-of-view providing immersive experience as well as cost effective manufacturing process. We believe that the advantages of the pin mirror technology will not only suffice the optical requirements in future AR devices, but also shorten the beginning of AR/VR/MR era.
https://awexr.com
pmd/Infineon’s 3D Indirect Time-of-Flight in LG G8 ThinQsystem_plus
World-first Front Facing 3D Indirect ToF camera in the LG G8 ThinQ smartphone, with NIR 3D Camera and flood illuminator.
Reverse Costing - Structure, process and cost report - find more here: https://www.systemplus.fr/reverse-costing-reports/pmdinfineons-3d-indirect-time-of-flight-in-lg-g8-thinq/
Mainly supported today by flip-chip wafer bumping, 3D WLP, and WLCSP; the long term growth of the equipment and materials business will be supported by the expansion of 3D TSV stack platforms.
TSV integration is creating growth and significant interest in the equipment & materials industry
Mainly supported today by flip-chip wafer bumping, the equipment market generated revenue of more than $930M in 2013. It is expected that this equipment market revenue will peak at almost $2.5B. It is fueled by the 3D IC technology with TSV interconnects, an area offering opportunities for new developments in equipment modification—equipment that is much more expensive than the tools used for established Advanced Packaging platforms (3D WLP, WLCSP, flip-chip wafer bumping). Indeed, 2015 will be the key turning point for the adoption of 3D TSV Stacks since the memory manufacturers, such as Samsung, SK Hynix, Micron, have already started to ship prototypes this year and might be ready to enter in high-volume manufacturing next year....
More information on that report at: http://www.i-micronews.com/advanced-packaging-report/product/equipment-materials-for-3dic-wafer-level-packaging-applications.html#description
Huawei Mate 20 Pro’s 3D Depth-Sensing Systemsystem_plus
The complete system includes a 3D camera, flood illuminator, and DOT projector featuring a DOE.
More information on that report at: https://www.systemplus.fr/reverse-costing-reports/the-huawei-mate-20-pros-3d-depth-sensing-system/
Lithography technology and trends for « Semiconductor frontier » held by Aman...Yole Developpement
Lithography technology and trends for « Semiconductor frontier »
Mask aligners are the fastest lithography technology
Stepper technology provides the best resolution
Key requirements for Advanced Packaging
LED manufacturers use small diameter wafers (2”, 3”, 4” or 6”) and transition more rapidly than traditional semiconductor’s industry to larger diameters
WAFER SIZE
Wafer bow can reach up to 50μm for 2” wafers and 100μm for 4”, inducing pattern distortion.
WAFER BOW
2”
4”
6”
LED manufacturers can use different substrates, mostly sapphire or SiCwafers, which are transparent with light-diffusing features such as rough or patterned surfaces. Also, they can use metal wafers for vertical structures, so there’s large material variability.
In the fall of 2002, Innerspec introduced and patented an Ultrasonic Testing (UT) inspection system for surface inspection of mill rolls. This novel approach was designed to overcome known limitations of Eddy Current (EC) systems.
In 2014, Whemco Steel Castings Inc., a leader in mill roll manufacturing and service, approached Innerspec Technologies to expand the original Rollmate design with more capabilities.
When challenged to develop a new generation of mill roll inspection systems, Innerspec embraced the task and sought to design a comprehensive solution using the best NDT techniques available for the task.
The system is fully designed and manufactured in the United States, and serviced and supported by Innerspec offices in the US, Mexico, Europe and China.
Fan-Out and Embedded Die: Technologies & Market Trends 2015 Report by Yole De...Yole Developpement
Fan-Out and Embedded Die: Two promising Wafer/Panel-Level-Packaging technologies. What are the next steps for the growth?
Fan-Out Wafer Level Packaging is already in high-volume – but it’s about to grow even more strongly
Fan-Out Wafer Level Packaging (FOWLP) started volume commercialization in 2009/2010 and started promisingly, with initial push by Intel Mobile. However, it was limited to a narrow range of applications – essentially single die packages for cell phone baseband chips – reaching its limit in 2011. In 2012 big fab-less wireless/mobile players started slowly volume production after qualifying the technology...
FLIR Boson – a small, innovative,low power, smart thermal camera core 2017 te...Yole Developpement
An infrared camera with a powerful vision processor in a small package, using a new 12μm microbolometer.
Based on a high definition ISC1406L micro-bolometer, the FLIR Boson thermal camera aims at a wide range of markets: military, drones, automotive, security and firefighting. Thanks to sound technological and economic choices, the microbolometer offers very good performance in definition and frame rate at low cost. The camera core’s economical approach involves new lens technology and sophisticated vision processing from Intel/Movidius to power its infrared vision.
The FLIR Boson camera core occupies only 4.9cm3 without its lens, including a 320x256 pixel microbolometer and an advanced processor. The system is made very compact and easy for integrators to handle. It includes a new chalcogenide glass for the lens and a powerful Vision Processing Unit for the first time.
More information on that report at http://www.i-micronews.com/reports.html
Cost-effective 1 mm2 miniature camera with customizable wafer-level optics for endoscopy and novel medical imaging devices.
More information : https://www.systemplus.fr/reverse-costing-reports/ams-naneye-mini-camera/
Printed Circuit Board Testing Services and Solutions by Suntronic Inc.SuntronicInc
Printed circuit boards are an integral part of most electronic devices and they immensely contribute to the performance of these devices. We at Suntronic offer comprehensive range of testing services to make sure your electronics are working properly.
DPL Large scope nano-replication system -www.dpl.dkJanny Rasmussen
DPL UV LED Nanoimprint replication machine is on the base of nanoimprint technology with high accuracy position control system, as a method of producing high fidelity replication of nano-structure on the new substrate
Similar to 2D3D AOI在packaging substrate的運用及演變與對設備商之建議 (20)
Essentials of Automations: Optimizing FME Workflows with ParametersSafe Software
Are you looking to streamline your workflows and boost your projects’ efficiency? Do you find yourself searching for ways to add flexibility and control over your FME workflows? If so, you’re in the right place.
Join us for an insightful dive into the world of FME parameters, a critical element in optimizing workflow efficiency. This webinar marks the beginning of our three-part “Essentials of Automation” series. This first webinar is designed to equip you with the knowledge and skills to utilize parameters effectively: enhancing the flexibility, maintainability, and user control of your FME projects.
Here’s what you’ll gain:
- Essentials of FME Parameters: Understand the pivotal role of parameters, including Reader/Writer, Transformer, User, and FME Flow categories. Discover how they are the key to unlocking automation and optimization within your workflows.
- Practical Applications in FME Form: Delve into key user parameter types including choice, connections, and file URLs. Allow users to control how a workflow runs, making your workflows more reusable. Learn to import values and deliver the best user experience for your workflows while enhancing accuracy.
- Optimization Strategies in FME Flow: Explore the creation and strategic deployment of parameters in FME Flow, including the use of deployment and geometry parameters, to maximize workflow efficiency.
- Pro Tips for Success: Gain insights on parameterizing connections and leveraging new features like Conditional Visibility for clarity and simplicity.
We’ll wrap up with a glimpse into future webinars, followed by a Q&A session to address your specific questions surrounding this topic.
Don’t miss this opportunity to elevate your FME expertise and drive your projects to new heights of efficiency.
GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using Deplo...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
Connector Corner: Automate dynamic content and events by pushing a buttonDianaGray10
Here is something new! In our next Connector Corner webinar, we will demonstrate how you can use a single workflow to:
Create a campaign using Mailchimp with merge tags/fields
Send an interactive Slack channel message (using buttons)
Have the message received by managers and peers along with a test email for review
But there’s more:
In a second workflow supporting the same use case, you’ll see:
Your campaign sent to target colleagues for approval
If the “Approve” button is clicked, a Jira/Zendesk ticket is created for the marketing design team
But—if the “Reject” button is pushed, colleagues will be alerted via Slack message
Join us to learn more about this new, human-in-the-loop capability, brought to you by Integration Service connectors.
And...
Speakers:
Akshay Agnihotri, Product Manager
Charlie Greenberg, Host
Smart TV Buyer Insights Survey 2024 by 91mobiles.pdf91mobiles
91mobiles recently conducted a Smart TV Buyer Insights Survey in which we asked over 3,000 respondents about the TV they own, aspects they look at on a new TV, and their TV buying preferences.
UiPath Test Automation using UiPath Test Suite series, part 3DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 3. In this session, we will cover desktop automation along with UI automation.
Topics covered:
UI automation Introduction,
UI automation Sample
Desktop automation flow
Pradeep Chinnala, Senior Consultant Automation Developer @WonderBotz and UiPath MVP
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Ramesh Iyer
In today's fast-changing business world, Companies that adapt and embrace new ideas often need help to keep up with the competition. However, fostering a culture of innovation takes much work. It takes vision, leadership and willingness to take risks in the right proportion. Sachin Dev Duggal, co-founder of Builder.ai, has perfected the art of this balance, creating a company culture where creativity and growth are nurtured at each stage.
Accelerate your Kubernetes clusters with Varnish CachingThijs Feryn
A presentation about the usage and availability of Varnish on Kubernetes. This talk explores the capabilities of Varnish caching and shows how to use the Varnish Helm chart to deploy it to Kubernetes.
This presentation was delivered at K8SUG Singapore. See https://feryn.eu/presentations/accelerate-your-kubernetes-clusters-with-varnish-caching-k8sug-singapore-28-2024 for more details.
Slack (or Teams) Automation for Bonterra Impact Management (fka Social Soluti...Jeffrey Haguewood
Sidekick Solutions uses Bonterra Impact Management (fka Social Solutions Apricot) and automation solutions to integrate data for business workflows.
We believe integration and automation are essential to user experience and the promise of efficient work through technology. Automation is the critical ingredient to realizing that full vision. We develop integration products and services for Bonterra Case Management software to support the deployment of automations for a variety of use cases.
This video focuses on the notifications, alerts, and approval requests using Slack for Bonterra Impact Management. The solutions covered in this webinar can also be deployed for Microsoft Teams.
Interested in deploying notification automations for Bonterra Impact Management? Contact us at sales@sidekicksolutionsllc.com to discuss next steps.
UiPath Test Automation using UiPath Test Suite series, part 4DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 4. In this session, we will cover Test Manager overview along with SAP heatmap.
The UiPath Test Manager overview with SAP heatmap webinar offers a concise yet comprehensive exploration of the role of a Test Manager within SAP environments, coupled with the utilization of heatmaps for effective testing strategies.
Participants will gain insights into the responsibilities, challenges, and best practices associated with test management in SAP projects. Additionally, the webinar delves into the significance of heatmaps as a visual aid for identifying testing priorities, areas of risk, and resource allocation within SAP landscapes. Through this session, attendees can expect to enhance their understanding of test management principles while learning practical approaches to optimize testing processes in SAP environments using heatmap visualization techniques
What will you get from this session?
1. Insights into SAP testing best practices
2. Heatmap utilization for testing
3. Optimization of testing processes
4. Demo
Topics covered:
Execution from the test manager
Orchestrator execution result
Defect reporting
SAP heatmap example with demo
Speaker:
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
4. Unimicron Introduction
3
Unmicron Customer Base
Established
CEO
President of Carrier SBU
President of PCB SBU
Total Employees
Registered Capital
Filed Patents
1990
T.J. Tseng
ChiaPin Lee
Maurice Lee
10,150 (Taiwan) / 11,298 (China)
US$ 523.3M (NT$ 15.39Bn)
2,349 (Since 1998)
Notebook
PC & Peripheral
Communication
Consumer
Packaging
Others
5. Unimicron CSP Product Roadmap
4
2003 2005 2008 2010 2011 2012 2013 2014 2015 2016
FC PoP
I/O
FCCSP
Hybrid CSP
WB PoP
EPS FC PoP
Ultra Thin CSP
TCA
Coreless
BOL
UTS – EP
12. Challenge --- mouse bite defects
Defect size /
type
Detection
by AOI
Detection
by 4W OST
Risk if escapes to Customer
Very small nick
(L,W :<3~4um)
Not always NO Potential reliability risk defect
Medium nick
(W : 4um~L :~10um)
YES NO Trace crack open at stressful location.
Potentially escape to customer.
Big nick
W : almost full width
L : 10~ 30um level
YES Questionable
Missing Plated Cu
(L : 30um~ level)
YES YES Trace crack open in various locations
L
W
L
W
L
L
W
AOI machines are used on fine line design layers to detect “mouse-
bite” type defects not caught by E-test.
– these are potential product reliability risk defects.
11
13. Case Study
Copper or Dust ?
Challenge --- real defect & false alarm cause
12
14. Case Study
Nick or Oxidation ?
Challenge --- real defect & false alarm cause
Microscope image Red light imageBlue light image
13
15. Case Study
VRS times coverage vs image quality
Challenge --- real defect & false alarm cause
14
18. o Large variations of bump flattened areas from center to corners
o CAW(C4 area warpage) impact to assembly integration yield cause open issue
Corner bumps
are flattened
Center bumps are
not flattened
Flatten Bump Metrology challenges
17
19. Tighter Pitches with smaller present metrology challenge
Need to assess
--Higher resolution/speed or smart sensor/camera technology
--Higher proformance logic to reduce false alarm
Bump AOI
10 um pixel
70 um SRO
50 um SRO 40 um SRO
Need higher
resolution
18
Bump Metrology challenges
