COURSE TITLE: EE5440 – COMPUTER ARCHITECTURE
Credit Hours: 3 (Theory) + 0 (Lab)
Pre-requisites: CS5221 – COMPUTER ORGANIZATION AND ASSEMBLY LANGUAGE
COURSE OBJECTIVES:
The design of computer systems and components. Processor design, instruction set design, and
addressing; control structures and microprogramming; memory management, caches, and memory
hierarchies; and interrupts and I/O structures. Pipelining of processor Issues and Hurdles, exception
handling, Parallelism, Multiprocessor Systems.
CLASS POLICY:
 A student must reach the class-room in time. Late comers may join the class but are not
entitled to be marked present.
 Attendance shall be marked at the start of the class and students failing to secure 75%
attendance will not be allowed to sit in final exam.
 The assignment submission deadline must be observed. In case of late submission, assignment
will not be considered.
 Those who are absent on the announcement date of assignment/test. Must get the
topic/chapter of test/assignment confirmed through their peers.
 Mobile phones must be switched-off in the class-rooms.
GRADING POLICY:
Internal Evaluation
Midterm Exam 20%
Attendance 10%
Assignment/Presentations 10%
Quizzes/Tests 10%
Total Internal Evaluation 50%
Final Term Examination
Final Term Exam 50%
Total Marks 100%
TEXT BOOKS:
 Computer Organization and Embedded Systems by C Hamacher …, 6th
Edition 2012
 Computer Organization and Architecture: Designing for Performance, by William Stallings 8th
Edition, Prentice Hall.
 Structured Computer Organization by Andrew S Tanenbaum 5th
Edition
COURSE DESCRIPTION:
WEEK NO TOPIC DESCRIPTION ASSESSMENT
1 Chapter 1 – Basic Structure of Computers
 Computer types
 Functional units
 Basic operational concepts
 Number representation and arithmetic
operations
 Character representation
 Performance
 Historical perspective
2 Chapter 2 – Instruction Set Architecture
 Memory locations and addresses
 Memory operations
 Instructions and instruction sequencing
 Addressing modes
Assignment – 1
3 Chapter 2 (continued)
 CISC instruction sets
 Characteristics of RISC
 RISC and CISC styles
 Encoding of machine instructions
Quiz – 1
4 Chapter 3 – Basic Input/Output
 External devices
 I/O modules (module function and I/O
module structure)
 Programmed I/O (overview, I/O commands,
and I/O instructions)
5 Chapter 3 (continued)
 Interrupts
 Interrupt-Driven I/O (interrupt processing
and design issues)
 Enabling and disabling interrupts
 Multiple interrupts
 Direct memory access
6 Chapter 4 – Input/Output Organization
 Bus structure
 Bus operation (synchronous & asynchronous
bus, and electrical consideration)
 Arbitration
 Interface circuits (parallel interface and
serial interface)
Assignment – 2
7 Chapter 4 (continued) Quiz – 2
 Interconnection standards (USB, FireWire,
PCI bus, SCSI bus, SATA, SAS, and PCI
express)
8 Chapter 5 – Basic Processing Unit
 Some fundamental concepts
 Instruction execution (load instructions,
arithmetic and logic instructions, and store
instructions)
 Hardware components (register files, ALU,
datapath, and instruction fetch section)
9 Midterm Exam
10 Chapter 5 (continued)
 Instruction fetch and execution steps
(branching and waiting for memory)
 Control signals
 Hardwired control
 CISC-Style processors
11 Chapter 6 – Arithmetic
 Addition and subtraction of signed numbers
 Design of fast adders
 Multiplication of unsigned numbers
 Multiplication of signed numbers
Assignment – 3
12 Chapter 6 (continued)
 Fast multiplication
 Integer division
 Floating-Point numbers and operations
 Decimal-to-Binary conversion
Quiz – 3
13 Chapter 7 – The Memory System
 Basic concepts
 Semiconductor RAM memories (internal
organization of memory chips, static
memories, DRAM, and SRAM)
 Read-only memories
14 Chapter 7 (continued)
 Direct memory access
 Memory hierarchy
 Cache memories
Assignment – 4
15 Chapter 7 (continued)
 Performance considerations
 Virtual memory
 Memory management requirements
 Secondary storage
Quiz – 4
16 Final Term Exam Whole Course
EE5440 – Computer Architecture Course Outline

EE5440 – Computer Architecture Course Outline

  • 1.
    COURSE TITLE: EE5440– COMPUTER ARCHITECTURE Credit Hours: 3 (Theory) + 0 (Lab) Pre-requisites: CS5221 – COMPUTER ORGANIZATION AND ASSEMBLY LANGUAGE COURSE OBJECTIVES: The design of computer systems and components. Processor design, instruction set design, and addressing; control structures and microprogramming; memory management, caches, and memory hierarchies; and interrupts and I/O structures. Pipelining of processor Issues and Hurdles, exception handling, Parallelism, Multiprocessor Systems. CLASS POLICY:  A student must reach the class-room in time. Late comers may join the class but are not entitled to be marked present.  Attendance shall be marked at the start of the class and students failing to secure 75% attendance will not be allowed to sit in final exam.  The assignment submission deadline must be observed. In case of late submission, assignment will not be considered.  Those who are absent on the announcement date of assignment/test. Must get the topic/chapter of test/assignment confirmed through their peers.  Mobile phones must be switched-off in the class-rooms. GRADING POLICY: Internal Evaluation Midterm Exam 20% Attendance 10% Assignment/Presentations 10% Quizzes/Tests 10% Total Internal Evaluation 50% Final Term Examination Final Term Exam 50% Total Marks 100% TEXT BOOKS:  Computer Organization and Embedded Systems by C Hamacher …, 6th Edition 2012  Computer Organization and Architecture: Designing for Performance, by William Stallings 8th Edition, Prentice Hall.  Structured Computer Organization by Andrew S Tanenbaum 5th Edition
  • 2.
    COURSE DESCRIPTION: WEEK NOTOPIC DESCRIPTION ASSESSMENT 1 Chapter 1 – Basic Structure of Computers  Computer types  Functional units  Basic operational concepts  Number representation and arithmetic operations  Character representation  Performance  Historical perspective 2 Chapter 2 – Instruction Set Architecture  Memory locations and addresses  Memory operations  Instructions and instruction sequencing  Addressing modes Assignment – 1 3 Chapter 2 (continued)  CISC instruction sets  Characteristics of RISC  RISC and CISC styles  Encoding of machine instructions Quiz – 1 4 Chapter 3 – Basic Input/Output  External devices  I/O modules (module function and I/O module structure)  Programmed I/O (overview, I/O commands, and I/O instructions) 5 Chapter 3 (continued)  Interrupts  Interrupt-Driven I/O (interrupt processing and design issues)  Enabling and disabling interrupts  Multiple interrupts  Direct memory access 6 Chapter 4 – Input/Output Organization  Bus structure  Bus operation (synchronous & asynchronous bus, and electrical consideration)  Arbitration  Interface circuits (parallel interface and serial interface) Assignment – 2 7 Chapter 4 (continued) Quiz – 2
  • 3.
     Interconnection standards(USB, FireWire, PCI bus, SCSI bus, SATA, SAS, and PCI express) 8 Chapter 5 – Basic Processing Unit  Some fundamental concepts  Instruction execution (load instructions, arithmetic and logic instructions, and store instructions)  Hardware components (register files, ALU, datapath, and instruction fetch section) 9 Midterm Exam 10 Chapter 5 (continued)  Instruction fetch and execution steps (branching and waiting for memory)  Control signals  Hardwired control  CISC-Style processors 11 Chapter 6 – Arithmetic  Addition and subtraction of signed numbers  Design of fast adders  Multiplication of unsigned numbers  Multiplication of signed numbers Assignment – 3 12 Chapter 6 (continued)  Fast multiplication  Integer division  Floating-Point numbers and operations  Decimal-to-Binary conversion Quiz – 3 13 Chapter 7 – The Memory System  Basic concepts  Semiconductor RAM memories (internal organization of memory chips, static memories, DRAM, and SRAM)  Read-only memories 14 Chapter 7 (continued)  Direct memory access  Memory hierarchy  Cache memories Assignment – 4 15 Chapter 7 (continued)  Performance considerations  Virtual memory  Memory management requirements  Secondary storage Quiz – 4 16 Final Term Exam Whole Course