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This document evaluates various neural machine translation models for English to Japanese translation. It compares different network architectures, recurrent units, and training data configurations. Results show that soft-attention models outperformed multi-layer encoder-decoder models, and training on pre-reordered data hurt performance. Neural machine translation models tended to generate grammatically correct but incomplete translations.

Education

Evaluating Neural Machine Translation
in English-Japanese Task
(TEAM ID: WEBLIO MT)
Zhongyuan Zhu
@raphaelshu
1

Empirically evaluate various models in EJ task
‣ Two network architectures
2
‣ Three recurrent units
‣ LSTM, GRU, IRNN
multi-layer encoder-decoder model soft-attention model
‣ Two kinds of training data
‣ naturally-ordered, pre-reordered

Results: evaluation scores
4
BLEU RIBES HUMAN JPO
Baseline phrase-based SMT 29.80 0.691
Baseline hierarchical phrase-based SMT 32.56 0.746
Baseline Tree-to-string SMT 33.44 0.758 30.00
Submitted system 1
(NMT)
34.19 0.802 43.50
Submitted system 2
(NMT + System combination)
36.21 0.809 53.75 3.81
Best competitor 1: NAIST
(Travatar System with NeuralMT Reranking)
38.17 0.813 62.25 4.04
Best competitor 2: naver
(SMT t2s + Spell correction + NMT reranking)
36.14 0.803 53.25 4.00

Finding & Insights
‣ Soft-attention models outperforms multi-layer
encoder-decoder models
‣ Training models on pre-reordered data hurts
the performance
‣ NMT models tend to make grammatically
valid but incomplete translations
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The document describes the development and testing of a novel mathematical computing architecture called MaPU. Key highlights include a multi-granularity parallel storage system that enables simultaneous matrix row and column access, a high dimension data model, and a cascading pipeline with a state machine-based program model. The first MaPU chip was implemented on a 40nm process with 4 MaPU cores. Testing showed the MaPU core was up to 6.94 times faster than a similar TI C66x DSP core for various algorithms like FFT and matrix multiplication. Power analysis indicated tested power was within 8% of estimated power.

Standardising the compressed representation of neural networks

Förderverein Technische Fakultät

Artificial neural networks have been adopted for a broad range of tasks in multimedia analysis and processing, such as visual and acoustic classification, extraction of multimedia descriptors or image and video coding. The trained neural networks for these applications contain a large number of parameters (weights), resulting in a considerable size. Thus, transferring them to a number of clients using them in applications (e.g., mobile phones, smart cameras) benefits from a compressed representation of neural networks. MPEG Neural Network Coding and Representation is the first international standard for efficient compression of neural networks (NNs). The standard is designed as a toolbox of compression methods, which can be used to create coding pipelines. It can be either used as an independent coding framework (with its own bitstream format) or together with external neural network formats and frameworks. For providing the highest degree of flexibility, the network compression methods operate per parameter tensor in order to always ensure proper decoding, even if no structure information is provided. The standard contains compression-efficient quantization and an arithmetic coding scheme (DeepCABAC) as core encoding and decoding technologies, as well as neural network parameter pre-processing methods like sparsification, pruning, low-rank decomposition, unification, local scaling, and batch norm folding. NNR achieves a compression efficiency of more than 97% for transparent coding cases, i.e. without degrading classification quality, such as top-1 or top-5 accuracies. This talk presents an overview of the context, technical features, and characteristics of the NN coding standard, and discusses ongoing topics such as incremental neural network representation.

TiReX: Tiled Regular eXpression matching architecture

NECST Lab @ Politecnico di Milano

TiReX is a tiled regular expression matching architecture developed by researchers at Politecnico di Milano. It uses a customized instruction set architecture implemented on an FPGA to compile regular expressions into low-level instructions and execute them in parallel across multiple processor cores. Evaluation shows it can match regular expressions over 37 times faster than software and over 100 times faster than a desktop CPU. The multi-core design allows flexible matching of multiple regular expressions over data in parallel.

Protocol Type Based Intrusion Detection Using RBF Neural Network

Waqas Tariq

Intrusion detection systems (IDSs) are very important tools for providing information and computer security. In IDSs, the publicly available KDD’99, has been the most widely deployed data set used by researchers since 1999. Using a common data set has been provided to compare the results of different researches. The aim of this study is to find optimal methods of preprocessing the KDD’99 data set and employ the RBF learning algorithm to apply an Intrusion Detection System.

Architecture neural network deep optimizing based on self organizing feature ...

journalBEEI

Forward neural network (FNN) execution relying on the algorithm of training and architecture selection. Different parameters using for nip out the architecture of FNN such as the connections number among strata, neurons hidden number in each strata hidden and hidden strata number. Feature architectural combinations exponential could be uncontrollable manually so specific architecture can be design automatically by using special algorithm which build system with ability generalization better. Determination of architecture FNN can be done by using the algorithm of optimization numerous. In this paper methodology new proposes achievement where FNN neurons respective with hidden layers estimation work where in this work collect algorithm training self organizing feature map (SOFM) with advantages to explain how the best architectural selected automatically by SOFM from criteria error testing based on architecture populated. Different size of dataset benchmark of 4 classifications tested for approach proposed.

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