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Sp15 bee-112(fabrication)
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- 2. Group Members •Zeeshan Jabbar(Sp15-Bee-110) •M.Hamza Fayyaz(Sp15-Bee-111) •Anjum Aftab Mirza(Sp15-Bee-112)
- 3. •Process of creatingIC(Integrated Circuits) •Combination of Thousands Transistors on a single Chip •VLSI Technology Began in 1970s •When Semiconductors and telecommunication technologies been developed •Microprocessor is also a part of VLSI Technology.
- 4. •Verilog is hardwaredescriptive language which are basically used to describe a Digital system. •Verilog basically define a Top-Down Design or Bottom-Up Design Approach.
- 6. Here We ExplainFabrication Process P-Substrate Formation + Oxidation N-well Formation +Photo-Resist Photo Lithography Etching Stripping off protective layer Poly silicon Layer Poly silicon PatterningAlignment Formation of N- Diffusion P-Diffusion Same As N-DiffusionContacts FormationMetallization
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- 8. N-Well Fabrication: •Here wetake P-substrate blank wafer. •Where we take n+ as the Drain and Source •Channel is created between n-well. •Fourth terminal as P+ diffusion region
- 9. Step No :01 •Firstly, we take P-substrate because we have to form N-Well fabrication. •There is a blank wafer on which we make substrate P-Substrate Blank WaferP-Substrate
- 10. Oxidation We put P-Substratein the furnace where temperature is 1000°C Oxidation Process is done by high oxygen and hydrogen purity. This Oxidation layer is basically used for insulation and also for the Gates. Si + O2 → SiO2 Si + 2 H2O → SiO2 + 2 H2 Dry Oxide Wet oxide Furnace for Oxides
- 11. Oxidation On P-Substrate P-Substrate SiO2 Weclearly see the Silicon Dioxide Layer on P- Substrate
- 12. Step N0 :02 •A light sensitive Polymer •That’s soften upon exposed to light. •After getting elusion spin at 300 rpm •To get uniform layers of photo-sensitive material Approximately 0.5-1µm P-substrate SiO2 Photo Resistor
- 13. Masking •Process Of transferringa desire pattern on wafer •Mainly known as Optical mask. •Expose to light through optical mask •Types of masking: Direct Contact Proximity Projection
- 14. N-Mask •N-Mask is opaqueand transparent regions. •These Plates are placed on different on Wafer and place very precisely P-substrate SiO2 Photo Resistor N-Mask - - - - - - - - - - - - - - - - - - - - - U-V Rays P-substrate SiO2 Photo Resistor •Negative photo resist ,this area is hardened and exposed to UV rays. •Positive Photo resist layer become soften and removed by acidic or basic solution
- 15. •Wafer is immersedin acidic and basic solution and clean the exposed layer of photo resistor •Depends on the material used to be etched out •Example like in Silicon or Poly silicon we use Hydro fluoric Acid •Nitride we use phosphoric Acid P-substrate SiO2 Photo Resistor P-substrate SiO2 Photo Resistor Step No: 04
- 16. •Removes through ChemicalReaction •Like we use fuming Nitric acid or exposure to Oxides •Finally Removes the photo resistive layer or protective Layer P-substrate SiO2 Photo Resistor P-substrate SiO2 Step No : 05
- 17. •Make selective DiffusionOnly by two steps Pre-Deposition Drive-In Pre-Deposition: •Wafer is heated in 1000°C •Doping atoms like (Phosphorus and Boron with Inert Gas) •Diffusion is placed on the silicon forming a saturation of Dopant atom. •Temperature goes to 1300°C •Concentration depends on Duration of Doping Drive-In •Wafer is heated in inert Gases •Distributes Atoms more uniformly and to higher depth P-substrate SiO2 N-Well Step No : 06
- 18. P-substrate SiO2 N-Well P-substrate N-Well •Now againtake a chemical reaction of wafer with HF(Hydro fluoric acid) •Only to Remove the silicon dioxide layer
- 19. •Poly silicon layeris generally formed by silane at about 1000°C •This Layer is generally thick oxides layer •Then silicon is reacted with the oxygen at 700°C to give Aluminum and nitride and also silicon dioxide deposited on the Wafer. •Aluminum is then vaporized to deposited on the wafer P-substrate N-Well Thin Gate Oxide: •Conducting layer that connect the underlying source or drain. •Dielectric layer that separate gate terminal from source or drain. •Layer is normally compose of Aluminum or dry oxides.
- 20. P-substrate N- Well Photo Resist •We first puta photo resist on the Poly silicon layer •Then we put a masking on which part we want to aligned •Thin gate Oxide are made for transistors. •Poly silicon is used because it doesn’t melt in the further process. P-substrate N- Well Poly silicon Masking P-substrate N- Well Thin Oxide Gate
- 21. Self Alignment •Poly silicongives precise alignment for the source and Drain •Now, protective layer of Oxide is form •Use Masking process to make small gaps for n+ doping P-substrate N- Well Protective Layer Of Oxides P-substrate N- WellAlign for Doping
- 22. •Low temperature Process •Dopingion are accelerated to target solid material •Changes electrical ,Physical and chemical properties Advantages: •Precise Control of Dose and Depth •Wide selection of Masking Material like(photo resist , oxide, poly silicon) •Less sensitive to surface cleaning process •Use in semi-conductor fabrication
- 23. P-Substrate N-well ------------------------------- n+ Diffusion •n+ usuallydone through ion implantation •Some time called n-Diffusion
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- 26. •Firstly ,thick layerof Oxide is pressed on the wafer •This is a protective layer which protect other parts from environment . •Cut the part where we connects terminal. •Cut through the etching and same as above process P-Substrate N-well n+n+p+ p + p+ ------------------------------ Contacts Thick Oxide Layer
- 27. P-Substrate N-well n+n+p+ p + p+ Splutter metal onthe surface of wafer ------------------------------------ Metals •Through patterning and masking we get rid of excess metal
- 28. P-Substrate N-well n+n+p+ p + p+ N-MOS P-MOS END RESULTOF FABRICATION
- 29. REFFERENCE: Lecture slides . Ion-implantationMSE-630 (California State University ) Cheming –Hu –Ch3