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VLSI DESIGN: CMOS FABRICATION PROCESS
Submitted to:
Dr. Ribu matthew.
Submitted by:
KUNAL RANA
18BEE10024
STEP 1:
● First we choose a substrate for Nmos fabrication.
● P-Type substrate is preferred for NMOS Transistor.
STEP 2:
● A layer of silicon dioxide (SiO2) typically 1 micrometer thick is grown all over the
surface of the wafer to protect the surface and provide a generally insulating
substrate on to which other layers may be deposited and patterned.
STEP 3:
● The Photolithography is done next.
● The surface is removed with photoresist which is deposited and spun to
achieve the even distribution.
STEP 4:
● A mask is placed on PR later. Which defines
where regions into diffusion is to take place
together with transmission channels. i.e.UV
light passed and the area exposed to light
gets hardened while keeping Others
unaffected
● The unaffected area is
etched away with underlying
thick OX i.e.The remaining
PR is removed
STEP 5:
● The remaining photoresist is removed and a thin layer of SiO2 is grown over
the entire chip surface and then poly silicon is deposited on the top of this to
form the gate structure.
● Further photoresist coating and masking allows the polysilicon to be patterned
and then the thin oxide is removed to expose areas into which n-type
impurities are to be diffused to form the source and drain.
STEP 6:
● The gate is formed by photolithography.
STEP 7:
● The n-type impurities are diffused in the exposed p-substrate from source and
drain
● Diffusion is done by heating the water to a high temperature and passing gas
containing the desired n-type impurities over the surface.
STEP 8:
● Thick OX layer is grown and then by photo photolithography 'contact cuts' are
formed.
STEP 9:
● The whole chip then has metal (aluminium) deposited over its surface. This
metal layer is then masked and etched to form the required interconnection
pattern.
THANK YOU.

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FABRICATION PROCESS

  • 1. VLSI DESIGN: CMOS FABRICATION PROCESS Submitted to: Dr. Ribu matthew. Submitted by: KUNAL RANA 18BEE10024
  • 2. STEP 1: ● First we choose a substrate for Nmos fabrication. ● P-Type substrate is preferred for NMOS Transistor.
  • 3. STEP 2: ● A layer of silicon dioxide (SiO2) typically 1 micrometer thick is grown all over the surface of the wafer to protect the surface and provide a generally insulating substrate on to which other layers may be deposited and patterned.
  • 4. STEP 3: ● The Photolithography is done next. ● The surface is removed with photoresist which is deposited and spun to achieve the even distribution.
  • 5. STEP 4: ● A mask is placed on PR later. Which defines where regions into diffusion is to take place together with transmission channels. i.e.UV light passed and the area exposed to light gets hardened while keeping Others unaffected ● The unaffected area is etched away with underlying thick OX i.e.The remaining PR is removed
  • 6. STEP 5: ● The remaining photoresist is removed and a thin layer of SiO2 is grown over the entire chip surface and then poly silicon is deposited on the top of this to form the gate structure. ● Further photoresist coating and masking allows the polysilicon to be patterned and then the thin oxide is removed to expose areas into which n-type impurities are to be diffused to form the source and drain.
  • 7. STEP 6: ● The gate is formed by photolithography.
  • 8. STEP 7: ● The n-type impurities are diffused in the exposed p-substrate from source and drain ● Diffusion is done by heating the water to a high temperature and passing gas containing the desired n-type impurities over the surface.
  • 9. STEP 8: ● Thick OX layer is grown and then by photo photolithography 'contact cuts' are formed.
  • 10. STEP 9: ● The whole chip then has metal (aluminium) deposited over its surface. This metal layer is then masked and etched to form the required interconnection pattern.