This document contains questions for an examination on Low Power VLSI Design. It begins with instructions noting that candidates should answer any 5 questions out of 7 and state any assumptions made. The questions cover various topics related to low power VLSI design including needs for low power chips, sources of power dissipation in digital circuits, techniques to minimize power dissipation, impact of transistor sizing and technology scaling on power, low voltage circuit techniques, clock distribution schemes, and logic simulation.

1. egl
r{t..h , 3..c15
058C047
5't 2
NEW SCTIf,ME
M.Tech. Degrce E:{amination, Mav /.Iune 2006
Low Power VLSI Design
Tn1. lhFl
Nore. l- a,siet any FIvEluU questions.
2. hstilr at! ass,hPtioas made.
1 ,{ B.eflv ouilie thc needs lor lo* poReCvLSI chips' rn5 vnll,3
..I $14;E th. lrious sdces olposer dissipati.n in disilal lcs?
sho- that the drofi cir.uir polvei dissipatio, in a CMOS iNener
p--lt^- t.f !
12 "- r
' Dislu$th. rechniqres nsed ro mnrimEe thh po* er dissiDadon'
nh heh oine* diagrdns, exp]ain the impacl oltr&sistor sizire' g.te oxrdo
rhe
rhickness lnd teclnrology sctrlngon los polar el4tronics.
(l?rGrk,
b po*er vlSI
':---'-'aat+
lrolxin tie EclDolo$ and devi.e imovati-9f,1€Sliqvel hiCh speed lolv
d- a . rr-r..
.. L. nedo .,s"i" ., n,.r- oq-E?/t J-qedtr u, !l) c" teboo
0 .pr.'' oq e e.'.r d. ., ?. o, ltlorigir.e r*d'o o' p.r me -i'
-
.-.e
,'o8.. gi" -r
rhesr rdard devhrion oa tlre
Dose, $SdldFs*1elrron a cnclit has been
.he^ t
ei1 r. hale liomS@in:How
I 8% nucruario.s manv smples are
reoutrcdsorlatqeaie95/o.onfid.nilhartheeturofsmplemeaniswn n i59'"1
(04 Ntrk,
G,re. Z" : - l 96.
.:,:1 C,!t rh. Procedur. ror M!nl. Celo poid simuladon rilrlhe't'altionsrobe
' (06 L'k) r'
..1 Deiitri $irchtrr-{ ireques.t anL n..c Probabrltv ot a drgnal siEnal ard drive the '
:.Itrl:onnnp berredn them Osrllrkt t
IiPlrr, P(5) atrd Pt) nre rhe inpu! nan. Probabilides. find fie oulPut $a,c
L
l' "D.o. E5l o' 'ecor..Po..ionr tod
.i. epo-"'d'
eotrop) aoallss (o8trI.rk5) ?
D- 1. .. 0.4-..r0'o_P...:e2o"1d5'p'.o,o'roeloo' rB
'1O.. - PC .to"O..,.r.O'.'',.r.,.,.,,
" .a|.. oo i

2. L
05EC047
b Discu$ de vrioDs low voltage sving circuii teclxli$es used to save po{er
dhsipation in disibl chcuits.
4/ Menlion sone typical local trmslomadon olealors ior sate Eorsmizarion. Briefly
explainlh *i1h illusr"tiotu, ooturk) e
b $'ha k ihe principleolprecomptrbtion loglc? Explainthe lollovins wnh ihe hslp ,.i
. PE. ompuul:on d"lxre. ueb6edor shdo-.d" ompo$1o
ii Latch-bsed meconpulalion dchnectue. 00m,tu), _.t
./^e+t..ort,-r e p' .r p e o' d e 'ol or .C'Lrrai.Bs.0 ir. Edrmol h- M o e. -
. .ndoeo evalld'o i.. BJ. nullpkrr.s rroysiL, "'
b l hat is a contol data'ilod edph? Das the conlrol dara now sraph of a systeh rhar
'
computes the equlion Y^ = a,b, + laD.r use lhis to deiire the systm h&dwae
. Wirh the helD ofneat skelches distinEuish berqeen sinsle dild dd disfibuled
huffer schemes.f cldck dktihuti.n.
!tlDt are tle arlydtages ofhdimizins tolerable skeNs between clDstes jn vo level
clock distribution? Draq the two lelel clock iree usins chip ed package co-desis!
.p a.r rnL oorfl Dioiniar,ol . djq - d fi. -eo' dx ..-
q=' l- -i l"t
0q ' P."i (.)ip
(i .ele
ir,)
?t"h)1 e)
(o' ker - 0i-) ? (6
?
- c.a)[ aG)

3. j
U!N
NEW SCHEME
...,,tI 5u'n(,rrr M f'ch' Dcgrcc Er''nination
ow Power vLSl Design
l]
Notc: t )r!tu nn! [I/Eful4astians'
).,1ss,' nlissnts tatn ift'e$orr'
: : :; ; "r""::"' ",[c:;*AlYl]
<e;'.+c r:
'irl:irr taLrrCrd.:Ltrrlior1.'ir uuet'reircesiicr'irg
, I liis irL tji:r'nri
" , ,r ii rrr.1 r. mrrtil lr lo'r lrlfir anli trd'rr' !i rrre'tr'r
:l.rr. :,:tl, li::,s!ornrtni lrirli ot?ril !! tdlctior:
olsinglc'lirr' u' ':nrirtrted
aijr.ic Ll,r Lro jo Lior .nrl or !irl( s!c.r.5,oian etlu.
iriic ! irplriI th. Po'rer dn:iiaiizdloDic.lmrque crrh l.igrr tlocl it!
rjri, ,. i.r blo.it l;r.!fl.r .xphi'r llld dcsgo lio' al
:.iu.L.r u vr.tlr .i,,rritiz:rior atrd FIF lilicr
il!i:r:Jr Lr! ). r., i:,ir; )*:i.rr Lr'li|iqlrsrrrlgoi(lxn

4. t
i
I osECol5
wl Tc,ks E :..Lons or^DC^ Dr:jn Lr-..0 -drerjr!c,rjt
ro hc.or 5idc. d r t,rdcj""or,j(cj .j;n....oJ. ri0M rr.,
i.0M.,kr
0!ero n rm,J"ncuknr s(crinH DAcs
w-trh_r b,ocli diaann qpra;n u"c1pc]rion oiprast,lDc. Di,** ,1.(':.:,]ij"],
0o Mdk)
Ob" lc r' .ir nod.t o. r.pc t . t su1
'
cnrA- on Ior uorr(rt, whcn Lh npu i,J rrooan;v "noe.d.np!d,sfl ob...n h!
A
s..
o;.,.,, .,.,,,. .r,,,;
.;. ;:;"i;
r'.i'J".:;],... .,,b r,, ,,".,,."'
00,1,t,ik,
For 1li. Cdlpin s o.jltrior shorj bctowr Drorc rhxl e. n, =
(", *",I .,r"
cordlLidn'.qurred ror sundircd orciltarjo,
/-t
2I
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H
qrl
ais 8 (.)
.ritr?Dn.Lss llc desiqr 6red5 oaa

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"'.-t Second S€lnester M.Tech Degree Exllminaiion, June 200,
. hld ! Low Power VLSI Design
,".",11- . - tv,, vr '00
Nate .,1dswcrn4 FtlEJ,t qu.aions-
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{ D.d cn.& iiasaft c iuarh.loLloliisnlP 'oP!
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D"r!srL,:;rirdntrg:.rirnrrCucLio^1$lDiqDsircvOSdisnel sln!nj
)ir::. rhe cff..tJ ol rolr!g! :rou.lioi oi iaalleL NLrilslLue
rrl $ a n..r .n.uir l;lnfr exihir rlf, aolldwins o{ powN:rull
i '1. RACE dvuri. ciios hPi. NoF-) luLL aida
;;) i:Nde voi;g. nvi1.h losic (cvs!-) tull rdie.
a DE.,$ t oo, crdi,nrr oi tr(LorLdsrS/ion
b rlLhir d;contr, +pl:r rh.,(Lorr dri/ing(heDe
r D asr'*'poqncnLmrioiu'h( .Iirclllck{r"

6. 05trc')0,
i r70 *,[TTTTT ffTT'I
NEW SCEEMN
Second Semester M,Tcch. Degre. Exahharion, June 2007
Advanres in Vtr-SI Desisn
:l hr.l lMax. Mart6:100
uo't: t. t,'--ntr Uvtf '1 tu..-aat.
rcP-d" nb .hL !.{u. . d@]
proldi8 qNhrbdoffB ii diip !6i!i u adi d
Df,.r.j s.',o I tor, . i.ro.,i!
, D -c,al l,n Pi ch.ors,&..v.
ri r MESPET, rrr. c.ptig corotrmr oi *rhii rh. rcire t0y* rckisr I rot.cnr r.t,c
t .llr(iyi &miq oand.s N. ir l.::Xta,!cnr. Th. Schotrki baii $hs gr, o!, ir 0 r cv
TL:.cr!. qrirnk $k.=0IFn d$cJiiconus.dlr , rclati; dicre.riroNhd
0aLr 9 o!r..Di..rlIiulri)ons:vr rd(trpichotrv.tus!,vr
{06!lik)
n oi rlrc l0it furcitotr diftrcnc rrdsef r.i md
l: ,, ..0, . r..
:r. .. . ...r 1o4 . D,
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au!tl:rs.r{rj- dci!t dE . rron ro L
I0 r k 6 +ci c *or MosFp r .s ,i I E
mdiodsroor .omerh.i:hrmtu dr. rc6Mrk)
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ry, lisduirr, oodhrir, md h-rj
. (ilMlik)
b. Exprri.rrr|rdab{haprort ocMosvLStdsigiclhn(r. 10rM,.kJ)
ilclr lctr3r ro co iiuqrs i.ci allos
.)l :1.:.mpLr i6 d)wic.o( is i
r
i

7. 31
0sECo47
M.Tech Degrce Examiration, Dcc. 07 / J2n. 08
Low Power VLSI Sesign
M, MJn- 100
llrtc : L I tswrt ut)1 /71Vn full ttu6ti,ti-
2. J nhy ossumrtiots,lode.
"s!if|
, , , ,, ,, .l J'',s,
'
l)i*!s rioi,.i,cnrr powc. djixjralioi na CMOS inveder ant hente dervc wr usual
..ltI D lvr Foo'. )-1i..'o^e'o'
I . ,,'. n'- ,
(oi M.*,)
ii,Lh Ltic iirif.L taLdirsr)ns.!xpnirlircirnlacrcinadsisrorsizi|e,gl.oxideltricknelj
:,ii Lr.nroicitr s :rL ni lor p!lereie.rrotrics
ol] Jlif hu5.frrLlDg a( jr ri 66 MHzdl..i( iI. n di!i.! r.lDa.nmccol'
ri r:l I L
liL)i5i ri.ror !.!ir:(d r. have a loBgljrg probabiiny of0 2t d elcl Jlo.(.r.Lr
(ii Minrr)
I lr ! i." . Iirtrsr ( tlrpo,er dlsil.lior? lio!r oi rhc, Lr;
I Di.usEir l.!clrntri,islo cii:n crow{iniCMOS.n utr (0sM,r$)
rcba.bil r)' i! losh circuiis (odMrrk,
.. C.rirLn. rLic hDsilio) dcnsitl n;d slarlc pmbabjli.y oI t = ab + c :ir,eD p(a) = o 2,
l/l =ll r, = r!n.Da = ntbL I D(rr=i
i nsuish belrt3n s;rsL dri!ej
l,! tll..j
rr. ui.g.tr ! an( packagc.o dcailD 0rr[h]k)
1r Lr: r. ro :,i b. i[,.i lix!]rar :rs rs3 u rh resDmr Lo rvo hv. !L.ct ltrt jbtrLi.n
:r i,,r Llihri:tL,* rlAlgornLn l.rc.
'lrnlzr
jri:xn.r r:rd !L rLlrrls ii .1rLirsrurc tcr.l
,r1. .ro:irtir ri.i!.rilulr .ri

8. f
+ -Itrl]1
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o
De' O' 'Jin 08
^".-^L h"".".I ramioation,Mode vLst;:IcMli:roo
o.r,""' .t' and Mixed
""'il, trr rrYE['t1!ucaions'
Narc I A swer
'ili:i"J{',.',^1'J''f Li',l';;l"ifl;T:*"
' I B:i;i"'::ti?:'#I;::[:f fi ;.,,]
Lord. (10Mrl6)
idinoICS smse {irh diode conncclcd
1 r D. L.D' P(srcntol'oD@ ;rc"i slroBi ii ns Q2(h) ll0Mirrcl
I a, kdlr e t ' roLrlcq!r!ortn
t . o 40 n"e aro '' ..'. 'i
o. o ,rlll i
i,.,.,'..4r"'vt" rct' nql" clacu{rn !d
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,,
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ii)
$iih |)eal dirgftnrs and
rxDla,r lft o!{lfui oi ouftir ste'ig DAi: rchil(l,rr. 110lt1rk,
drqFms Jrd
;';i.; ..*'"'xorpLprrre D' a.hr ' lrc rh ncar 'nmph
"
ri{. rl,od Ntes !n rnv Nlo'1lh"lLlo*iig:

9. a
I
*^l ffrfTlJlr 05Ic047
M. T.ch. DeCree Ex.bitratioa,
Low power VLSI Desiqn
Junc/Jtrlv oi
il i,",i. ;r'f, niriiillflfu"ffi r,,,*,,*r,**,,,'
$'." r (tp 3 ro . o(. or, jri.,(,
i.r...orpo(-rdr pdrio- i1 vo.,.,.dc_'r.
(06[rrr!,
lfi;;;y -*.*, - v, reducrio, which is used
10 ninimi?c rhe d,amj. powcr
-'
' i,:;J";'-' """ xi' i= r,2.i- aEDuhreru{!ep".r.", ,,,=11'f'll]
. €,pr,j,, i;i;tuotos] bd d*"".**-_;"lt$)
'' I,, "".
:n;ffi" oi, " ff;
c. Lis,hcadvrntaeesadtjhir.,."..,ro,"ro"*.,-*iP_/^,
"-;'::--:-'";:;'i:l' fl"*,f;
*"""
r Erprai,lhe 2rio6 prcbrehs
e".",",.,"r ," :",, r.";;'*"
"o*r ,"*,.t"
' I i.:;.T .,.j ",: ","i., :::.:, .j:, ;i,*;,,::;.:l u**t:i:;
. lvith ctrait qamptes cxphD Joc.t ..a.stumatdi
operatorc for gat" ,"..r,r;."'*'
o
]].j"-; *', J, Fhrdr oddr"r.od eo.d,on epdin * ." , i:TlH
c Brlcnvoxrlaitr sc& nrachjie eicodtng. ", {0s^he)
_
" ]Jq";",;6ry,5;;;'"ii;,1,;:*,: ",. .
:ip::l:il or e-el ua ..orJ..o1 k.h. ,r r ,",r.*"*
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ur,* !.orr hor* on '1""-**',.
b Verorqurhrialion'tud nR fihtr
c ro q mitrimjaLon d arAomhr
tert
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e. sbr ( probab,lrtyu;nssieon,sdccohponhoi
ftlhoJ

10. I
o g I- 088C047
" l, l,
USN 0
M.Tech. D€gree ExamiEstion, June-July 2009
Low Power VLSI Destgh
Max. Markr:100
Note | 1. Answt ahJ, FIVEfu quesiions.
2.Sto dad Notatiohs dre lsed-
Explain {hal are the different rypes ofDowerdissipitio. in CMOS cncuir.
Dedvc nc noi imponad eqMIio. lor poper dissiD*ion in dieital vL$ cncuils. rakins
in lo accout n]c cha rs ing and di scl&gin s of carac ira.ce in CMOS ciicDns (03 Mlrk)
Discu$ in detail lhe slDn circnn cun.ni of rn unloaded invencr. ExDtain rh. effeds .r
.o' iflll slooe ond or D .. looa i ..pd rr.eo o.' ..'"r
'1ri
a !xplain rlt inpict oltu.sislorsizrng, aate oxide rbickne$ rnd technology s.atin3 on low
Foerclcctionics*nhsuirabhdherams O0 Msb)
P: Wriloabiofnoreortechnologyanddeviceimovariontnrnore!highspcedlowpos€r
VLSI dcri..s (r0 ikrk,
lxpl.in m derail rh. vai.i6 !.nrr mod.ls n tudntduml le!€L xlysis O0M!rk)
l)ncu$ indelaiiMo.le C..io i,nuiano. rccird,tue atd ncnvc anexpF$i.n tar rhe
rnple lze required10 de.ide r[e ro$ing crile !E!isi-]!! pp.auhoos ro be rxken in
dns m.lh.d. /< !-_:-.r;.
j.)^.,. !0i,irk)
Define naric probabiliry. Denve a" **".,#i&;9o9-
Pr=04. l'.=02 andD"=3, Df=?,D!= 1 06 hrk)
D.fine.rtolD. D*cuss horvpowlf eyimalion olacombin io.al cncuii n cannd olr
usine or.opv i,rnlyris. OoMarB)
Erphin rhe dual bit typc signal modctlbrDSP s],een Dncuss in deraitdaia path modrtc
chamd r
ion ior a modtrle wilh on. inpnl and one ouiput nLcir as HFO que wnh
rlcvanr .araciraoce dd po$t.erpE$i..s. OoMirk)
WLarare gLiches:rHoB do llrcy al].d po*or cons0rprion? Horv 3re rheyjniniojzed?
(05NjIk)
11'nhsunabG dia3rroN. erplrii hnent Laichcsaad fli! iopr 105 Ni.!k)
Explrin nirr lvficallo.a ransi.nDaliotr opcmrr llr gale r.'orCan-xilon Cilc s0irahte
0! rL*)
U'hd $. prin.iple ol prc - compnrarion logicl Erttarn drh suirible dia8r s
is
i) Pr .chFutaioo blsedonSh,mon s decomlosiijon nerhod ji) tatch b8ed
prccori trl.ti on arcni te.tuc
@j ua rrs)
Ixplain briefl y s$ilchi.s a(ivil) icducrion Discus thc follo*ins rechrqu.s :
i) Guardei evaluarion ii) Busmulrjplexine. (r0Mxrk)
ii Dndss ioierail conr.ol dara lioN grrpl and hudwr. a..hirc.1ur.. Erpl.inrhetoy
sr.ph t Nlomaiion nilh opnro. reduclion
!ire nots o. si.gle &iLer r[cne dd dirnbued bulic^ scheme. Ato djscu$ porrcL
nrini'nialicnrc.hDiqucolaidqrLJpadrlen8lbctD.ktrecrvirhirsddaynrodel 0016,kl
!rpl.i. Ln dcrail archle.ure lcvel.niDation and rlnrhdjis. 0t Maik)

11. lOW ?OWER VLSI DNSICN
TEST.J
,{llspo any ,ve qtr6rions.
foc'| 'r"iir,'ion equ2,ion ,n d,"iLr vli,
:1.::':': i: r0d di.riar:inguf car
u, rg.r rcrrbrgr0g
rr ! po.r di..rporiJn (ron,artc,
.distu., rh" r,chni,ruecromroimire
n) yrire .D dptan rory n oie rn
a rh e treed to. tor! power dcsign. (0a bark)
- sl,,a,ci:quir rrri,r:onr1 ivUs.ircu,r.
. "urr,,i
J,r.'h,! dirgHnr. L!nlrib,[^.rfec, of ou, .in-us r0 d":ritr,.rh
!ircuit currcnr !ri.lion. (0i mArks) I ur,oad,"o," n,,,.r"p.",.t.1,,
, .ll illli. . )llef nol. .J! dlfieDr r $ Des of po,ve. dissipaiio, in c rros
^,, r ,r . (04 r.., ,.
. .l rrrl,iq wL.r otrm.,qJoj..7in:. q.,, o)jdr,bicr(Ies,
^,'jImta,.
,P.r,.ol.BI,.x.rngJ,.to$
ron1..elc rronj...,0r.r2fr, l
s!icc cir.uit sirnutxtions. ( 0,J Drrtis)
.irt jr | !.i rr.,jr '. . :...Ir I tc, I r..,.ij ,Li.e t,l
UO mrrl rl
lirpl,nr in dohil rrrious ponor mo.tris itr irrl itoctural I'vel 2nalrsis.(tll
orxrls)

12. a- I
6. a) Explaih with slitabte al bit type sign,t nodet ir DS?. ( 04
e{prr'tr hhar i: dzrs parb n,odure cbard.,crarjoD 3n,r poBer
rn,rvv dr(1r )d ,,bk
",,^l].,.0:-, esmple.r06 h,rk5j
' ., frpla,, .har ia ,bp rfrporr!nce or Jr .,ricrt *,,oaliou of meas ir
wlontcca o simqlrdon,tectrDique aqd .terivr
,equire.,,o decide,hp no;;;;;,;;;;l;::il":ion ror dre sanpI" izc
b' Cahuhle hm oio. smpt. sre ,equircd lb,, tv.
., tbeeiror.oreophme.,"i.$,rt,in-/-
-h!r !. are ooqo c.hfid.nr
i0o0,",,eb Za,2_ r.65aodsrahd,rd
d(v,alrob otrh. p6ydlamptN h."
Leen obsened ro have .- rO," r"",r,".",
rvrm the hc, , ( 04 harkr)
/8. A) Write st,orr n.te on ,) basic pdnciptes ot lop power
dissipat'iob in CMOS cir.uit! .) dsig. b)powc.
SiICE p.w.r anatysis.
ZZ ---" -- -- ------zz,

13. fl
BANGALOREINSTITUTEOF TECIINOLOGY
Dept oiElectronics and communication
Test: I
Subject: LOW POWERVLSI OESTGN
Class: 2'd SEM MTech
Date:21-03,09
Answer any five tuI questions
l.a)Brieily outhie the need fo. tow lower VLSr chips. I05l
b) Explain rhe different sources of power djssipado; in CMbS
Circuits. I05l
: "l D..cu$ he art aenr rechn'.ue r.ed -o,chie e L e. o$ poqer in VLst (hiDs. r0r
b - p'-n,he rechroloBy dd de. ,ce i1.o,a;oni,or no e' hier speea,oq p;';e 'Vl'sr
r
devices l05l
' V . r.r. .d oissr._ .
.e,(pldi , rt "
npc-rorr11..i.ro-.i7in8.osreo:d"Lhjckne..dd
recnnorog! scaLrnq on otr powereterrronics.
[]01
1-.f'd.a heLonceoro f.i..i,".e. .aljonrne"n r
Mo-re."r,oj_uts.io echrrqledd
d-.erh<erpre.sorlorn_mberor .,npte...req.i,edr.d.,.d",lr".,"pp;;:,i;;,;;;__
s,muLat on I tot
5 NirS rhe nea t rogr. e,p.i1 o-.1 brr Dpe.U d rnoJ(.,o. DSp -ren.txo rn hor
Lne
d,. pJrh mod,le i
.Ld ocrer r.
ror. rodure v iLtr one i p_r rd ore o_r;d rl, t,r O
QUELET with relcver capacirance aDd power exp.essions. lt0l "j.h
5a) ListtlE advnnkg* dd timiiations ofSPICE
lower analysis melhod. [051
dEr::terization rectnlquecm be u,"ato inJ.turi" .tat" po,,".
l-lip-,l1]n 1o$lo:eii
dlssipation ola logic gate. [051 "o.p,t"
7. Explain fie lbllo1ling Porver Modets.
i) Based on activliies
ii) Based ou Conponenr Operarions
iii),{bslmct staiislicat powerModets Ii 0]

14. 91
D t!f
LOW POWI]R wsl DXSIGN
II,TEST
Ansrver aiy five qDesrions.
'
xl{*: ;ti$r[x,,,m$#*"i:::
:ffi ]x.# 1Tr
*j iri* i. if :!i,.l:r;, ;'j H l;hr,il,ir';xri;iii;' .?,'i i.j
' i?,1;]::.;1'"r"r,"," "n prop.sa,ion or rrisition .rensir, in nisiial
o
i;: ;,'; " 0.
" ,,;i;",".,I:il;:,,;; . ,*,.,*,
oI cr'rropr. l0a m3rrj)
logiL r,J.!,r usinB orkopl
' ;")ll:l'":.:"'
.l il
;:l:;.",1; "'''
o, ,.onL, !,i,r
"";'';',",'.;ilii""' ili.;'i'.,;;
bl f) ilc . go, r nolc on Lrct,rs,id lljp nops. (0a n!rks)

15. I
i
x 5. !).Whar i, Ioq vokage s"iog . sxpt,h how poser
reoucnon
u(,ng ro$ vor(3ge swrng recbniqu. rvirh suirabte .rempls.
t05
d
; b) Write a briefloie on low power digitat ce library. (05 n.rks)
{
b. !) wirtr suitabte ; usirlnons erphin rhe tytical local traEsformntioh
operarors rorgrte reorgsnizarion. ( 04 msrk)
I
blwh.r r. togrc etrcodine . erptiin in derail {ir h bus i,v$t coding, (
rn..k(r 06
.
l,l^,:l1 r: rr.e principre orcompukrion ar.h,,ftrure erprrio
bAC.d pF
pre compur.rio, rosn.
::!1"1.-:",.
ua eo on hannon an; pf.
s dccohpoirion. i Oo hrrr*
b) Discuss in brjefwharis srniehrchine
8. Wrir. a sr,ort note on ftr foltorring ( 1,
a. CIirrl,es. pN?r mtrumprioo ,hd poryer mi0jmi/arion.
u, drgo cafrq(an.r Dgder I votragc swinC redu(rjuun,.
.. Adius dble dericA rL-*hotd v.tra!.
d. Sig!ni caring.
x)i --,-ltEC047,-_-,_XX

16. 05EC025
LISN 5v ol{ L
NEY SCHDME
/June 2006
M.Tech. Deeree Examinatio!, MaY
VLSI Circuits
Design of Analog and Mixed Mode IMar Marls I l)U
Nblet t Ant|'et an! FIVE rtll
questions-
7 Mtst,P dan nult itobq be a$tneo'
r J EDl.r 'he operarioi ol'oMon rutre
,,;. !ou<e lord @
6 DirterenlD'e bes e'n ci(rdl trnd rolde'r
n.".. in erDreslon lor !o tase gr 0ofsource lollo4r
tu"p"
:".,::".', ii'.,"*"," " ' -r'.d"to' pu'10 'g-
. oDtenen..o -",E:'.." )d're_ In-m'!l-eol _/
as$me
frl =
ro , ='nn,A ,"
'" ' oo
sdLurJrcd
17] o 5
gNCor = 50 tLq /Vr and /= O''1Vr'
.L'tenL sour.e and hen'e ePlrLnis
Etlxnr ihe oPeraiion oIMOS ,nroleneoEd
Lso menuono (hrl lrro6 6otrrpu 'mledJnce
.ude.tr vollage char$rens cs
JBrmol{ lhJM"trn'n( rnLno.o(! rrl l'..e
de'e L
Dr/r ltd !tru d
i and ii
r!!arilnihip benr.e!
D -. !.L.re'r.. (o :i0- o
,0,5 ,ortr,'t
'i
-a
!um(o =u11! tr Lru '"
Expl;n rh. oPeiation orGilbei cell

17. n
osfc025
a- Barlain the d$ign ltobedN of2 st!g. CMOS OPAM? cieuil.
b. Derive d qtr.ssio for ?sRR ofcMos o?AMl
a. Diss th.layout issus related io mixed sig@1s,
b, Explain ihe opGEdon of S / H ciFuir, with special r.GEn€ to
lold oode eeltuG @r.
'!d
a FllanR 2R ladder neNor ks wirh n4*dv dEgl,m rd eour.ors.
b Erplain fie ole of ffir nffii18 inDAC.
3 vrit€ t*hrical not onthefolLowns:
I
a. EPi!. Uie-DAc
b. i!ft ooElDesdtion for 2 stge OPAI',P