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3rd Semester M Tech CMOS VLSI Design (Dec-2013) Question Papers


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3rd Semester M Tech CMOS VLSI Design (Dec-2013) Question Papers

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3rd Semester M Tech CMOS VLSI Design (Dec-2013) Question Papers

  1. 1. 3'r # 8(*ut tzBC020 USN M.Tech. Degree Examination, Dec. 2013 I Jan 2014. GMOS RF Gircuit Design (.) o o Max. Marks:100 Time: 3 hrs. nraJrvg, any , r7 DJ4aa l4eraavrao. Note: Answer utaJr' FIYE full questions. IVf!. I () E a. "'Wlren is a system considered linear? Discuss the effects of non - linearity w'ilh respect to (06 Marks) i) :eross modulation ii) Intermodulation. b. De'fiie available power gain and hence drive FRISS equation for noise frgure. (07 Marks) c. Det;it[ii"lr. the noise figure of the common source itug. shown with respect to source ., I A. t impedance"'R,. Neglect the capacitances and flicker noise of Ml',ahd assume 11 is ideal. () ! oX 69 oo (07 Marks) ll Voo troo .=N xao Yo otr -o LL .._V*t -! Fig.Q1(c) ()= a: 2a. oO do -o c. .r? o --1 t4r A b. o0c rc(6 ., vin OE GSM receiver requires a minimum SNR of 12dB and has a channel bandwidth of 200KIlz. A wireless LAN receiver on the other hand, specifies a minimum SNR of 23dB and has a channel bandwidth of 20MHz. Compare the sensitivities of these two system if (04 Marks) both have an NF of 7dB. ' ,"' " ,1,, For the binary sequence 0111001101, obtain the differential encoding and decoding sequence.. Draw the encodei and decoder circuits. o5- a. b. o..i o= 3o c. 9O JE a. b. >,h ca0 iu= c. go =(! tr> =o o U< 5 -Cl o o 7 ",.. (08 Marks) (07 Marks) What is CDMA? Exphin direct sequence CDMA in detail, Explain Weaver fuChitecture of image reject receiver. Also explain the problem of (08 Marks) secondary imag6ih weaver architecture. (05 Marks) Explain the_,,qroblem of image in heterodyne receiver. :',, Explain the operation of Bipolar LNA and derive an expression for aoise figure. (08 Marks) (07 Marks) Erplain the operation of passive and active CMOS mixers. how input matching is achieved in LNA, considering any of the examples. .Explain ,"..",.., . (05 Marks) diagram. communication. ,, fl*, Explai, i"y two basic LC oscillator topologies with necessary ""''b. Explain the effect of phase noise in RF c. Explain injection pulling and load pulling of RF oscillators. Explain the working of charge pump PLLS. b. Explain the architecture of Integer - N synthesizer. (08 Marks) (06 Marks) (06 Maiks) a. (10 Marks) (10 Marks) a. Mention the classification of Power Amplifiers. Explain any two tlpes with necessary b. 6 L diagram. Explain feed back linearization technique used for power amplifiers. 8a. b. (10 Marks) (10 Marks) (10 Marks) Explain the noise models of BJT and MOSFET. What is monolithic inductor? Explain loss mechanism in monolithic inductors and give techniques to reduce the same. (10 Marks)
  2. 2. t2ECttT USN M.Tech. Degree Examination, Dec.2013 / Jan.2O14 Automotive Electron ics Time: 3 hrs. Max. Marks:100 Note: Answer any FIVE c.) o o a. b. c. L o o E9 69 5 brl trca full questions. List the major components of 4-storke/cycle, gasoline fueled SI engine. ::,,, (04 Marks) With neat diagram, explain the four strokes of a typical modern Gasoline-Fueled SI engine. Explain in detail the intake manifold and fuel metering. (10 Marks) (06 Marks) 2 a. b. c. What is spark pulse generation? Explain primary current waveform. What is ignition timing? With a neat sketch explain breaker point operation. What are drive train? With schematic explain planelary gear system. 3 a. With a block diagram, explain typical engine control system and list the variable to be measured associated in an engine control (08 Marks) What are mass Air flow rate (MAF) sensor? Write associated electronic signal conditioning circuit and highlight the importanee of binary (06 Marks) With a neat diagram. explain strain gauge MAP sensor. (06 Marks) .=N d$ b. yo og _C() c. (04 Marks) (08 Marks) (08 Marks) configuxation. Counter. a2 4 a. a= oO b. c. 6 -! O 50e (B(s -o >e .G G'O cd 5 a. b. c. OE ^: tra o_t a= 6 a. b. a What is cruise control system? With aid of control block diagram explain cruise control; b. LO x.Y >'! oo" coa tr> 7 ,.....,. =o o- rJ <, -i o o z (! 1- o 6i Explain in detail ZTAzEGO sensor. Describe EGO mounling and structure and also describe characteristics of FGO sensor. (10 Marks) With a neat sehematic of a solenoid, explain fuel injector. (06 Marks) Write a note ou idle speed control. (04 Marks) Explain in brief digital engine control system and illustrate with aid of lookeep table engine crank and engine warmup modes and write the expression for mass of fuel delivered to cylinder. (12 Marks) With aid of control flow diagram explain EGR control. (08 Marks) Explain antilock braking system. ao o ti: qo How do you measure crankshaft angular position? Explain magnetic reluctance crankshaft position sensor. (08 Marks) What is hall effect? Explain hall effect position sensor. (08 Marks) Explain throttle angel sensor. (04 Marks) 8 a. b. c. d. (10 Marks) (10 Marks) Write short notes on the following: Sample and hold circuit. ON-Board and Otf-Board automotive diagnostics. Radio navigation. Electronic HUAC svstems. (20 Marks) E****
  3. 3. 12EC009 USN I Jan 2014. Advances in VLSI Design M.Tech. Degree Examination, Dec. 2013 d o o Time: 3 hrs. d Note: Answer any FIVE E full questions. a) d o o ! b. Draw the transfer plot of CMOS invefter. Discuss the elfect of aspect ratio on tlf curve, with suitable mathematical analysis. (08 Marks) Derive the expression for the drain to source current in MESFET below pinch off. State the c. assumptions made. Bring out the differences between BiCMOS and CMOS technology. a- oX 69 -.o ool ioa .= a-l a. b. c. ?^ Explain the basic principles of modulation doping with the help of band diagrams and explain the operation of HEMT device structure formed using GaAs and A0GaAs.(10 Marks) Derive an expression for the pinch off voltage in a MF.SFET. (04 Marks) Ann-channel S^i JFET hasZ:2! lr , L:4pm,d:7.2pmand, Nu:10lecm-3, Na : 5 * 10rs cm-3 and prn = 1200cm' / 1VS.1. Assume the gate voltage is -3V. Determine i) the drain current at saturation ii) the drain voltage of saturation. (06 Marks) b. yo -O List the properties of ideal MIS system ooi., equilibrium. (04 Marks) Describe a typical Management Information System Structure. Also describe the energy band diagram for an ideal n * type MIS structure biases in accumulation, depletion and ?;! 50tr (d .E 3a. ,6 -ao c. OE a-A o,j 9E to oE !O ^.= >,! iotr50 so => Xo 5t< *C o z E (0zl Marks) ...:: ()tr oO 6O (08 Marks) a. inversion. (10 Marks) Describe the small signal model for a MOSFET. Also calculate the trans conductance of a MOSFET. giventhat L = 5pm ,Z:5Op,m, VG:2V, V16,.rl,ora:0.98V, pr' : S0Ocm2/1VS; Ci : I 15 nF/cm:. ((16 Marks) A p - channel standard Si MOSFET is doped with Nd : 10rs cm-3. The MOSFET has an oxide thickness of 8nm , ZIL :20, hole mobility : 450cr#l(VS) and Qr : 5 ,, 10rrq clcn]. Given nr = 10l0cm-t , K, :3.9, Ksi : i1.8 and O,nr: -0.312. Determine i1 the threshold voltage of the device ii) the value of Vp, sat at V6 : -2Y iii.l the value of Vp, sat at V6 : -7V iv) the magnitude of the saturation current for V6 : -lV. (08 Marks) b. lxplain the sealing theory. (06 Marks) c' , E-xplain the two - dimensional potential profile for i) long channel MOSFET device and ii) short - channel MOSFET device. (06 Marks) a. b. c' With the help of neat sketch, explain the construction and working of Carbon Nano tube FET. what are the advantages and disadvantages? (08 Marks) Describe the defect tolerant computing. (08 Marks) Sketch the SOI and bulk MOSFET structures and show the differences between them. (04 Marks) a. What is the need for super buffers? Explain NMOS inverting and non - inverting super buffers with the help of i) Schematic diagrams and ii) Stick diagrams for the same. b. Construct 2 input NAND and NOR gates using NMOS pass transistor logic. (10 Marks) (04 Marks)
  4. 4. 12E,C009 c. What s a general function block. block? Implement 2 input EXOR gate using NMOS functional (06 Marks), " ... 7 a. Show the implementation of the following both in circuit diagram and in stick form : . i) NAND - NAND implementation of Y: ab + cd (only stick form) ::"'::' ,r,,t1l '" (04 Marks) Static CMOS AOI technology of Y : AB + CD . b., Wtrat is tally circuit? Construct stick diagram of 3 input pass transistor tallv;,irfnitioo ..: ii) rvru.L.y c. Explain the implementation of 4 to 1 multiplexer using CMOS transmig$ion gates.(06 Marks) (04 Marks) d. Explainglobal routing and local routing. 'll" '11' Explain 16$l.ltrelnrs hierarchy , regularity , modularity and logality'as applied to integrated circuit structuie,design. (10 Marks) :)j ., b. Write explanatory note on : i) Programmable logie structure ii) Gate anay stahdard cell design. (10 Marks) a. " ,' ,,:":i ::,,:,,a r;,,1 '"!, ,t't ,- :.,, ,:,: ,r:,1, ..,,""' .:: ,. .j :'':" '" ,,,,,,,',. ..:: 2 of2 "