3rd Semester M Tech CMOS VLSI Design (Dec-2013) Question Papers
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M.Tech. Degree Examination, Dec. 2013 I Jan 2014.
GMOS RF Gircuit Design
Time: 3 hrs.
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Note: Answer utaJr' FIYE full questions.
a. "'Wlren is a system considered linear? Discuss the effects of non - linearity w'ilh respect to
i) :eross modulation ii) Intermodulation.
b. De'fiie available power gain and hence drive FRISS equation for noise frgure. (07 Marks)
c. Det;it[ii"lr. the noise figure of the common source itug. shown with respect to source
impedance"'R,. Neglect the capacitances and flicker noise of Ml',ahd assume 11 is ideal.
GSM receiver requires a minimum SNR of 12dB and has a channel bandwidth of
200KIlz. A wireless LAN receiver on the other hand, specifies a minimum SNR of 23dB
and has a channel bandwidth of 20MHz. Compare the sensitivities of these two system if
both have an NF of 7dB.
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For the binary sequence 0111001101, obtain the differential encoding and decoding
sequence.. Draw the encodei and decoder circuits.
What is CDMA? Exphin direct sequence CDMA in detail,
Explain Weaver fuChitecture of image reject receiver. Also explain the problem of
secondary imag6ih weaver architecture.
Explain the_,,qroblem of image in heterodyne receiver.
Explain the operation of Bipolar LNA and derive an expression for aoise figure. (08 Marks)
Erplain the operation of passive and active CMOS mixers.
how input matching is achieved in LNA, considering any of the examples.
. (05 Marks)
,, fl*, Explai, i"y two basic LC oscillator topologies with necessary
""''b. Explain the effect of phase noise in RF
c. Explain injection pulling and load pulling of RF oscillators.
Explain the working of charge pump PLLS.
b. Explain the architecture of Integer - N synthesizer.
Mention the classification of Power Amplifiers. Explain any two tlpes with necessary
Explain feed back linearization technique used for power amplifiers.
Explain the noise models of BJT and MOSFET.
What is monolithic inductor? Explain loss mechanism in monolithic inductors and give
techniques to reduce the same.
M.Tech. Degree Examination, Dec.2013 / Jan.2O14
Automotive Electron ics
Time: 3 hrs.
Note: Answer any FIVE
List the major components of 4-storke/cycle, gasoline fueled SI engine. ::,,, (04 Marks)
With neat diagram, explain the four strokes of a typical modern Gasoline-Fueled SI engine.
Explain in detail the intake manifold and fuel
What is spark pulse generation? Explain primary current waveform.
What is ignition timing? With a neat sketch explain breaker point operation.
What are drive train? With schematic explain planelary gear system.
With a block diagram, explain typical engine control system and list the variable to be
measured associated in an engine control
What are mass Air flow rate (MAF) sensor? Write associated electronic signal conditioning
circuit and highlight the importanee of binary
With a neat diagram. explain strain gauge MAP sensor.
What is cruise control system? With aid of control block diagram explain cruise control;
Explain in detail ZTAzEGO sensor. Describe EGO mounling and structure and also describe
characteristics of FGO sensor.
With a neat sehematic of a solenoid, explain fuel injector.
Write a note ou idle speed control.
Explain in brief digital engine control system and illustrate with aid of lookeep table engine
crank and engine warmup modes and write the expression for mass of fuel to.be delivered to
With aid of control flow diagram explain EGR control.
Explain antilock braking system.
How do you measure crankshaft angular position? Explain magnetic reluctance crankshaft
What is hall effect? Explain hall effect position sensor.
Explain throttle angel sensor.
Write short notes on the following:
Sample and hold circuit.
ON-Board and Otf-Board automotive diagnostics.
Electronic HUAC svstems.
I Jan 2014.
Advances in VLSI Design
M.Tech. Degree Examination, Dec. 2013
Time: 3 hrs.
Note: Answer any FIVE
Draw the transfer plot of CMOS invefter. Discuss the elfect of aspect ratio on tlf
curve, with suitable mathematical analysis.
Derive the expression for the drain to source current in MESFET below pinch off. State the
Bring out the differences between BiCMOS and CMOS technology.
Explain the basic principles of modulation doping with the help of band diagrams and
explain the operation of HEMT device structure formed using GaAs and A0GaAs.(10 Marks)
Derive an expression for the pinch off voltage in a MF.SFET.
Ann-channel S^i JFET hasZ:2! lr , L:4pm,d:7.2pmand, Nu:10lecm-3,
Na : 5 * 10rs cm-3 and prn = 1200cm' / 1VS.1. Assume the gate voltage is -3V. Determine
i) the drain current at saturation ii) the drain voltage of saturation.
List the properties of ideal MIS system ooi., equilibrium.
Describe a typical Management Information System Structure. Also describe the energy
band diagram for an ideal n * type MIS structure biases in accumulation, depletion and
Describe the small signal model for a MOSFET. Also calculate the trans conductance of a
MOSFET. giventhat L = 5pm ,Z:5Op,m, VG:2V, V16,.rl,ora:0.98V, pr' : S0Ocm2/1VS;
Ci : I 15 nF/cm:.
A p - channel standard Si MOSFET is doped with Nd : 10rs cm-3. The MOSFET has an
oxide thickness of 8nm , ZIL :20, hole mobility : 450cr#l(VS) and Qr : 5 ,, 10rrq clcn].
Given nr = 10l0cm-t , K, :3.9, Ksi : i1.8 and O,nr: -0.312. Determine i1 the threshold
voltage of the device ii) the value of Vp, sat at V6 : -2Y iii.l the value of Vp, sat at V6
: -7V iv) the magnitude of the saturation current for V6 : -lV.
b. lxplain the sealing theory.
c' , E-xplain the two - dimensional potential profile for i) long channel MOSFET device and
ii) short - channel MOSFET device.
With the help of neat sketch, explain the construction and working of Carbon Nano tube
FET. what are the advantages and disadvantages?
Describe the defect tolerant computing.
Sketch the SOI and bulk MOSFET structures and show the differences between them.
What is the need for super buffers? Explain NMOS inverting and non - inverting super
buffers with the help of i) Schematic diagrams and ii) Stick diagrams for the same.
Construct 2 input NAND and NOR gates using NMOS pass transistor
c. What s a general function
block? Implement 2 input EXOR gate using NMOS functional
Show the implementation of the following both in circuit diagram and in stick form : .
NAND - NAND implementation of Y: ab + cd (only stick form)
Static CMOS AOI technology of Y : AB + CD .
b., Wtrat is tally circuit? Construct stick diagram of 3 input pass transistor tallv;,irfnitioo
c. Explain the implementation of 4 to 1 multiplexer using CMOS transmig$ion gates.(06 Marks)
d. Explainglobal routing and local routing.
Explain 16$l.ltrelnrs hierarchy , regularity , modularity and logality'as applied to integrated
b. Write explanatory note on :
i) Programmable logie structure ii) Gate anay stahdard cell design.