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A plate license recognition system is implemented in
Matlab and then it is implemented on FPGA Xilinx
Spartan-6 using Verilog
http://www.fpga4student.com/2016/11/p
late-license-recognition-
verilogmatlab.html
What is an FPGA? Why FPGA?
A complete 8-bit Microcontroller in VHDL
Verilog code for 32-bit unsigned Divider
Fix-point matrix multiplication in Verilog[Full code and
tutorials]
Verilog code for a Carry Look Ahead Multiplier
Verilog HDL implementation of a Micro-controller
(similar to MICROCHIP PIC12) (Part 1)
Verilog IMPLEMENTATION OF A MICROCONTROLLER
(SIMILAR TO MICROCHIP PIC12) (Part-2- Architecture
design)
Verilog code for a microcontroller (Part-3)
16-bit Processor CPU design and implementation in
LogiSim
Image processing on FPGA using Verilog HDL
Parameterized N-bit switch tail ring counter (VHDL
behavior and structural code with testbench)
Verilog code for 4x4 Multiplier using two-phase self-
clocking system
VHDL code for digital clock on FPGA
Verilog code for a parking system using Finite State
Machine (FSM)
Verilog code for Traffic light controller
Verilog code for Alarm clock on FPGA
VHDL code for the 8-bit Comparator
Matrix Multiplication Design using VHDL and Xilinx Core
Generator
Two ways to load a text file into FPGA or the initial
values to a memory in Verilog/ VHDL (synthesizable)
Plate License Recognition Verilog/Matlab
Implementation on FPGA Xilinx Spartan-6

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  • 1. A plate license recognition system is implemented in Matlab and then it is implemented on FPGA Xilinx Spartan-6 using Verilog http://www.fpga4student.com/2016/11/p late-license-recognition- verilogmatlab.html What is an FPGA? Why FPGA? A complete 8-bit Microcontroller in VHDL Verilog code for 32-bit unsigned Divider Fix-point matrix multiplication in Verilog[Full code and tutorials] Verilog code for a Carry Look Ahead Multiplier Verilog HDL implementation of a Micro-controller (similar to MICROCHIP PIC12) (Part 1) Verilog IMPLEMENTATION OF A MICROCONTROLLER (SIMILAR TO MICROCHIP PIC12) (Part-2- Architecture design) Verilog code for a microcontroller (Part-3) 16-bit Processor CPU design and implementation in LogiSim Image processing on FPGA using Verilog HDL
  • 2. Parameterized N-bit switch tail ring counter (VHDL behavior and structural code with testbench) Verilog code for 4x4 Multiplier using two-phase self- clocking system VHDL code for digital clock on FPGA Verilog code for a parking system using Finite State Machine (FSM) Verilog code for Traffic light controller Verilog code for Alarm clock on FPGA VHDL code for the 8-bit Comparator Matrix Multiplication Design using VHDL and Xilinx Core Generator Two ways to load a text file into FPGA or the initial values to a memory in Verilog/ VHDL (synthesizable) Plate License Recognition Verilog/Matlab Implementation on FPGA Xilinx Spartan-6