This document discusses chip design in LabVIEW using an FPGA. It describes using a Xilinx Spartan 3E FPGA with LabVIEW FPGA. It discusses implementing softcore processors like Picoblaze and Microblaze on the FPGA to create a system on chip. It also discusses using a Network-on-Chip (NoC) for multicore implementations and integrating IP cores. It envisions future work integrating Microblaze using CLIP and physical mapping tools in LabVIEW.

1. Chipdesign in LabVIEWVincent Claes (XIOS Hogeschool Limburg)

2. ContentsSystem On chip design withLabVIEWFPGAXilinx Spartan 3ELabVIEW FPGA for Spartan3ESystem On ChipSoftcoreMulticoreimplementationsNoC: Network-On-ChipVincent Claes

3. Logic BlockI/O BlockFPGAInterconnection ResourcesVincent Claes

4. FPGA Development toolsVHDL / VerilogSystemCXilinx System Generator (Matlab / Simulink)LabVIEWVincent Claes

5. Spartan 3E Starter KitXilinx status: “Sold Out”Vincent Claes

6. Spartan 3E XC3S500EVincent Claes

7. LabVIEW FPGA for Spartan3EIP GeneratorWizard to generateLabVIEW FPGA codeCLIPImplement VHDL code in LabVIEW FPGAIntegrate IP fromopencores.org,… Vincent Claes

8. System On ChipAll ourintellegence in one chipSoftcore processorsPicoblaze (8-bit)Microblaze (32-bit)  programmable in LabVIEW Microprocessor SDK?IP (UART controller, VGA controller, JPEG2000,…)Vincent Claes

9. SoC: SoftcoreimplementationXilinx picoblaze 8-bit processorVincent Claes

10. SoCMulticoreimplementationPicoblaze 2Picoblaze 1LabVIEW FPGACodeI / OI /OPicoblazeprogrammed in assemblerImportedby CLIP NodeIP SoftcoresNetwork-On-ChipVincent Claes

11. NoCimplementationLabVIEW FPGACodePicoblaze 2Picoblaze 1I /ONoCRouterI / ONoCRouterPicoblazeprogrammed in assemblerImportedby CLIP NodeIP SoftcoresNetwork-On-Chip (createdLabVIEW code from IMEC NoCrouter model)Vincent Claes

12. FutureWe want LabVIEW to support all Xilinx FPGA’s (alsonot NI boards)!LabVIEW Microprocessor SDK targettingMicroblazeSoftcoreon Spartan3E FPGAMicroblazeintegratedusing CLIP nodeNI LabsTool forPhysicalmapping (layout) to FPGAUse DSP slices in some Xilinx FPGA’sVincent Claes

13. About XIOS Hogeschool LimburgXIOS Hogeschool Limburg is thefirstLabVIEWacademy in beneluxFPDA – 1 Research projectFPDA – 2 Research projecthttp://pwo.fpga.behttp://www.xios.beVincent Claes