This document compares the design and analysis of a current starved voltage controlled oscillator (CSVCO) and differential pair voltage controlled oscillator (DAVCO) for low power phase locked loop applications using 180nm CMOS technology. Both circuits were designed and simulated using SPICE simulation software. The CSVCO operates from 0.5V to 1V control voltage and has an average power dissipation of 42 microwatts, while the DAVCO operates from 0.5V to 1.3V control voltage and has an average power dissipation of 1.42 milliwatts. The DAVCO has a higher frequency gain and tuning range but higher power consumption compared to the CSVCO, making the CSVCO more suitable for low power applications
A High-Swing OTA with wide Linearity for design of self-tunable linear resistorVLSICS Design
Low power consumption, long battery life and portability are essential requirements of modern health monitoring products. Operational Transconductance Amplifier (OTA) operating in subthreshold region is an basic building block for low power health monitoring products design. An modified design of OTA which incorporates better linearity and increased output impedance has been discussed in this paper. The proposed OTA uses High-swing improved-Wilson current mirror for low power and low-frequency applications. The achieved linearity is about ± 1.9 volt and unity gain bandwidth (UGB) of 342.30 KHz at power supply of 0.9 volt which makes OTA to consume power in range of nanowatts. The proposed low voltage OTA implementation in design of self- tunable linear resistor has been presented in this paper. The circuit implementation has been done using standard 0.18 micron technology provided by TSMC on BSIM 3v3 level-53 model parameter and verified results through use of ELDO Simulator.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Improved Grid Synchronization Algorithm for DG System using DSRF PLL under Gr...IJERA Editor
Distributed Generation (DG) System is a small scale electric power generation at or near the user’s facility as
opposed to the normal mode of centralized power generation. In order to ensure safe and reliable operation of
power system based on DS, grid synchronization algorithm plays a very important role. This paper presents a
Double Synchronous Reference Frame (DSRF) phase locked loop (PLL) based on synthesis circuit for grid
synchronization of distributed generation (DG) system under grid disturbances aimed to provide an estimation
of the angular frequency and both the positive and negative sequences of the fundamental component of an
unbalanced three-phase signal. The design of this PLL is based on a complete description of the source voltage
involving both positive and negative sequences in stationary coordinates and considering the angular frequency
as an uncertain parameter.
Designed a microwave amplifier circuit with a required bandwidth of 250MHz at a center frequency of 3.7GHz experiencing 6.5dB gain within Keysight ADS.
A High-Swing OTA with wide Linearity for design of self-tunable linear resistorVLSICS Design
Low power consumption, long battery life and portability are essential requirements of modern health monitoring products. Operational Transconductance Amplifier (OTA) operating in subthreshold region is an basic building block for low power health monitoring products design. An modified design of OTA which incorporates better linearity and increased output impedance has been discussed in this paper. The proposed OTA uses High-swing improved-Wilson current mirror for low power and low-frequency applications. The achieved linearity is about ± 1.9 volt and unity gain bandwidth (UGB) of 342.30 KHz at power supply of 0.9 volt which makes OTA to consume power in range of nanowatts. The proposed low voltage OTA implementation in design of self- tunable linear resistor has been presented in this paper. The circuit implementation has been done using standard 0.18 micron technology provided by TSMC on BSIM 3v3 level-53 model parameter and verified results through use of ELDO Simulator.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Improved Grid Synchronization Algorithm for DG System using DSRF PLL under Gr...IJERA Editor
Distributed Generation (DG) System is a small scale electric power generation at or near the user’s facility as
opposed to the normal mode of centralized power generation. In order to ensure safe and reliable operation of
power system based on DS, grid synchronization algorithm plays a very important role. This paper presents a
Double Synchronous Reference Frame (DSRF) phase locked loop (PLL) based on synthesis circuit for grid
synchronization of distributed generation (DG) system under grid disturbances aimed to provide an estimation
of the angular frequency and both the positive and negative sequences of the fundamental component of an
unbalanced three-phase signal. The design of this PLL is based on a complete description of the source voltage
involving both positive and negative sequences in stationary coordinates and considering the angular frequency
as an uncertain parameter.
Designed a microwave amplifier circuit with a required bandwidth of 250MHz at a center frequency of 3.7GHz experiencing 6.5dB gain within Keysight ADS.
Improved Power Gating Technique for Leakage Power Reductioninventy
Research Inventy : International Journal of Engineering and Science is published by the group of young academic and industrial researchers with 12 Issues per year. It is an online as well as print version open access journal that provides rapid publication (monthly) of articles in all areas of the subject such as: civil, mechanical, chemical, electronic and computer engineering as well as production and information technology. The Journal welcomes the submission of manuscripts that meet the general criteria of significance and scientific excellence. Papers will be published by rapid process within 20 days after acceptance and peer review process takes only 7 days. All articles published in Research Inventy will be peer-reviewed.
Power reduction techniques are important for the modern VLSI designs. Power is the today's major concern when we come to optimal trade off between area, performance and power.
I DDQ Testing of Low Voltage CMOS Operational Transconductance Amplifier IJECEIAES
The paper describes the design for testability (DFT) of low voltage two stage operational transconductance amplifiers based on quiescent power supply current (I DDQ ) testing. I testing refers to the integral circuit testing method based upon measurement of steady state power supply current for testing both digital as well as analog VLSI circuit. A built in current sensor, which introduces insignificant performance degradation of the circuit-under-test, has been proposed to monitor the power supply quiescent current changes in the circuit under test. Moreover, the BICS requires neither an external voltage reference nor a current source and able to detect, identify and localize the circuit faults. Hence the BICS requires less area and is more efficient than the conventional current sensors. The testability has also been enhanced in the testing procedure using a simple fault-injection technique. Both bridging and open faults have been analyzed in proposed work by using nwell 0.18µm CMOS technology. DDQ
An Improved DTFC based Five Levels - NPC Inverter Fed Induction Motor for Tor...IJPEDS-IAES
This paper presents a five level Neutral Point Clamped (NPC) inverter fed
IM (Induction Motor) drive for variable speed application. In general the
stator current is very highly affected by the harmonic components. It can be
affecting the torque to produce high torque ripple in IM at maximum to low
speed region. Since the drive performances are depends on mathematical
model contains the parameters variations, noise, common mode voltage, flux
variation and harmonic levels of the machine. Torque ripples and voltage
saturations are the most significant problems in drive application. To
overcome this problem the DTFC (direct torque and flux control) technique
based five-level neutral-point-clamped (NPC-5L) approach is used. The
proposed control scheme uses to stator current error as variable. Through the
resistance estimated PI controller rules based the selection of voltage space
vector modulation technique is optimized and motor performance level has
been improved. The torque & speed are successfully controlled with less
torque response. The results are compared and verified with conventional
three phases VSI under different control technique by Matlab/Simulink.
A high speed low power consumption d flip flop for high speed phase frequency...IAEME Publication
Phase Frequency Detector (PFD) and Frequency divider are indispensable modules of PLL,
which uses D flip-flop as an integral part. This paper focus on design of High-Speed, Low Power
Consumption D Flip-Flop for High Speed Phase Frequency Detector and Frequency divider. The
designed Frequency divider has been used in the divider counter of the phase locked loop. A divide
counter is required in the feedback loop to scales down the frequency of the VCO output signal. The
conventional and proposed D-Flip flop has been designed in UMC 180nm CMOS Technology with
supply voltage 1.8 using CADENCE spectre tool. Virtuoso Analog Design Environment tool of
Cadence have used to design and simulate schematic. This work has been used in the design of 2.4
GHz CMOS PLL targeting Frequency Multiplier application. The proposed D flip flop circuit is
faster than the conventional circuit as it has fast reset operation. The circuit consumes less power as
it prevents short circuit power consumption.
VLSI power estimation is vital component of the modern electronic designs. Rapid changes in the advanced electronic infrastructure may causes the power to become paramount important in the VLSI designs.
Fault analysis on three phase system by auto reclosing mechanismeSAT Journals
Abstract In any electrical system, due to overvoltage or over current line--ground fault, line to line fault, line-line-line fault and line-line-line-ground faults occur. The electrical substation is supply the power to the consumers means industries or domestic can have failures due to any of the fault which can be temporary or permanent. These faults lead to damage to the power system equipment. In this work, effort has made to design an reclosing mechanism in case of permanent or temporary fault. The TimerIc-555 has been used to give the time duration of fault. Circuit breaker is used for disconnecting the line at fault instant and connecting on clearance of fault. Reclosing mechanism resets the supply line after small interruption in the event of temporary fault or it remains in tripped condition in case of permanent fault. Keywords: Fault Analysis, Timer 555, Auto Reclosing Mechanism
Low Power VLSI design architecture for EDA (Electronic Design Automation) and Modern Power Estimation, Reduction and Fixing technologies including clock gating and power gating
Improved Power Gating Technique for Leakage Power Reductioninventy
Research Inventy : International Journal of Engineering and Science is published by the group of young academic and industrial researchers with 12 Issues per year. It is an online as well as print version open access journal that provides rapid publication (monthly) of articles in all areas of the subject such as: civil, mechanical, chemical, electronic and computer engineering as well as production and information technology. The Journal welcomes the submission of manuscripts that meet the general criteria of significance and scientific excellence. Papers will be published by rapid process within 20 days after acceptance and peer review process takes only 7 days. All articles published in Research Inventy will be peer-reviewed.
Power reduction techniques are important for the modern VLSI designs. Power is the today's major concern when we come to optimal trade off between area, performance and power.
I DDQ Testing of Low Voltage CMOS Operational Transconductance Amplifier IJECEIAES
The paper describes the design for testability (DFT) of low voltage two stage operational transconductance amplifiers based on quiescent power supply current (I DDQ ) testing. I testing refers to the integral circuit testing method based upon measurement of steady state power supply current for testing both digital as well as analog VLSI circuit. A built in current sensor, which introduces insignificant performance degradation of the circuit-under-test, has been proposed to monitor the power supply quiescent current changes in the circuit under test. Moreover, the BICS requires neither an external voltage reference nor a current source and able to detect, identify and localize the circuit faults. Hence the BICS requires less area and is more efficient than the conventional current sensors. The testability has also been enhanced in the testing procedure using a simple fault-injection technique. Both bridging and open faults have been analyzed in proposed work by using nwell 0.18µm CMOS technology. DDQ
An Improved DTFC based Five Levels - NPC Inverter Fed Induction Motor for Tor...IJPEDS-IAES
This paper presents a five level Neutral Point Clamped (NPC) inverter fed
IM (Induction Motor) drive for variable speed application. In general the
stator current is very highly affected by the harmonic components. It can be
affecting the torque to produce high torque ripple in IM at maximum to low
speed region. Since the drive performances are depends on mathematical
model contains the parameters variations, noise, common mode voltage, flux
variation and harmonic levels of the machine. Torque ripples and voltage
saturations are the most significant problems in drive application. To
overcome this problem the DTFC (direct torque and flux control) technique
based five-level neutral-point-clamped (NPC-5L) approach is used. The
proposed control scheme uses to stator current error as variable. Through the
resistance estimated PI controller rules based the selection of voltage space
vector modulation technique is optimized and motor performance level has
been improved. The torque & speed are successfully controlled with less
torque response. The results are compared and verified with conventional
three phases VSI under different control technique by Matlab/Simulink.
A high speed low power consumption d flip flop for high speed phase frequency...IAEME Publication
Phase Frequency Detector (PFD) and Frequency divider are indispensable modules of PLL,
which uses D flip-flop as an integral part. This paper focus on design of High-Speed, Low Power
Consumption D Flip-Flop for High Speed Phase Frequency Detector and Frequency divider. The
designed Frequency divider has been used in the divider counter of the phase locked loop. A divide
counter is required in the feedback loop to scales down the frequency of the VCO output signal. The
conventional and proposed D-Flip flop has been designed in UMC 180nm CMOS Technology with
supply voltage 1.8 using CADENCE spectre tool. Virtuoso Analog Design Environment tool of
Cadence have used to design and simulate schematic. This work has been used in the design of 2.4
GHz CMOS PLL targeting Frequency Multiplier application. The proposed D flip flop circuit is
faster than the conventional circuit as it has fast reset operation. The circuit consumes less power as
it prevents short circuit power consumption.
VLSI power estimation is vital component of the modern electronic designs. Rapid changes in the advanced electronic infrastructure may causes the power to become paramount important in the VLSI designs.
Fault analysis on three phase system by auto reclosing mechanismeSAT Journals
Abstract In any electrical system, due to overvoltage or over current line--ground fault, line to line fault, line-line-line fault and line-line-line-ground faults occur. The electrical substation is supply the power to the consumers means industries or domestic can have failures due to any of the fault which can be temporary or permanent. These faults lead to damage to the power system equipment. In this work, effort has made to design an reclosing mechanism in case of permanent or temporary fault. The TimerIc-555 has been used to give the time duration of fault. Circuit breaker is used for disconnecting the line at fault instant and connecting on clearance of fault. Reclosing mechanism resets the supply line after small interruption in the event of temporary fault or it remains in tripped condition in case of permanent fault. Keywords: Fault Analysis, Timer 555, Auto Reclosing Mechanism
Low Power VLSI design architecture for EDA (Electronic Design Automation) and Modern Power Estimation, Reduction and Fixing technologies including clock gating and power gating
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Study and implementation of comparator in cmos 50 nm technologyeSAT Journals
Abstract This paper describes the comparator circuits used in FLASH Analog to digital converter (ADC). The performance of FLASH ADC is greatly influenced by the choice of comparator. In this paper, first a single ended “Threshold Inverter Quantizer” (TIQ) is presented. The TIQ comparator is based on a CMOS inverter cell, in which voltage transfer characteristics (VTC) are changed by systematic transistor sizing. However, TIQ comparator is very sensitive to power supply noise. Another comparator circuit presented in this paper is “Two stage open loop comparator”. It is implemented in 50 nm CMOS Technology. Pre-simulation of comparator is done in LT-Spice and post layout simulation is done in Microwind 3.1. Keywords: CMOS, Comparator, TIQ (Threshold Inverter Quantizer), LT-Spice.
A Soft Switched Dual Buck Inverter with Series Connected Diodes and Single In...paperpublications3
Abstract: In an inversion system, high reliability is one of the main targets pursuing. Some problems will threaten the reliability of the system, such as, the shoot through issue and the failure of reverse recovery. The dual buck inverters can solve the above problems without adding dead time. A new topology of dual buck inverter with series connected diodes and a single inductor is presented here. The system retains the advantage of no reverse recovery of body diode. The inverter has just one filter inductor, which can make the volume and weight of the system decreased observably and improve the integration. By providing soft switching techniques the power loss can be well reduced. A resonant circuit contributes to reduced switching loss by providing ZVS property. The whole system is simulated in PSIM environment. This inverter retains the advantage of high reliability. A PIC microcontroller is used to generate control pulses since it is fast and easy to implement program when we compare with other microcontrollers. The ease of programming and interfacing with other peripherals make PIC a successful microcontroller. A two level inverter output can be well verified at the output of the dual buck inverter without any reverse recovery loss.
Keywords: Body diode, PSIM, Reverse recovery, Soft Switching, SPWM, ZCS, ZVS.
Title: A Soft Switched Dual Buck Inverter with Series Connected Diodes and Single Inductor
Author: Alaka K, Prof. Jeena Joy, Prof. Kavitha Issac
ISSN 2349-7815
International Journal of Recent Research in Electrical and Electronics Engineering (IJRREEE)
Paper Publications
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Similar to IRJET- Design and Analysis of Current Starved and Differential Pair VCO for Low Power PLL Application (20)
Courier management system project report.pdfKamal Acharya
It is now-a-days very important for the people to send or receive articles like imported furniture, electronic items, gifts, business goods and the like. People depend vastly on different transport systems which mostly use the manual way of receiving and delivering the articles. There is no way to track the articles till they are received and there is no way to let the customer know what happened in transit, once he booked some articles. In such a situation, we need a system which completely computerizes the cargo activities including time to time tracking of the articles sent. This need is fulfilled by Courier Management System software which is online software for the cargo management people that enables them to receive the goods from a source and send them to a required destination and track their status from time to time.
Immunizing Image Classifiers Against Localized Adversary Attacksgerogepatton
This paper addresses the vulnerability of deep learning models, particularly convolutional neural networks
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introduce a novel volumization algorithm, which transforms 2D images into 3D volumetric representations.
When combined with 3D convolution and deep curriculum learning optimization (CLO), itsignificantly improves
the immunity of models against localized universal attacks by up to 40%. We evaluate our proposed approach
using contemporary CNN architectures and the modified Canadian Institute for Advanced Research (CIFAR-10
and CIFAR-100) and ImageNet Large Scale Visual Recognition Challenge (ILSVRC12) datasets, showcasing
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Quality defects in TMT Bars, Possible causes and Potential Solutions.PrashantGoswami42
Maintaining high-quality standards in the production of TMT bars is crucial for ensuring structural integrity in construction. Addressing common defects through careful monitoring, standardized processes, and advanced technology can significantly improve the quality of TMT bars. Continuous training and adherence to quality control measures will also play a pivotal role in minimizing these defects.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
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Vaccine management system project report documentation..pdfKamal Acharya
The Division of Vaccine and Immunization is facing increasing difficulty monitoring vaccines and other commodities distribution once they have been distributed from the national stores. With the introduction of new vaccines, more challenges have been anticipated with this additions posing serious threat to the already over strained vaccine supply chain system in Kenya.
NO1 Uk best vashikaran specialist in delhi vashikaran baba near me online vas...Amil Baba Dawood bangali
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Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
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My project named “Event Management System” is software that store and maintained all events coordinated in college. It also helpful to print related reports. My project will help to record the events coordinated by faculties with their Name, Event subject, date & details in an efficient & effective ways.
In my system we have to make a system by which a user can record all events coordinated by a particular faculty. In our proposed system some more featured are added which differs it from the existing system such as security.
About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.