1. The document discusses memory management and the memory hierarchy in computer systems. It describes the different levels of memory including CPU registers, main memory, cache memory, and auxiliary memory. 2. Cache memory is used to reduce the average time required to access memory by taking advantage of spatial and temporal locality. There are three common cache mapping techniques - direct mapping, associative mapping, and set-associative mapping. 3. Virtual memory allows programs to behave as if they have a large, single memory space even if physical memory is smaller. It uses a memory management unit to translate virtual addresses to physical addresses through a page table.

1. Introduction to
Memory Management

2. Content
Introduction
• Memory
• Memory Hierarchy
• Memory Management System
Main Memory
 Auxiliary Memory
 Associative Memory
Cache Memory
• Characteristic of Cache Memory
• Associative Mapping
• Direct Mapping
• Set- Associative Mapping
Virtual Memory

3. Memory
• Memory unit is an essential component in digital computers
since it is needed for storing programs and data.
• The memory that communicates directly with CPU is called
main memory.
• Devices that provides backup storage are called auxiliary
memory.
• Only program and data currently needed by the processor
resides in main memory.
• All other information is stored in auxiliary memory and
transferred to main memory when needed

4. Memory Hierarchy

5. CPU Registers
• These high speed registers in the CPU work as memory for
temporary storage of instruction and data.
• The data can be read from or written into a register within a
single clock cycle.
Main Memory or Primary Memory
• Main memory size is large and fast accessing external memory
stores programs and data.
• This memory is slower compared to CPU registers because of
main memory has large storage capacity is typically 1 and
• 2¹⁰ megabyte.

6. Cache Memory
• It is employed in computer system to compensate for the
speed differential between main memory access time and
processor logic.
• The cache is used for storing segments of programs
currently being executed in the CPU and temporary data
frequently needed in the present calculations.
• By making program and data available at a rapid rate, it is
possible to increase the performance rate of the computer

7. Secondary Memory
• This memory has larger in capacity but slower than main
memory.
• Secondary memory stores system programs, large data files
and like the data are not continually required by the CPU.
• It also acts as an overflow memory when the capacity of the
main memory is exceeded.
• Information in secondary storage is accessed indirectly via
input output processor that transfer information between
main and secondary memory.

8. Main Memory
• The principal technology used for main memory is based on
semiconductor integrated circuit.
• The Integrated circuit chips are available in two possible operating
modes:
1. Static
2. Dynamic
• The Static RAM consists essentially of internal flip-flop that store the
binary information.
• The dynamic RAM stores the binary information in form of
electronic charges that are applied to capacitors.
• The stored charge on the capacitor tend to discharge with time and
the capacitors must be periodically recharged by refreshing the
dynamic memory.
• The static RAM is easier to use and has shorter read and write cycles
and used in cache.
• The dynamic RAMs are used for implementing the main memory.

9. Main Memory

10. 2. Internal Memory(Main Memory)
RAM and ROM Chips
Typical RAM chip
Typical ROM chip
Chip select 1
Chip select 2
Read
Write
7-bit address
CS1
CS2
RD
WR
AD 7
128 x 8
RAM
8-bit data bus
CS1 CS2 RD WR
0 0 x x
0 1 x x
1 0 0 0
1 0 0 1
1 0 1 x
1 1 x x
Memory function
Inhibit
Inhibit
Inhibit
Write
Read
Inhibit
State of data bus
High-impedence
High-impedence
High-impedence
Input data to RAM
Output data from RAM
High-impedence
Chip select 1
Chip select 2
9-bit address
CS1
CS2
AD 9
512 x 8
ROM
8-bit data bus

11. Auxiliary Memory
• The Most common auxiliary memory devices used in
computer system are magnetic disk and tapes.
• Other components used, but not as frequently, are magnetic
drums, magnetic bubble memory, and optical disks.
• The average time required to reach a storage location in
memory and obtain its contents is called the access time.
• In electromechanical devices with moving parts such as disks
an tapes, the access time consists of seek time required to
position the read-write head to a location and a transfer time
required to transfer data to or from the devices.

12. Direct Mapping
• In Direct mapping, every time a miss occurs, an entire block of
words must be transferred from main memory to cache
memory.
• Another disadvantage of direct mapping is that two words
with the same index in their address but with different tag
values cannot reside in cache memory at same time.
• A third type of cache organization, called set-associative
mapping, in which each word of cache can store two or more
words of memory under the same index address.
• Each data word is stored together with its tag and the number
of tag-data items in one word of cache is said to from a set.

13. Virtual Memory
• In a memory hierarchy system, program and data are first stored in
auxiliary memory.
• Portion of a program or data are brought into main memory as they
are needed by the CPU.
• Virtual Memory is a concept used in some large computer systems
that permit the user to construct programs as though a large
memory space were available, equal to the totality of auxiliary
memory.
• A virtual memory system provides a mechanism for translating
program-generated addresses into correct main memory locations.
• An address used by a programmer will be called a virtual address,
and set of such addresses the address space.
• An address in main memory is called a location or physical address
and the set of such addresses is called memory space

14. Virtual Memory

15. Address Translation Scheme
• Address generated by CPU is divided into:
• Page number (p) – used as an index into a page table which
contains base address of each page in physical memory.
• Page offset (d) – combined with base address to define the
physical memory address that is sent to the memory unit

16. Address Translation
Architecture

17. Virtual MemoryAddressing
Give the programmer the illusion that the system has a very large memory, even though
the computer actually has a relatively small main memory.
Address Space(Logical) and Memory Space(Physical)
Address Mapping
Memory Mapping Table for Virtual Address -> Physical Address
virtual address
(logical address) physical address
address space memory space
address generated by programs actual main memory address
Mapping
Virtual address
Virtual
address
register
Memory
mapping
table
Memory table
buffer register
Main memory
address
register
Main
memory
Main memory
buffer register
Physical
Address

18. Paging Example

19. Address Mapping
Organization of memory Mapping Table in a paged system
Address Space and Memory Space are each divided into fixed size group of words
called blocks or pages.
1K words group
Page 0
Page 1
Page 2
Page 3
Page 4
Page 5
Page 6
Page 7
Block 3
Block 2
Block 1
Block 0Address space
N = 8K = 213
Memory space
M = 4K = 212
0000
1001
1010
0011
0100
1101
1110
0111
1
Block 0
Block 1
Block 2
Block 3
MBR
0 1 0 1 0 1 0 1 0 0 1 1
1 0 1 0 1 0 1 0 1 0 0 1 1
Table
address
Presence
bit
Page no. Line number
Virtual address
Main memory
address register
Memory page table
Main memory
11
00
01
10
01

20. • Page table is kept in main memory.
• Page-table base register (PTBR) points to the page table.
• Page-table length register (PRLR) indicates size of the page
table.
• In this scheme every data/instruction access requires two
memory accesses. One for the page table and one for the
data/instruction.
• The two memory access problem can be solved by the use of a
special fast-lookup hardware cache called associative memory
or translation look-aside buffers (TLBs)
Implementation of Page Table

21. Page Replacement Strategies
• The Principle of Optimality
• Replace the page that will not be used again the farthest time
into the future.
• Random Page Replacement
• Choose a page randomly
• FIFO - First in First Out
• Replace the page that has been in memory the longest.
• LRU - Least Recently Used
• Replace the page that has not been used for the longest time.
• LFU - Least Frequently Used
• Replace the page that is used least often.
• NUR - Not Used Recently
• An approximation to LRU
• Working Set
• Keep in memory those pages that the process is actively using

22. Associative Memory
• An assembler program searches the symbol address table in
order to extract the symbol’s binary equivalent.
• The number of accesses to memory depends on the location
of the item and the efficiency of search algorithm.
• Many search algorithm have been developed to minimize the
number of access while searching for an item in a random or
sequential access memory.
• The time required to find an item stored in memory can be
reduced considerably if stored data can be identified by the
content of the data itself rather than an address.
• A memory unit accessed by content is called an associative
memory or content addressable memory(CAM).

23. Associative Memory

24. Organizationof CAM
Internal organization of a typical cell Cij
C11Word 1
Word i
Word m
Bit 1 Bit j Bit n
M1
Mi
Mm
Aj
R S
Output
Match
logic
Input
Write
Read
Kj
MiToF ij
A1
Aj An
K1
Kj Kn
C1j C1n
Ci1 Cij Cin
Cm1 Cmj Cmn

25. Cache Memory
• A typical computer program flows in a straight-line fashion
with program loops and subroutine calls encountered
frequently.
• Analysis of a large number of typical programs has been
shown that the reference to memory at any given interval of
time tend to be confined within a few localized areas in
memory. This phenomenon is known as the property of
locality of reference.
• If the active portions of the program and data are placed in a
fast small memory, the average memory access time can be
reduced, thus reducing the total execution time of program.
Such memory is known as Cache memory.

26. CacheMemory
Locality of Reference
- The references to memory at any given time interval tend to be confined within a
localized areas.
- This area contains a set of information and the membership changes gradually as
time goes by.
- Temporal Locality
The information which will be used in near future is likely to be in use
already( e.g. Reuse of information in loops).
- Spatial Locality
If a word is accessed, adjacent(near) words are likely accessed soon
(e.g. Related data items (arrays) are usually stored together;
instructions are executed sequentially).
Cache
- The property of Locality of Reference makes the Cache memory systems work
- Cache is a fast small capacity memory that should hold those information
which are most likely to be accessed.
Main memory
Cache memory
CPU

27. Characteristics of Cache Memory
• The basic characteristic of cache memory is its fast access
time.
• The transformation of data from main memory to cache
memory is referred to as a mapping process.
• Three types of mapping procedures are:
1. Associative Mapping
2. Direct Mapping
3. Set-associative Mapping

28. Associative Mapping
• The fastest and most flexible cache organization uses an
associative memory.
• The associative memory stores both the address and content
(data) of the memory word.
• If the address is found corresponding data is read otherwise
main memory is accessed for the word.
• It is expensive compared to random-access memories because
of the added logic associated with each cell.

29. Direct Mapping
• The n-bit memory address is divided into two Fields: k-bits for the
index field and n-k bits for the tag field.
• The direct mapping cache organization uses the n-bit address to
access the main memory and the k-bit index to access the cache.
• Each word in cache consists of the data word and its associated tag.
• When a new word is first brought into the cache, the tag bits are
stored alongside the data bits.
• When the CPU generates a memory request, the index field is used
for the address to access the cache.
• The tag field of the CPU address is compared with the tag in the
word read from cache.
• If the two tags match, there is a hit and the required word is read
from cache otherwise it is read from main memory.

30. MemoryAndCacheMapping–SetAssociativeMapping
Set Associative Mapping Cache with set size of two
- Each memory block has a set of locations in the Cache to load
Index Tag Data
000 0 1 3 4 5 0 0 2 5 6 7 0
Tag Data
777 0 2 6 7 1 0 0 0 2 3 4 0
Operation
- CPU generates a memory address(TAG; INDEX)
- Access Cache with INDEX, (Cache word = (tag 0, data 0); (tag 1, data 1))
- Compare TAG and tag 0 and then tag 1
- If tag i = TAG -> Hit, CPU <- data i
- If tag i  TAG -> Miss,
Replace either (tag 0, data 0) or (tag 1, data 1),
Assume (tag 0, data 0) is selected for replacement,
(Why (tag 0, data 0) instead of (tag 1, data 1) ?)
M[tag 0, INDEX] <- Cache[INDEX](data 0)
Cache[INDEX](tag 0, data 0) <- (TAG, M[TAG,INDEX]),
CPU <- Cache[INDEX](data 0)