SlideShare a Scribd company logo
Memory
A memory is just like a human brain. It is used to store data and
instructions. Computer memory is the storage space in computer where
data is to be processed and instructions required for processing are stored.
The memory is divided into large number of small parts called cells. Each
location or cell has a unique address which varies from zero to memory size
minus one. For example if computer has 64k words, then this memory unit
has 64 * 1024=65536 memory locations. The address of these locations
varies from 0 to 65535.
Memory is primarily of three types
 Cache Memory
 Primary Memory/Main Memory
 Secondary Memory
Cache Memory
Cache memory is a very high speed semiconductor memory which can
speed up CPU. It acts as a buffer between the CPU and main memory. It is
used to hold those parts of data and program which are most frequently
used by CPU. The parts of data and programs are transferred from disk to
cache memory by operating system, from where CPU can access them.
SecondaryMemory
This type of memory is also known as external memory or non-volatile. It is
slower than main memory. These are used for storing data/Information
permanently. CPU directly does not access these memories instead they are
accessed via input-output routines. Contents of secondary memories are
first transferred to main memory, and then CPU can access it. For example
: disk, CD-ROM, DVD etc.
Primary Memory (Main Memory)
As human beings have a memory system to remember even a tiny thing which went
through in one’s life, similarly computer systems do contain a memory system which
can store data and can be retrieved when desired. Why not after all it’s been designed
and created by intellectual humans only. Every computer system contains two kinds of
memory out of which one is primary and the other is secondarymemory. Basically a
computer memory can store particularly two things. They are the data and the set of
instructions to execute a program.
Now let us take a brief look towards the types of primary storage (or) primary memory.
This primary memory can be directly accessed by the processing unit. The contents in
the primary memory are temporary. While performing a task if there is any power cut
problems then we may lose the data which is in primary memory. One benefit is that we
can store and retrieve the data with a considerable speed. Primary memory is more
expensive when compared to secondary memory.
RAM (Random Access Memory) could be the best example of primary memory. The
primary memory in the computer system is in the form of Integrated Circuits. These
circuits are nothing but RAM. Each of RAM’s locations can store one byte [1 Byte = 8
bits] of information. This can be in either of the forms 1 or 0. The primary storage
section is made up of several small storage locations in the integrated circuits called
cells. Every single cell can store fixed number of bits called word length. Each cell
contains a unique number assigned to it and it has the unique address; these addresses
are used to identify the cells. The address starts at level 0 and goes up to (N-1).
Typesof primary ORMain memory:
RAM [RANDOM ACCESS MEMORY]
RAM is the best example of primary storage. We have very good reason to justify because in this
kind of memory we can select randomly, use that at any location of the memory, then store and
finally retrieve processed data which is information. RAM is a volatile memory because it loses
its contents when there is a power failure in the computer system. The memories which lose their
contents on power failure are called volatile memories.
Static RAM (SRAM)
The word static indicates that the memory retains its contents as long as
power is being supplied. However, data is lost when the power gets down
due to volatile nature. SRAM chips use a matrix of 6-transistors and no
capacitors. Transistors do not require power to prevent leakage, so SRAM
need not have to be refreshed on a regular basis.
Because of the extra space in the matrix, SRAM uses more chips than DRAM
for the same amount of storage space, thus making the manufacturing
costs higher. So SRAM is used as cache memory and has very fast access.
Dynamic RAM (DRAM)
DRAM, unlike SRAM, must be continually refreshed in order to maintain
the data. This is done by placing the memory on a refresh circuit that
rewrites the data several hundred times per second. DRAM is used for most
system memory because it is cheap and small. All DRAMs are made up of
memory cells which are composed of one capacitor and one transistor.
ROM [READ ONLY MEMORY]:
ROM is also formed by Integrated Circuits. The data which is stored in ROM is permanent. The
ROM can only read the data by CPU but can’t be edited or manipulated.ROM is a non-volatile
memory because it will not lose its contents when there is a power failure in the computer
system. The basic I/O program is stored in the ROM and it examines and initializes various
devices attached to the computer when the power is ON. The contents in the ROM can neither be
changed nor deleted.
PROM [PROGRAMMABLE READ ONLY MEMORY]:
As we know that we cannot edit (or) modify data in the ROM. To overcome this problem to
some extent PROM is very helpful that is in PROM we can store our programs in PROM chip.
Once the programs are written it cannot be changed and remain intact even if the power is
switched off. Therefore programs written in PROM cannot be erased or edited.
MROM (Masked ROM)
The very first ROMs were hard-wired devices that contained a pre-
programmed set of data or instructions. These kind of ROMs are known as
masked ROMs which are inexpensive.
EPROM [ERASABLE PROGRAMMABLE READ ONLY MEMORY]:
EPROM will overcome the problem of PROM. EPROM chip can be programmed time and again
by erasing the information stored earlier in it. EPROM chip has to be exposed to sunlight for
some time so that ultra violet rays fall on the chip and that erases the data on the chip and the
chip can be re-programmed using a special programming facility. There is another type memory
called EEPROM that stands for Electrically Erasable Programmable Read Only Memory in
which we can erase the data and re-program it with a fresh content.
REGISTERS:
Actually computer system uses a number of memory units called registers. Registers store data
or information temporarily and pass it on as directed by the control unit.
FLASH MEMORY:
It is a non-volatile computer memory that can be electrically erased and reprogrammed.
Examples are memory cards, chips, pen drives, and USBflash drives etc. flash memory costs
very less than byte-programmable EEPROM. It is very portable in nature.
Memory hierarchy:
In computer architecture the memory hierarchy is a concept used to discuss performance
issues in computer architectural design, algorithm predictions, and lower
level programming constructs involving locality of reference. The memory hierarchy
in computer storage separates each of its levels based on response time. Since response time,
complexity, and capacity are related,[1] the levels may also be distinguished by their
performance and controlling technologies.
Designing for high performance requires considering the restrictions of the memory hierarchy,
i.e. the size and capabilities of each component. Each of the various components can be viewed
as part of a hierarchy of memories (m1,m2,...,mn) in which each member mi is typically smaller
and faster than the next highest member mi+1 of the hierarchy. To limit waiting by higher levels,
a lower level will respond by filling a buffer and then signaling to activate the transfer.
There are four major storage levels.
1. Internal – Processor registers and cache.
2. Main – the system RAM and controller cards.
3. On-line mass storage – Secondary storage.
4. Off-line bulk storage – Tertiary and Off-line storage.
This is a general memory hierarchy structuring. Many other structures are useful. For example,
a paging algorithm may be considered as a level for virtual memory when designing a computer
architecture, and one can include a level of nearline storage between online and offline
storage.
Memory Management
Memory management is the functionality of an operating system which
handles or manages primary memory and moves processes back and forth
between main memory and disk during execution. Memory management
keeps track of each and every memory location, regardless of either it is
allocated to some process or it is free. It checks how much memory is to be
allocated to processes. It decides which process will get memory at what
time. It tracks whenever some memory gets freed or unallocated and
correspondingly it updates the status.
Process Address Space
The process address space is the set of logical addresses that a process
references in its code. For example, when 32-bit addressing is in use,
addresses can range from 0 to 0x7fffffff; that is, 2^31 possible numbers,
for a total theoretical size of 2 gigabytes.
The operating system takes care of mapping the logical addresses to
physical addresses at the time of memory allocation to the program. There
are three types of addresses used in a program before and after memory is
allocated
1
Symbolic addresses
The addresses used in a source code. The variable names, constants, and
instruction labels are the basic elements of the symbolic address space.
2
Relative addresses
At the time of compilation, a compiler converts symbolic addresses into
relative addresses.
3
Physical addresses
The loader generates these addresses at the time when a program is loaded
into main memory.
Virtual and physical addresses are the same in compile-time and load-time
address-binding schemes. Virtual and physical addresses differ in
execution-time address-binding scheme.
The set of all logical addresses generated by a program is referred to as
a logical address space. The set of all physical addresses corresponding
to these logical addresses is referred to as a physical address space.
The runtime mapping from virtual to physical address is done by the
memory management unit (MMU) which is a hardware device. MMU uses
following mechanism to convert virtual address to physical address.
 The value in the base register is added to every address generated by
a user process, which is treated as offset at the time it is sent to
memory. For example, if the base register value is 10000, then an
attempt by the user to use address location 100 will be dynamically
reallocated to location 10100.
 The user program deals with virtual addresses; it never sees the real
physical addresses.
Static vs Dynamic Loading
The choice between Static or Dynamic Loading is to be made at the time of
computer program being developed. If you have to load your program
statically, then at the time of compilation, the complete programs will be
compiled and linked without leaving any external program or module
dependency. The linker combines the object program with other necessary
object modules into an absolute program, which also includes logical
addresses.
If you are writing a Dynamically loaded program, then your compiler will
compile the program and for all the modules which you want to include
dynamically, only references will be provided and rest of the work will be
done at the time of execution.
At the time of loading, with static loading, the absolute program (and data)
is loaded into memory in order for execution to start.
If you are using dynamic loading, dynamic routines of the library are stored
on a disk in relocatable form and are loaded into memory only when they
are needed by the program.
Static vs Dynamic Linking
As explained above, when static linking is used, the linker combines all
other modules needed by a program into a single executable program to
avoid any runtime dependency.
When dynamic linking is used, it is not required to link the actual module or
library with the program, rather a reference to the dynamic module is
provided at the time of compilation and linking. Dynamic Link Libraries
(DLL) in Windows and Shared Objects in Unix are good examples of
dynamic libraries.
Swapping
Swapping is a mechanism in which a process can be swapped temporarily
out of main memory (or move) to secondary storage (disk) and make that
memory available to other processes. At some later time, the system swaps
back the process from the secondary storage to main memory.
Though performance is usually affected by swapping process but it helps in
running multiple and big processes in parallel and that's the
reason Swapping is also known as a technique for memory compaction.
The total time taken by swapping process includes the time it takes to move
the entire process to a secondary disk and then to copy the process back to
memory, as well as the time the process takes to regain main memory.
Let us assume that the user process is of size 2048KB and on a standard
hard disk where swapping will take place has a data transfer rate around 1
MB per second.
Memory Allocation
Main memory usually has two partitions −
 Low Memory − Operating system resides in this memory.
 High Memory − User processes are held in high memory.
Operating system uses the following memory allocation mechanism.
1
Single-partition allocation
In this type of allocation, relocation-register scheme is used to protect user
processes from each other, and from changing operating-system code and
data. Relocation register contains value of smallest physical address whereas
limit register contains range of logical addresses. Each logical address must be
less than the limit register.
2
Multiple-partition allocation
In this type of allocation, main memory is divided into a number of fixed-sized
partitions where each partition should contain only one process. When a
partition is free, a process is selected from the input queue and is loaded into
the free partition. When the process terminates, the partition becomes
available for another process.
Fragmentation
As processes are loaded and removed from memory, the free memory
space is broken into little pieces. It happens after sometimes that processes
cannot be allocated to memory blocks considering their small size and
memory blocks remains unused. This problem is known as Fragmentation.
Fragmentation is of two types
1
External fragmentation
Total memory space is enough to satisfy a request or to reside a
process in it, but it is not contiguous, so it cannot be used.
2
Internal fragmentation
Memory block assigned to process is bigger. Some portion of
memory is left unused, as it cannot be used by another process.
The internal fragmentation can be reduced by effectively assigning the
smallest partition but large enough for the process.
Paging
A computer can address more memory than the amount physically installed
on the system. This extra memory is actually called virtual memory and it is
a section of a hard that's set up to emulate the computer's RAM. Paging
technique plays an important role in implementing virtual memory.
Paging is a memory management technique in which process address space
is broken into blocks of the same size called pages (size is power of 2,
between 512 bytes and 8192 bytes). The size of the process is measured in
the number of pages.
Similarly, main memory is divided into small fixed-sized blocks of (physical)
memory called frames and the size of a frame is kept the same as that of a
page to have optimum utilization of the main memory and to avoid external
fragmentation.

More Related Content

What's hot

Memory management ppt
Memory management pptMemory management ppt
Memory management ppt
ManishaJha43
 
Memory management
Memory managementMemory management
Memory management
Touhidul Shawan
 
chapter 2 memory and process management
chapter 2 memory and process managementchapter 2 memory and process management
chapter 2 memory and process management
Aisyah Rafiuddin
 
Memory Management in OS
Memory Management in OSMemory Management in OS
Memory Management in OS
vampugani
 
Memory management
Memory managementMemory management
Memory management
cpjcollege
 
Memory management
Memory managementMemory management
Memory management
soumyaharitha
 
Overview of Distributed Systems
Overview of Distributed SystemsOverview of Distributed Systems
Overview of Distributed Systems
vampugani
 
Memory management
Memory managementMemory management
Memory management
Memory managementMemory management
Memory managementSlideshare
 
Operating system memory management
Operating system memory managementOperating system memory management
Operating system memory management
rprajat007
 
Understanding memory management
Understanding memory managementUnderstanding memory management
Understanding memory management
Gokul Vasan
 
Memory management
Memory managementMemory management
Memory management
Vishal Singh
 
Memory management
Memory managementMemory management
Memory management
Mohamed Safraz
 
Storage management
Storage managementStorage management
Storage management
Atul Sharma
 
Memory Management
Memory ManagementMemory Management
Memory Management
DEDE IRYAWAN
 
Memory Management
Memory ManagementMemory Management
Memory Management
sangrampatil81
 
Operating System (Scheduling, Input and Output Management, Memory Management,...
Operating System (Scheduling, Input and Output Management, Memory Management,...Operating System (Scheduling, Input and Output Management, Memory Management,...
Operating System (Scheduling, Input and Output Management, Memory Management,...
Project Student
 
Memory management
Memory managementMemory management
Memory management
Muhammad Fayyaz
 

What's hot (20)

Memory management ppt
Memory management pptMemory management ppt
Memory management ppt
 
Memory management
Memory managementMemory management
Memory management
 
chapter 2 memory and process management
chapter 2 memory and process managementchapter 2 memory and process management
chapter 2 memory and process management
 
Memory Management in OS
Memory Management in OSMemory Management in OS
Memory Management in OS
 
Memory management
Memory managementMemory management
Memory management
 
Memory management
Memory managementMemory management
Memory management
 
Overview of Distributed Systems
Overview of Distributed SystemsOverview of Distributed Systems
Overview of Distributed Systems
 
Memory management
Memory managementMemory management
Memory management
 
Ch4 memory management
Ch4 memory managementCh4 memory management
Ch4 memory management
 
Memory management
Memory managementMemory management
Memory management
 
Operating system memory management
Operating system memory managementOperating system memory management
Operating system memory management
 
Understanding memory management
Understanding memory managementUnderstanding memory management
Understanding memory management
 
Memory management
Memory managementMemory management
Memory management
 
Memory management
Memory managementMemory management
Memory management
 
Storage management
Storage managementStorage management
Storage management
 
Memory Management
Memory ManagementMemory Management
Memory Management
 
Memory Management
Memory ManagementMemory Management
Memory Management
 
VIRTUAL MEMORY
VIRTUAL MEMORYVIRTUAL MEMORY
VIRTUAL MEMORY
 
Operating System (Scheduling, Input and Output Management, Memory Management,...
Operating System (Scheduling, Input and Output Management, Memory Management,...Operating System (Scheduling, Input and Output Management, Memory Management,...
Operating System (Scheduling, Input and Output Management, Memory Management,...
 
Memory management
Memory managementMemory management
Memory management
 

Viewers also liked

Process management in os
Process management in osProcess management in os
Process management in osSumant Diwakar
 
Process management
Process managementProcess management
Process management
Birju Tank
 
Introduction to Operating System (Important Notes)
Introduction to Operating System (Important Notes)Introduction to Operating System (Important Notes)
Introduction to Operating System (Important Notes)
Gaurav Kakade
 
Complete Operating System notes
Complete Operating System notesComplete Operating System notes
Complete Operating System notes
Lakshmi Sarvani Videla
 
Process management in os
Process management in osProcess management in os
Process management in os
Miong Lazaro
 
Operating system notes pdf
Operating system notes pdfOperating system notes pdf
Operating system notes pdf
Jasleen Kaur (Chandigarh University)
 
Chapter 5 Process Management
Chapter 5 Process ManagementChapter 5 Process Management
Chapter 5 Process Management
Dr. John V. Padua
 
Operating system notes
Operating system notesOperating system notes
Operating system notesSANTOSH RATH
 
Operating Systems - Processor Management
Operating Systems - Processor ManagementOperating Systems - Processor Management
Operating Systems - Processor Management
Damian T. Gordon
 
Os solved question paper
Os solved question paperOs solved question paper
Os solved question paperAnkit Bhatnagar
 
Process management
Process managementProcess management
Process managementMohd Arif
 
Operating system concepts (notes)
Operating system concepts (notes)Operating system concepts (notes)
Operating system concepts (notes)Sohaib Danish
 
Os Swapping, Paging, Segmentation and Virtual Memory
Os Swapping, Paging, Segmentation and Virtual MemoryOs Swapping, Paging, Segmentation and Virtual Memory
Os Swapping, Paging, Segmentation and Virtual Memory
sgpraju
 
SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...
SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...
SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...
vtunotesbysree
 

Viewers also liked (15)

Process management in os
Process management in osProcess management in os
Process management in os
 
Process management
Process managementProcess management
Process management
 
Introduction to Operating System (Important Notes)
Introduction to Operating System (Important Notes)Introduction to Operating System (Important Notes)
Introduction to Operating System (Important Notes)
 
Complete Operating System notes
Complete Operating System notesComplete Operating System notes
Complete Operating System notes
 
Process management in os
Process management in osProcess management in os
Process management in os
 
Operating system notes pdf
Operating system notes pdfOperating system notes pdf
Operating system notes pdf
 
Chapter 5 Process Management
Chapter 5 Process ManagementChapter 5 Process Management
Chapter 5 Process Management
 
Operating system notes
Operating system notesOperating system notes
Operating system notes
 
Operating Systems - Processor Management
Operating Systems - Processor ManagementOperating Systems - Processor Management
Operating Systems - Processor Management
 
Os solved question paper
Os solved question paperOs solved question paper
Os solved question paper
 
Process management
Process managementProcess management
Process management
 
Operating system concepts (notes)
Operating system concepts (notes)Operating system concepts (notes)
Operating system concepts (notes)
 
Os Swapping, Paging, Segmentation and Virtual Memory
Os Swapping, Paging, Segmentation and Virtual MemoryOs Swapping, Paging, Segmentation and Virtual Memory
Os Swapping, Paging, Segmentation and Virtual Memory
 
Memory management
Memory managementMemory management
Memory management
 
SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...
SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...
SOLUTION MANUAL OF OPERATING SYSTEM CONCEPTS BY ABRAHAM SILBERSCHATZ, PETER B...
 

Similar to Memory managment

Memory devices
Memory devicesMemory devices
Memory devices
arpit sharma
 
Main Memory RAM and ROM
Main Memory RAM and ROMMain Memory RAM and ROM
Main Memory RAM and ROM
Archana Gopinath
 
COMPUTER MEMORY
COMPUTER MEMORYCOMPUTER MEMORY
COMPUTER MEMORYRajat More
 
Memory
MemoryMemory
Memory
Vijay Kumar
 
Computer memory and types of memory.pptx
Computer memory and types of memory.pptxComputer memory and types of memory.pptx
Computer memory and types of memory.pptx
dbmscse61
 
Presentation2 (1).pp text book for students
Presentation2 (1).pp text book for studentsPresentation2 (1).pp text book for students
Presentation2 (1).pp text book for students
addokenneth58
 
2. the memory systems (module2)
2. the memory systems (module2)2. the memory systems (module2)
2. the memory systems (module2)
Ajit Saraf
 
Computer memory
Computer memoryComputer memory
Computer memory
SophiyaPrabin
 
Memory and storage devices
Memory and storage devicesMemory and storage devices
Memory and storage devices
ChuuHye
 
CA UNIT V..pptx
CA UNIT V..pptxCA UNIT V..pptx
CA UNIT V..pptx
ssuser9dbd7e
 
Memory Organisation in embedded systems
Memory Organisation in embedded systemsMemory Organisation in embedded systems
Memory Organisation in embedded systems
UthraSowrirajan1
 
8085 interfacing with memory chips
8085 interfacing with memory chips8085 interfacing with memory chips
8085 interfacing with memory chips
Srikrishna Thota
 
Chap3 primary memory
Chap3 primary memoryChap3 primary memory
Chap3 primary memory
raksharao
 
Memory Devices.pptx
Memory Devices.pptxMemory Devices.pptx
Memory Devices.pptx
MohanKumar737765
 
18. the components of the system unit
18. the components of the system unit18. the components of the system unit
18. the components of the system unit
Zambales National High School
 
Rahman
RahmanRahman
CH - 4 central processing unit & memory devices.pptx
CH - 4 central processing unit & memory devices.pptxCH - 4 central processing unit & memory devices.pptx
CH - 4 central processing unit & memory devices.pptx
PragatiKachhi1
 
Memory Organization of a Computer System
Memory Organization of a Computer SystemMemory Organization of a Computer System
Memory Organization of a Computer System
Taminul Islam
 

Similar to Memory managment (20)

Memory devices
Memory devicesMemory devices
Memory devices
 
Main Memory RAM and ROM
Main Memory RAM and ROMMain Memory RAM and ROM
Main Memory RAM and ROM
 
COMPUTER MEMORY
COMPUTER MEMORYCOMPUTER MEMORY
COMPUTER MEMORY
 
Memory
MemoryMemory
Memory
 
Computer memory and types of memory.pptx
Computer memory and types of memory.pptxComputer memory and types of memory.pptx
Computer memory and types of memory.pptx
 
Presentation2 (1).pp text book for students
Presentation2 (1).pp text book for studentsPresentation2 (1).pp text book for students
Presentation2 (1).pp text book for students
 
2. the memory systems (module2)
2. the memory systems (module2)2. the memory systems (module2)
2. the memory systems (module2)
 
Computer memory
Computer memoryComputer memory
Computer memory
 
Memory and storage devices
Memory and storage devicesMemory and storage devices
Memory and storage devices
 
CA UNIT V..pptx
CA UNIT V..pptxCA UNIT V..pptx
CA UNIT V..pptx
 
Memory Organisation in embedded systems
Memory Organisation in embedded systemsMemory Organisation in embedded systems
Memory Organisation in embedded systems
 
8085 interfacing with memory chips
8085 interfacing with memory chips8085 interfacing with memory chips
8085 interfacing with memory chips
 
Chap3 primary memory
Chap3 primary memoryChap3 primary memory
Chap3 primary memory
 
Memory Devices.pptx
Memory Devices.pptxMemory Devices.pptx
Memory Devices.pptx
 
18. the components of the system unit
18. the components of the system unit18. the components of the system unit
18. the components of the system unit
 
Rahman
RahmanRahman
Rahman
 
CH - 4 central processing unit & memory devices.pptx
CH - 4 central processing unit & memory devices.pptxCH - 4 central processing unit & memory devices.pptx
CH - 4 central processing unit & memory devices.pptx
 
Memory Organization of a Computer System
Memory Organization of a Computer SystemMemory Organization of a Computer System
Memory Organization of a Computer System
 
Memory
MemoryMemory
Memory
 
M E M O R Y
M E M O R YM E M O R Y
M E M O R Y
 

Recently uploaded

IOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptx
IOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptxIOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptx
IOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptx
Abida Shariff
 
FIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdf
FIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdfFIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdf
FIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdf
FIDO Alliance
 
Knowledge engineering: from people to machines and back
Knowledge engineering: from people to machines and backKnowledge engineering: from people to machines and back
Knowledge engineering: from people to machines and back
Elena Simperl
 
Designing Great Products: The Power of Design and Leadership by Chief Designe...
Designing Great Products: The Power of Design and Leadership by Chief Designe...Designing Great Products: The Power of Design and Leadership by Chief Designe...
Designing Great Products: The Power of Design and Leadership by Chief Designe...
Product School
 
GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...
GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...
GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...
Sri Ambati
 
DevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA ConnectDevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA Connect
Kari Kakkonen
 
FIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdf
FIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdfFIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdf
FIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdf
FIDO Alliance
 
Key Trends Shaping the Future of Infrastructure.pdf
Key Trends Shaping the Future of Infrastructure.pdfKey Trends Shaping the Future of Infrastructure.pdf
Key Trends Shaping the Future of Infrastructure.pdf
Cheryl Hung
 
JMeter webinar - integration with InfluxDB and Grafana
JMeter webinar - integration with InfluxDB and GrafanaJMeter webinar - integration with InfluxDB and Grafana
JMeter webinar - integration with InfluxDB and Grafana
RTTS
 
ODC, Data Fabric and Architecture User Group
ODC, Data Fabric and Architecture User GroupODC, Data Fabric and Architecture User Group
ODC, Data Fabric and Architecture User Group
CatarinaPereira64715
 
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Ramesh Iyer
 
When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...
Elena Simperl
 
The Art of the Pitch: WordPress Relationships and Sales
The Art of the Pitch: WordPress Relationships and SalesThe Art of the Pitch: WordPress Relationships and Sales
The Art of the Pitch: WordPress Relationships and Sales
Laura Byrne
 
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Thierry Lestable
 
Neuro-symbolic is not enough, we need neuro-*semantic*
Neuro-symbolic is not enough, we need neuro-*semantic*Neuro-symbolic is not enough, we need neuro-*semantic*
Neuro-symbolic is not enough, we need neuro-*semantic*
Frank van Harmelen
 
UiPath Test Automation using UiPath Test Suite series, part 3
UiPath Test Automation using UiPath Test Suite series, part 3UiPath Test Automation using UiPath Test Suite series, part 3
UiPath Test Automation using UiPath Test Suite series, part 3
DianaGray10
 
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
UiPathCommunity
 
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdfFIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance
 
Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...
Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...
Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...
Product School
 
Epistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI supportEpistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI support
Alan Dix
 

Recently uploaded (20)

IOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptx
IOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptxIOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptx
IOS-PENTESTING-BEGINNERS-PRACTICAL-GUIDE-.pptx
 
FIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdf
FIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdfFIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdf
FIDO Alliance Osaka Seminar: Passkeys and the Road Ahead.pdf
 
Knowledge engineering: from people to machines and back
Knowledge engineering: from people to machines and backKnowledge engineering: from people to machines and back
Knowledge engineering: from people to machines and back
 
Designing Great Products: The Power of Design and Leadership by Chief Designe...
Designing Great Products: The Power of Design and Leadership by Chief Designe...Designing Great Products: The Power of Design and Leadership by Chief Designe...
Designing Great Products: The Power of Design and Leadership by Chief Designe...
 
GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...
GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...
GenAISummit 2024 May 28 Sri Ambati Keynote: AGI Belongs to The Community in O...
 
DevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA ConnectDevOps and Testing slides at DASA Connect
DevOps and Testing slides at DASA Connect
 
FIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdf
FIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdfFIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdf
FIDO Alliance Osaka Seminar: The WebAuthn API and Discoverable Credentials.pdf
 
Key Trends Shaping the Future of Infrastructure.pdf
Key Trends Shaping the Future of Infrastructure.pdfKey Trends Shaping the Future of Infrastructure.pdf
Key Trends Shaping the Future of Infrastructure.pdf
 
JMeter webinar - integration with InfluxDB and Grafana
JMeter webinar - integration with InfluxDB and GrafanaJMeter webinar - integration with InfluxDB and Grafana
JMeter webinar - integration with InfluxDB and Grafana
 
ODC, Data Fabric and Architecture User Group
ODC, Data Fabric and Architecture User GroupODC, Data Fabric and Architecture User Group
ODC, Data Fabric and Architecture User Group
 
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...
 
When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...When stars align: studies in data quality, knowledge graphs, and machine lear...
When stars align: studies in data quality, knowledge graphs, and machine lear...
 
The Art of the Pitch: WordPress Relationships and Sales
The Art of the Pitch: WordPress Relationships and SalesThe Art of the Pitch: WordPress Relationships and Sales
The Art of the Pitch: WordPress Relationships and Sales
 
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
Empowering NextGen Mobility via Large Action Model Infrastructure (LAMI): pav...
 
Neuro-symbolic is not enough, we need neuro-*semantic*
Neuro-symbolic is not enough, we need neuro-*semantic*Neuro-symbolic is not enough, we need neuro-*semantic*
Neuro-symbolic is not enough, we need neuro-*semantic*
 
UiPath Test Automation using UiPath Test Suite series, part 3
UiPath Test Automation using UiPath Test Suite series, part 3UiPath Test Automation using UiPath Test Suite series, part 3
UiPath Test Automation using UiPath Test Suite series, part 3
 
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
Dev Dives: Train smarter, not harder – active learning and UiPath LLMs for do...
 
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdfFIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
FIDO Alliance Osaka Seminar: FIDO Security Aspects.pdf
 
Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...
Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...
Unsubscribed: Combat Subscription Fatigue With a Membership Mentality by Head...
 
Epistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI supportEpistemic Interaction - tuning interfaces to provide information for AI support
Epistemic Interaction - tuning interfaces to provide information for AI support
 

Memory managment

  • 1. Memory A memory is just like a human brain. It is used to store data and instructions. Computer memory is the storage space in computer where data is to be processed and instructions required for processing are stored. The memory is divided into large number of small parts called cells. Each location or cell has a unique address which varies from zero to memory size minus one. For example if computer has 64k words, then this memory unit has 64 * 1024=65536 memory locations. The address of these locations varies from 0 to 65535. Memory is primarily of three types  Cache Memory  Primary Memory/Main Memory  Secondary Memory Cache Memory Cache memory is a very high speed semiconductor memory which can speed up CPU. It acts as a buffer between the CPU and main memory. It is used to hold those parts of data and program which are most frequently used by CPU. The parts of data and programs are transferred from disk to cache memory by operating system, from where CPU can access them. SecondaryMemory This type of memory is also known as external memory or non-volatile. It is slower than main memory. These are used for storing data/Information permanently. CPU directly does not access these memories instead they are accessed via input-output routines. Contents of secondary memories are first transferred to main memory, and then CPU can access it. For example : disk, CD-ROM, DVD etc. Primary Memory (Main Memory) As human beings have a memory system to remember even a tiny thing which went through in one’s life, similarly computer systems do contain a memory system which can store data and can be retrieved when desired. Why not after all it’s been designed and created by intellectual humans only. Every computer system contains two kinds of
  • 2. memory out of which one is primary and the other is secondarymemory. Basically a computer memory can store particularly two things. They are the data and the set of instructions to execute a program. Now let us take a brief look towards the types of primary storage (or) primary memory. This primary memory can be directly accessed by the processing unit. The contents in the primary memory are temporary. While performing a task if there is any power cut problems then we may lose the data which is in primary memory. One benefit is that we can store and retrieve the data with a considerable speed. Primary memory is more expensive when compared to secondary memory. RAM (Random Access Memory) could be the best example of primary memory. The primary memory in the computer system is in the form of Integrated Circuits. These circuits are nothing but RAM. Each of RAM’s locations can store one byte [1 Byte = 8 bits] of information. This can be in either of the forms 1 or 0. The primary storage section is made up of several small storage locations in the integrated circuits called cells. Every single cell can store fixed number of bits called word length. Each cell contains a unique number assigned to it and it has the unique address; these addresses are used to identify the cells. The address starts at level 0 and goes up to (N-1). Typesof primary ORMain memory: RAM [RANDOM ACCESS MEMORY] RAM is the best example of primary storage. We have very good reason to justify because in this kind of memory we can select randomly, use that at any location of the memory, then store and finally retrieve processed data which is information. RAM is a volatile memory because it loses its contents when there is a power failure in the computer system. The memories which lose their contents on power failure are called volatile memories.
  • 3. Static RAM (SRAM) The word static indicates that the memory retains its contents as long as power is being supplied. However, data is lost when the power gets down due to volatile nature. SRAM chips use a matrix of 6-transistors and no capacitors. Transistors do not require power to prevent leakage, so SRAM need not have to be refreshed on a regular basis. Because of the extra space in the matrix, SRAM uses more chips than DRAM for the same amount of storage space, thus making the manufacturing costs higher. So SRAM is used as cache memory and has very fast access. Dynamic RAM (DRAM) DRAM, unlike SRAM, must be continually refreshed in order to maintain the data. This is done by placing the memory on a refresh circuit that rewrites the data several hundred times per second. DRAM is used for most system memory because it is cheap and small. All DRAMs are made up of memory cells which are composed of one capacitor and one transistor. ROM [READ ONLY MEMORY]: ROM is also formed by Integrated Circuits. The data which is stored in ROM is permanent. The ROM can only read the data by CPU but can’t be edited or manipulated.ROM is a non-volatile memory because it will not lose its contents when there is a power failure in the computer system. The basic I/O program is stored in the ROM and it examines and initializes various
  • 4. devices attached to the computer when the power is ON. The contents in the ROM can neither be changed nor deleted. PROM [PROGRAMMABLE READ ONLY MEMORY]: As we know that we cannot edit (or) modify data in the ROM. To overcome this problem to some extent PROM is very helpful that is in PROM we can store our programs in PROM chip. Once the programs are written it cannot be changed and remain intact even if the power is switched off. Therefore programs written in PROM cannot be erased or edited. MROM (Masked ROM) The very first ROMs were hard-wired devices that contained a pre- programmed set of data or instructions. These kind of ROMs are known as masked ROMs which are inexpensive. EPROM [ERASABLE PROGRAMMABLE READ ONLY MEMORY]: EPROM will overcome the problem of PROM. EPROM chip can be programmed time and again by erasing the information stored earlier in it. EPROM chip has to be exposed to sunlight for some time so that ultra violet rays fall on the chip and that erases the data on the chip and the chip can be re-programmed using a special programming facility. There is another type memory
  • 5. called EEPROM that stands for Electrically Erasable Programmable Read Only Memory in which we can erase the data and re-program it with a fresh content. REGISTERS: Actually computer system uses a number of memory units called registers. Registers store data or information temporarily and pass it on as directed by the control unit. FLASH MEMORY: It is a non-volatile computer memory that can be electrically erased and reprogrammed. Examples are memory cards, chips, pen drives, and USBflash drives etc. flash memory costs very less than byte-programmable EEPROM. It is very portable in nature. Memory hierarchy: In computer architecture the memory hierarchy is a concept used to discuss performance issues in computer architectural design, algorithm predictions, and lower level programming constructs involving locality of reference. The memory hierarchy in computer storage separates each of its levels based on response time. Since response time, complexity, and capacity are related,[1] the levels may also be distinguished by their performance and controlling technologies. Designing for high performance requires considering the restrictions of the memory hierarchy, i.e. the size and capabilities of each component. Each of the various components can be viewed as part of a hierarchy of memories (m1,m2,...,mn) in which each member mi is typically smaller and faster than the next highest member mi+1 of the hierarchy. To limit waiting by higher levels, a lower level will respond by filling a buffer and then signaling to activate the transfer. There are four major storage levels. 1. Internal – Processor registers and cache.
  • 6. 2. Main – the system RAM and controller cards. 3. On-line mass storage – Secondary storage. 4. Off-line bulk storage – Tertiary and Off-line storage. This is a general memory hierarchy structuring. Many other structures are useful. For example, a paging algorithm may be considered as a level for virtual memory when designing a computer architecture, and one can include a level of nearline storage between online and offline storage.
  • 7. Memory Management Memory management is the functionality of an operating system which handles or manages primary memory and moves processes back and forth between main memory and disk during execution. Memory management keeps track of each and every memory location, regardless of either it is allocated to some process or it is free. It checks how much memory is to be allocated to processes. It decides which process will get memory at what time. It tracks whenever some memory gets freed or unallocated and correspondingly it updates the status. Process Address Space The process address space is the set of logical addresses that a process references in its code. For example, when 32-bit addressing is in use, addresses can range from 0 to 0x7fffffff; that is, 2^31 possible numbers, for a total theoretical size of 2 gigabytes. The operating system takes care of mapping the logical addresses to physical addresses at the time of memory allocation to the program. There are three types of addresses used in a program before and after memory is allocated 1 Symbolic addresses The addresses used in a source code. The variable names, constants, and instruction labels are the basic elements of the symbolic address space. 2 Relative addresses At the time of compilation, a compiler converts symbolic addresses into relative addresses. 3 Physical addresses The loader generates these addresses at the time when a program is loaded
  • 8. into main memory. Virtual and physical addresses are the same in compile-time and load-time address-binding schemes. Virtual and physical addresses differ in execution-time address-binding scheme. The set of all logical addresses generated by a program is referred to as a logical address space. The set of all physical addresses corresponding to these logical addresses is referred to as a physical address space. The runtime mapping from virtual to physical address is done by the memory management unit (MMU) which is a hardware device. MMU uses following mechanism to convert virtual address to physical address.  The value in the base register is added to every address generated by a user process, which is treated as offset at the time it is sent to memory. For example, if the base register value is 10000, then an attempt by the user to use address location 100 will be dynamically reallocated to location 10100.  The user program deals with virtual addresses; it never sees the real physical addresses. Static vs Dynamic Loading The choice between Static or Dynamic Loading is to be made at the time of computer program being developed. If you have to load your program statically, then at the time of compilation, the complete programs will be compiled and linked without leaving any external program or module dependency. The linker combines the object program with other necessary object modules into an absolute program, which also includes logical addresses. If you are writing a Dynamically loaded program, then your compiler will compile the program and for all the modules which you want to include dynamically, only references will be provided and rest of the work will be done at the time of execution.
  • 9. At the time of loading, with static loading, the absolute program (and data) is loaded into memory in order for execution to start. If you are using dynamic loading, dynamic routines of the library are stored on a disk in relocatable form and are loaded into memory only when they are needed by the program. Static vs Dynamic Linking As explained above, when static linking is used, the linker combines all other modules needed by a program into a single executable program to avoid any runtime dependency. When dynamic linking is used, it is not required to link the actual module or library with the program, rather a reference to the dynamic module is provided at the time of compilation and linking. Dynamic Link Libraries (DLL) in Windows and Shared Objects in Unix are good examples of dynamic libraries. Swapping Swapping is a mechanism in which a process can be swapped temporarily out of main memory (or move) to secondary storage (disk) and make that memory available to other processes. At some later time, the system swaps back the process from the secondary storage to main memory. Though performance is usually affected by swapping process but it helps in running multiple and big processes in parallel and that's the reason Swapping is also known as a technique for memory compaction.
  • 10. The total time taken by swapping process includes the time it takes to move the entire process to a secondary disk and then to copy the process back to memory, as well as the time the process takes to regain main memory. Let us assume that the user process is of size 2048KB and on a standard hard disk where swapping will take place has a data transfer rate around 1 MB per second. Memory Allocation Main memory usually has two partitions −  Low Memory − Operating system resides in this memory.  High Memory − User processes are held in high memory.
  • 11. Operating system uses the following memory allocation mechanism. 1 Single-partition allocation In this type of allocation, relocation-register scheme is used to protect user processes from each other, and from changing operating-system code and data. Relocation register contains value of smallest physical address whereas limit register contains range of logical addresses. Each logical address must be less than the limit register. 2 Multiple-partition allocation In this type of allocation, main memory is divided into a number of fixed-sized partitions where each partition should contain only one process. When a partition is free, a process is selected from the input queue and is loaded into the free partition. When the process terminates, the partition becomes available for another process. Fragmentation As processes are loaded and removed from memory, the free memory space is broken into little pieces. It happens after sometimes that processes cannot be allocated to memory blocks considering their small size and memory blocks remains unused. This problem is known as Fragmentation. Fragmentation is of two types 1 External fragmentation Total memory space is enough to satisfy a request or to reside a process in it, but it is not contiguous, so it cannot be used. 2 Internal fragmentation Memory block assigned to process is bigger. Some portion of
  • 12. memory is left unused, as it cannot be used by another process. The internal fragmentation can be reduced by effectively assigning the smallest partition but large enough for the process. Paging A computer can address more memory than the amount physically installed on the system. This extra memory is actually called virtual memory and it is a section of a hard that's set up to emulate the computer's RAM. Paging technique plays an important role in implementing virtual memory. Paging is a memory management technique in which process address space is broken into blocks of the same size called pages (size is power of 2, between 512 bytes and 8192 bytes). The size of the process is measured in the number of pages. Similarly, main memory is divided into small fixed-sized blocks of (physical) memory called frames and the size of a frame is kept the same as that of a
  • 13. page to have optimum utilization of the main memory and to avoid external fragmentation.