This presentation reviews the following paper: Davenport, Michael L., Sandra Skendžić, Nicolas Volet, Jared C. Hulme, Martijn JR Heck, and John E. Bowers. "Heterogeneous silicon/III–V semiconductor optical amplifiers." IEEE Journal of Selected Topics in Quantum Electronics 22, no. 6 (2016): 78-88.

1. Heterogeneous Silicon/III–V
Semiconductor Optical
Amplifiers
Presenter: Hossein Babashah
Professor: Dr. Faez

2. invited Paper 2016 IEEE

3. Abstract
 high output power and high-gain semiconductor optical amplifiers integrated
on a heterogeneous silicon/III–V photonics platform.
 25 dB of unsaturated gain for the highest gain design, and 14 dBm of
saturated output power for the highest output power design.
 Show a design method for optimizing the amplifier for the desired
characteristics.
 low loss and low reflection transition between the heterogeneous active
region and a silicon waveguide, and we report transition loss below 1 dB
across the entire measurement range and parasitic reflection coefficient from
the transition below 1 · 10−3 .

4. Introduction
Silicon Photonics
 SILICON photonics Data transmission: high volume and low cost
manufacturing (CMOS).
 Silicon-on-insulator:
 1. Couplers to fiber optics
 2. Polarization splitting and rotation
 3.High speed modulators and photodetectors
 Addition of III-V, (InP), to SOI wafers  heterogeneous integration
components
 1.lasers
 2.amplifiers
 3.electro-absorption and electro-optic modulators
 4.high power photodetectors

5.  The scale of Si photonic integrated circuits (PICs) is rapidly increasing, with a recent
demonstration of a vertically emitting beam forming chip with 4096 components
eclipsing the largest published monolithic InP-based PICs [7].
PIC # Increment

6. Heterogeneous Si/III-V devices
categories
 heterogeneous Si/III-V devices :
 1.Directly bonded to Si
 2.bonded to a planarizing interlayer, such as the polymer divinylsiloxane-bis-
benzocyclobutene (DVS-BCB) or polished silicon dioxide (SiO2 ) [13].
 Directly bonded SOA followed in 2015 [27] show better performance due to
increased confinement factor allowed by this device architecture.

7. SOA Importance in PIC and Applications
 SOA Criticall
 increase output power
 maintain signal levels as the signal propagates throughout a large number of optical
components.
 Examples:
 1. Vertically emitting beam steering chip [4],
 splits laser into 32 channels and uses a carrier plasma- effect phase tuner to adjust the phase
in each channel, which introduces additional loss. SOA
 2.Widely-tunable lasers for WDM transmission typically include an integrated SOA to allow
optimization of the laser wavelength and side-mode suppression ratio (SMSR) separately from
the laser output power [9].
 3. Fixed multi-wavelength laser arrays may use an SOA after each laser to maintain channel
equalization before wavelength multiplexing [10].
 4. Integrated WDM receiver circuits may use an SOA to amplify an incoming signal to reduce
the number of external optical amplifiers in the network [11].
 5. High-speed wavelength conversion [12] through nonlinear effects such as cross gain
modulation.

8. Figures of merit for SOAs
 unsaturated gain factor G0 ,
 the input saturation power Pin,s
 where Ps is the material gain saturation power (Laser rate equation)
 where σxy is the quantum well cross sectional area, λ is the photon
wavelength, a is the differential gain, Γxy is the modal overlap with the
pumped region of the quantum well, τ is the carrier lifetime, h is Planck’s
constant, and c is the speed of light in vacuum.
𝐺0 =
𝑃𝑜𝑢𝑡
𝑃𝑖𝑛
Unsaturated gain of 25.5 dB
input saturation power of 4.25 dBm

9. Input saturation power and Unsaturated
gain Engineering
 Reducing a and τ increases Pin,s, and this can be accomplished by operating
the device at high carrier density.
 A reduction in the number of QW reduces the cross-sectional area ,
which reduces Ps , but it also reduces Γxy and increase the carrier density at
a given current bias, for a net increase in Ps .
 Reducing Γxy increases Pin,s , but also reduces G0 .
 tradeoff between gain and saturation power
𝐺0 =
𝑃𝑜𝑢𝑡
𝑃𝑖𝑛
𝜎 𝑥𝑦

10. Waveguide design
 SiConfinement factorhigh gain
 # of wellsincrease Pin,s
 SCHBarrier

11. SCH width and Confinement Factor
 Barrier width of 125 nm is a better choice

12. Loss
 Si Waveguide width of thick is the best
 500nm 850nm 125nm

13. III-V TO SI TRANSITION
 Go to III-V from SI should be tapered ir
order to have high and efficient
coupling and low loss

14. Measurement Setup
 Tapered probe are used to have low
loss and provide matching in between

15. Comparisson

16. References
 Davenport, Michael L., Sandra Skendžić, Nicolas Volet, Jared C. Hulme,
Martijn JR Heck, and John E. Bowers. "Heterogeneous silicon/III–V
semiconductor optical amplifiers." IEEE Journal of Selected Topics in Quantum
Electronics 22, no. 6 (2016): 78-88.

17. THE END