In this paper Carry Save Adder has been implemente d. The comparison is done on the basis of two perfo rmances such as area,power consumption. The full adder cells fo r low power applications have been implemented usin g transmission gate based technique for sum and carry operation. I n this paper transmission gate also used. It used t o minimize the transistor count. By using the transmission gate th e transistor count has decreased thereby the total chip area gets minimized and the power consumption also gets reduc ed.