The document discusses the four functional units of the CPU: Bus Unit (BU), Instruction Unit (IU), Execution Unit (EU), and Address Unit (AU). It provides details on each unit: the BU performs memory/I/O reads and writes and prefetches instructions into a 6-byte queue; the IU decodes up to three prefetched instructions and holds them in a queue; the EU includes an ALU, registers, and control unit to execute instructions from the IU queue; the AU computes physical addresses for memory/I/O access. It also summarizes key features of the 80286 microprocessor such as supporting 16MB physical memory, 1GB virtual memory using memory management, and operating in real and protected

1. UNIT-I
The CPU maybe viewedtocontainfourfunctional parts,viz.
(1) Bus Unit ( AU ) (3) Execution Unit ( BU )
(2) Instruction Unit ( IU ) (4) Address Unit ( EU )
Bus Unit (BU):
It has address latches, data transceivers, bus interface and circuitry,
instruction pre-fetcher, processor extension interface and 6 byte instruction
queue.
- To perform all memory and IO read and write
- To pre-fetch the instruction bytes.
- Transmit the physical address over address bus A0 – A23.
- Whenever BU is not using the buses for the operation, it pre-
fetches the instruction byte and put them is a 6 byte pre-fetch
queue.
- Prefetcher module in the bus unit performs this task of
prefetching.
- Bus controller controls the prefetcher module.
- Fetched instructions are arranged in a 6 – byte prefetch queue.

2. Instruction Unit (IU):
It has 3 decoded instruction queue and instruction decoder
- It fully decodes up to three prefetched instruction and holds them
in a queue
- So that EU can access them.
- It helps the processor to speed up, as pipelining of instruction is
done.
- Receive arranged instructions from 6 bytes prefetch queue.
- Instruction decoder decodes the instruction one by one and are
latched onto a decoded instruction queue.
Execution Unit (EU):
It includes ALU, Register and the Control unit. Register are general purpose,
index, pointer, flag register and 16-bit machine status word (MSW).
- ALU is the heart of execution unit.
- To sequentially execute the instructions received from the
instruction unit
- Control unit is responsible for executing the instructions received
from the decoded instruction queue.
- Contains Register Bank.
- After execution ALU sends the result either over data bus or back
to the register bank.
Address Unit ( AU ):
- Compute the physical address that will be sent out to the memory
or IO by BU.
- 80286 operate in two modes.
1. Real address mode
2. Protected address mode
- When used in real mode, AU computes the address with segments
base and offset like 8086. Segments register are CS, DS, ES, SS
hold base address. IP, BP, SI, DI, SP hold offset.
- Maximum physical space allowed in this mode is 1MB.
- When 80286 operate in protected mode, the address unit acts as
MMU.
- All 24 address lines used and can access up to 16 MB of physical
memory.
- Calculate the physical addresses of the instruction and data that
the CPU want to access
- Address lines derived by this unit may be used to address different
peripherals.

3. 80286 Basic Features
 The 80286 microprocessorisanadvancedversionof the 8086 microprocessorthatis
designedformulti userandmultitaskingenvironments
 The 80286 addresses16 M Byte of physical memoryand 1G Bytesof virtual memoryby
usingitsmemory-managementsystem
 The performance of 80286 is five timesfasterthanthe standard8086.
 The 80286 isbasicallyan8086 that is optimizedtoexecute instructionsinfewerclocking
periodsthanthe 8086
 Like the 80186, the 80286 doesn’tincorporate internal peripherals;insteaditcontainsa
memorymanagementunit(MMU)
 The 80286 operatesinboththe real and protectedmodes
 In the real mode,the 80286 addressesa1MByte memoryaddressspace and isvirtually
identical to8086
 In the protectedmode,the 80286 addressesa16MByte memoryspace.
 The 80286 containsthe same instructionsexceptfora handful of additional instructionsthat
control the memory-managementnit.
 It is16-bit flagregisterwith12-bitsare used4-bitsunused.