Register Organization of 8086, Architecture, Signal Description of 8086, Physical Memory
Organization, General Bus Operation, I/O Addressing Capability, Special Processor Activities,
Minimum Mode 8086 System and Timings, Maximum Mode 8086 System and Timings.
Addressing Modes of 8086.
A microprocessor is an electronic component that is used by a computer to do its work. It is a central processing unit on a single integrated circuit chip containing millions of very small components including transistors, resistors, and diodes that work together. Some microprocessors in the 20th century required several chips. Microprocessors help to do everything from controlling elevators to searching the Web. Everything a computer does is described by instructions of computer programs, and microprocessors carry out these instructions many millions of times a second. [1]
Microprocessors were invented in the 1970s for use in embedded systems. The majority are still used that way, in such things as mobile phones, cars, military weapons, and home appliances. Some microprocessors are microcontrollers, so small and inexpensive that they are used to control very simple products like flashlights and greeting cards that play music when you open them. A few especially powerful microprocessors are used in personal computers.
8086 Microprocessor is an enhanced version of 8085 Microprocessor that was designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and 16 data lines that provides up to 1MB storage. In April 1978, intel introduced this microprocessor and it was officially released on June 8.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
Explore the innovative world of trenchless pipe repair with our comprehensive guide, "The Benefits and Techniques of Trenchless Pipe Repair." This document delves into the modern methods of repairing underground pipes without the need for extensive excavation, highlighting the numerous advantages and the latest techniques used in the industry.
Learn about the cost savings, reduced environmental impact, and minimal disruption associated with trenchless technology. Discover detailed explanations of popular techniques such as pipe bursting, cured-in-place pipe (CIPP) lining, and directional drilling. Understand how these methods can be applied to various types of infrastructure, from residential plumbing to large-scale municipal systems.
Ideal for homeowners, contractors, engineers, and anyone interested in modern plumbing solutions, this guide provides valuable insights into why trenchless pipe repair is becoming the preferred choice for pipe rehabilitation. Stay informed about the latest advancements and best practices in the field.
Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxR&R Consult
CFD analysis is incredibly effective at solving mysteries and improving the performance of complex systems!
Here's a great example: At a large natural gas-fired power plant, where they use waste heat to generate steam and energy, they were puzzled that their boiler wasn't producing as much steam as expected.
R&R and Tetra Engineering Group Inc. were asked to solve the issue with reduced steam production.
An inspection had shown that a significant amount of hot flue gas was bypassing the boiler tubes, where the heat was supposed to be transferred.
R&R Consult conducted a CFD analysis, which revealed that 6.3% of the flue gas was bypassing the boiler tubes without transferring heat. The analysis also showed that the flue gas was instead being directed along the sides of the boiler and between the modules that were supposed to capture the heat. This was the cause of the reduced performance.
Based on our results, Tetra Engineering installed covering plates to reduce the bypass flow. This improved the boiler's performance and increased electricity production.
It is always satisfying when we can help solve complex challenges like this. Do your systems also need a check-up or optimization? Give us a call!
Work done in cooperation with James Malloy and David Moelling from Tetra Engineering.
More examples of our work https://www.r-r-consult.dk/en/cases-en/
Automobile Management System Project Report.pdfKamal Acharya
The proposed project is developed to manage the automobile in the automobile dealer company. The main module in this project is login, automobile management, customer management, sales, complaints and reports. The first module is the login. The automobile showroom owner should login to the project for usage. The username and password are verified and if it is correct, next form opens. If the username and password are not correct, it shows the error message.
When a customer search for a automobile, if the automobile is available, they will be taken to a page that shows the details of the automobile including automobile name, automobile ID, quantity, price etc. “Automobile Management System” is useful for maintaining automobiles, customers effectively and hence helps for establishing good relation between customer and automobile organization. It contains various customized modules for effectively maintaining automobiles and stock information accurately and safely.
When the automobile is sold to the customer, stock will be reduced automatically. When a new purchase is made, stock will be increased automatically. While selecting automobiles for sale, the proposed software will automatically check for total number of available stock of that particular item, if the total stock of that particular item is less than 5, software will notify the user to purchase the particular item.
Also when the user tries to sale items which are not in stock, the system will prompt the user that the stock is not enough. Customers of this system can search for a automobile; can purchase a automobile easily by selecting fast. On the other hand the stock of automobiles can be maintained perfectly by the automobile shop manager overcoming the drawbacks of existing system.
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdffxintegritypublishin
Advancements in technology unveil a myriad of electrical and electronic breakthroughs geared towards efficiently harnessing limited resources to meet human energy demands. The optimization of hybrid solar PV panels and pumped hydro energy supply systems plays a pivotal role in utilizing natural resources effectively. This initiative not only benefits humanity but also fosters environmental sustainability. The study investigated the design optimization of these hybrid systems, focusing on understanding solar radiation patterns, identifying geographical influences on solar radiation, formulating a mathematical model for system optimization, and determining the optimal configuration of PV panels and pumped hydro storage. Through a comparative analysis approach and eight weeks of data collection, the study addressed key research questions related to solar radiation patterns and optimal system design. The findings highlighted regions with heightened solar radiation levels, showcasing substantial potential for power generation and emphasizing the system's efficiency. Optimizing system design significantly boosted power generation, promoted renewable energy utilization, and enhanced energy storage capacity. The study underscored the benefits of optimizing hybrid solar PV panels and pumped hydro energy supply systems for sustainable energy usage. Optimizing the design of solar PV panels and pumped hydro energy supply systems as examined across diverse climatic conditions in a developing country, not only enhances power generation but also improves the integration of renewable energy sources and boosts energy storage capacities, particularly beneficial for less economically prosperous regions. Additionally, the study provides valuable insights for advancing energy research in economically viable areas. Recommendations included conducting site-specific assessments, utilizing advanced modeling tools, implementing regular maintenance protocols, and enhancing communication among system components.
Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
Quality defects in TMT Bars, Possible causes and Potential Solutions.PrashantGoswami42
Maintaining high-quality standards in the production of TMT bars is crucial for ensuring structural integrity in construction. Addressing common defects through careful monitoring, standardized processes, and advanced technology can significantly improve the quality of TMT bars. Continuous training and adherence to quality control measures will also play a pivotal role in minimizing these defects.
2. What is Microprocessor?
A microprocessor is a multipurpose,
programmable, clock-driven, register-
based electronic device.
Reads binary instructions from a storage
device called memory
Accepts binary data as input and
processes data according to those
instructions and provide results as output
Microprocessor is a single IC package in
which a number of useful functions are
integrated and fabricated on a single
silicon semiconductor chip
3. Introduction
8086 is a 16-bit μp.
8086 has a 20 bit address bus can access up to 220
memory locations (1 MB).
Address ranges from 00000H to FFFFFH
3
4.
introduction
Memory is byte addressable - Every byte has a separate address.
It has 16 bit Databus.
Word size is 16 bits.
It has multiplexed address and data bus AD0- AD15 and A16 – A19.
8086 is designed to operate in two modes, Minimum and Maximum.
It can prefetch up to 6 instruction bytes from memory and queues them in order
to speed up instruction execution.
It requires +5V power supply.
A 40 pin dual in line package.
4
7. Internal architecture of 8086
8086 has two blocks BIU and EU.
The BIU handles all transactions of data and addresses on the buses for EU.
BIU performs all bus operations such as instruction fetching, reading and
writing operands for memory and calculating addresses of the memory
operands. The instruction bytes are transferred to the instruction queue.
EU executes instructions from the instruction system byte queue.
Both units operate asynchronously to give the 8086 an overlapping
instruction fetch and execution mechanism which is called as
Pipelining. This results in efficient use of the system bus and system
performance.
BIU contains Instruction queue, Segment registers, Instruction pointer,
Address adder.
EU contains Control circuitry, Instruction decoder, ALU, Pointer and
Index register, Flag register.
7
8. BUS INTERFACE UNIT (BIU)
Contains
6-byte Instruction Queue (Q)
The Segment Registers (CS, DS, ES, SS).
The Instruction Pointer (IP)
The Address Summing block (Σ) – To generate 20 bit address
8
9. Instruction Queue
The BIU uses a mechanism known as an instruction stream queue
to implement a pipeline architecture.
This queue permits pre-fetch of up to 6 bytes of instruction code.
BIU is free to look ahead in the program by pre-fetching the next
sequential instruction.
These pre-fetching instructions are held in its FIFO queue. With its
16 bit data bus, the BIU fetches two instruction bytes in a single
memory cycle.
The EU accesses the queue from the output end. It reads one
instruction byte after the other from the output of the queue.
9
11. Memory Segmentation
Code segment (64KB)
Data segment (64KB)
Extra segment (64KB)
Stack segment (64KB)
1MB
The memory in an 8086/88 based system is organized
as segmented memory.
8086 addresses 1MB of memory
The physical memory may be divided into logical
segments.
The 4 segments are Code, Data, Extra and Stack
The size of each segment is 64 KB
• A segment begins at a location which is divisible by
16(10H) Each of these segments can be used for a
specific function.
• Code segment is used for storing the instructions.
• stack segment is used as a stack and used to store
the return address.
• Data and extra segments are used for storing data
bytes.
• In the assembly language programming, more
than one data/ code/ stack segments can be
defined. But only one segment of each type can be
accessed at any time.
00000
FFFFF
Physical Memory
12. The 16 bit
contents of the
segment registers
in the BIU actually
point to the
starting location
of a particular
segment.
Segments may be
overlapped or
non-overlapped
13. Advantages of Segmented memory Scheme
Allows the memory capacity to be 1Mb although the actual
addresses are of 16 bit size.
Allows the placing of code, data and stack portions of the same
program in different parts (segments) of the m/y, for data and
code protection.
Permits a program / data to be put into different areas of memory
each time program is executed, i.e. provision for relocation may
be done .
segment registers are used to allow the instruction, data or stack
portion of a program to be more than 64Kb long by using more
than one code, data or stack segments.
13
15. Instruction pointer & summing block
Instruction pointer register contains a 16-bit offset address of instruction that
is to be executed next.
IP always references the Code segment register (CS).
The value contained in the IP is called as an offset as this value must be
added to the base address of the code segment to find the 20-bit physical
address.
IP is incremented after executing every instruction.
To form a 20bit address of the next instruction, the 16 bit address of the IP is
added (by the address summing block) to the address contained in the CS
, which has been shifted four bits to the left.
15
17. Example For Address Calculation (segment: offset)
If the data segment starts at location 1000h and a data reference
contains the address 29h where is the actual data?
17
Required Address
Offset
Segment Address
0000 0000 0010 1001
0000
0001 0000 0000 0010 1001
0001 0000 0000 0000
18. Segment and Address register combination
CS:IP
SS:SPSS:BP
DS:BX DS:SI
DS:DI (for other than string operations)
ES:DI (for string operations)
18
19. EXECUTION UNIT
Decodes instructions fetched by the BIU
Generate control signals,
Executes instructions.
The main parts are:
Control Circuitry
Instruction decoder
ALU
19
20. EXECUTION UNIT – General Purpose Registers
AH AL
BH BL
CH CL
DH DL
SP
BP
SI
DI
20
8 bits 8 bits
16 bits
Accumulator
Base
Count
Data
Stack Pointer
Base Pointer
Source Index
Destination Index
AX
BX
CX
DX
Pointer
Index
8 bits 8 bits
16 bits
Accumulator
Base
Count
Data
Stack Pointer
Base Pointer
Source Index
Destination Index
21. Pointer And Index Registers
used to keep offset addresses.
Used in various forms of memory addressing.
In the case of SP and BP the default reference to form a physical address is the
Stack Segment.
The index registers (SI & DI) and the BX generally default to the Data segment
register (DS).
21
22. SP: Stack pointer
– Used with SS to access the stack segment
BP: Base Pointer
– Primarily used to access data on the stack
– Can be used to access data in other segments
SI: Source Index register
– is required for some string operations
–SI is associated with the data segment (DS) reg. in string operations.
DI: Destination Index register
– is also required for some string operations.
– DI is associated with ES register in string operations.
The SI and the DI registers may also be used to access data stored in arrays.
22
23. Control Circuit
Instruction Register and Instruction Decoder: (Present
inside the Control Unit) The EU fetches an opcode
from the queue into the instruction register. The
instruction decoder decodes it and sends the
information to the control circuit for execution.
26. Features of 8086
It has an instruction queue, which is capable of storing six instruction bytes
from the memory resulting in faster processing.
It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data
bus, and 16-bit external data bus resulting in faster processing.
It is available in 3 versions based on the frequency of operation −
8086 → 5MHz
8086-2 → 8MHz
8086-1 → 10 MHz
It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
Fetch stage can prefetch up to 6 bytes of instructions and stores them in the
queue.
Execute stage executes these instructions.
It has 256 vectored interrupts.
29. PIN Details
Intel 8086 is a 16-bit HMOS microprocessor.
It is available in 40 pin DIP chip
It uses a 5V DC supply for its operation
The 8086 uses 20-line address bus
It has a 16-line data bus. The 20 lines of the address
bus operate in multiplexed mode
The 16-low order address bus lines have been
multiplexed with data and 4 high-order address bus
lines have been multiplexed with status signals.
30. PIN Details
AD0-AD15 : Address/Data bus. These are low order
address bus. They are multiplexed with data. When
AD lines are used to transmit memory address the
symbol A is used instead of AD, for example A0-A15.
When data are transmitted over AD lines the symbol
D is used in place of AD, for example D0-D7, D8-D15
or D0-D15.
A16-A19 : High order address bus. These are
multiplexed with status signals.
31. PIN DIAGRAM
A16/S3, A17/S4, A18/S5, A19/S6 : The specified
address lines are multiplexed with corresponding
status signals.
