This document describes the design of an 8-bit multiplier circuit. It uses 4-bit multipliers as building blocks, along with adders and carry look-ahead units. The 8-bit numbers are broken into 4-bit groups, and the partial products of each group are generated using 4-bit multipliers. Adders are then used to sum the slices of the partial products to obtain the final 16-bit product. The implementation requires four 4-bit multipliers, four 4-bit adders, three arithmetic logic units, and an optional carry look-ahead unit, for a total of 12 packages. While this design works, the document notes a direct 8-bit multiplier would have been simpler if 8-bit

1. An 8-Bit Multiplier
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PROJECT TITLE: An8-bit Multiplier Circuit.
COURSE NUMBER & NAME: EE- 211 Digital Logic Design.
GROUP MEMBERS:
Muhammad Asad Nawaz.
Syed Mobeen Riaz.
Muhammad Sharjeel Hashmi.
GROUP REGISTRATION#
11-EE-57
11-EE-153
11-EE-159
DUE DATE: 3rd January 2013
DATE HANDED IN: 13th December 2012
ABSTRACT
We will see how to apply the principles and components of arithmetic circuits
to implement a subsystem of moderate complexity. Our objective is to design a fast 8-
by-8 bit multiplier using 4-by-4 bit multipliers as building blocks, along with adders,
arithmetic logic, and carry look-ahead units.

2. An 8-Bit Multiplier
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INTRODUCTION
We can express an 8-bit product as a series of sums of 1-bit products, so-called
Partial Product Accumulation. We can exploit the same principle to construct
multipliers of wider bit widths using primitive 4-by-4 multiplier blocks.
First, we denote the two 8-bit magnitudes to be multiplied as A7-0 and B7-0 and the
16-bit product that results as P15-0. We can partition A and B into two 4-bit
groups, A7-4, A3-0, B7-4, B3-0, and form their 16-bit product as a sum of several 8-bit
products:
To see how this works, let's examine the multiplication of the 8-bit binary numbers
111100102 and 100011002. These correspond to the decimal numbers 242 and 140,
respectively. As a check, we see that 242 * 140 = 33880, which is equal to
10000100010110002.
The hardware implementation follows directly from this observation. It requires four
4-by-4 multipliers, plus logic to sum the four-bit wide slices of the partial products.
Let's call the four 8-bit partial products PP0, PP1, PP2, and PP3. Then the final
product bits are computed as follows:
Of course, any carry-out of the calculation of P7-4 must be added to the sum for P11-
8, and likewise for the carry-out of P11-8 to P15-12.

3. An 8-Bit Multiplier
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IMPLEMENTATION
The basic blocks of the implementation are (1) the calculation of partial
products, (2) the summing of the 4-bit product slices, and (3) the carry look-ahead
unit. We examine each of these in turn.
Calculation of Partial Products:
1st we want to use the 4 bit multiplier ICs to generate the partial products but
we haven’t find these ICs so we use gates instead of IC’s. A simple 4-bit multiplier
circuit is shown below. We have to use four such multipliers to get four partial
products, because each multiplier produced one partial product. The AND gates we
have used here are 7408
A 4x4 Multiplier Circuit
Calculation of Sums:
The low-order 4 bits of the final product, P3-0, are the same as PP03-0 and do
not participate in the sums. P7-4 and P11-8 are sums of three 4-bit quantities. How do
we compute these?

4. An 8-Bit Multiplier
For this purpose, we need a 3 bit adder IC which was not available so we use 4-bit
adder ICs with two of its terminals shorted.
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Calculating the Sum using 4-bit Adders instead of 3-bit
Adders
Note: In the above figure we can suppose these 3-bit adders to be 4-bit adder with
two terminals of each IC shorted.
The rightmost 74181 component and its two associated 74283s implement bit
slice P7-4. The logic is cascaded with an identical block of components to implement
bit slice P11-8.
The above figure also includes the implementation of slice P15-12. The final slice is
formed from the partial product PP37-4, plus any carry-outs from lower-order sums.
We implement this using a 74181 component configured as an adder, with the B data
inputs set to 0, the A inputs set to the partial product, and the carry-in coming from the
adjacent adder block.
Putting the Pieces Together: The last step in the design combines the

5. An 8-Bit Multiplier
multiplier block with the accumulation block. To further improve the performance, the
carries between the 74181s can be replaced with a 74182 carry look-ahead unit.
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Complete circuit diagram of an 8-bit Multiplier
Package Count and Performance:
In terms of package count, the complete implementation uses four 4-bit
multipliers,(every multiplier requires 16 AND gates and three 4-bit adders) ,four 4-bit
adder IC’s 74283 packages, three 74181 arithmetic logic units, and one 74182 carry
look-ahead unit(optional). This is a total of 12 packages.

6. An 8-Bit Multiplier
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CONCLUSIONS
About The Current Circuit:
Here we looked at ways to use the 4-by-4 multiplier as a fundamental building
block to make 8 bit multiplier. The 8-by-8 multiplier we designed used a considerable
large amount of logic, much greater than if we had built the multiplier directly using
4-bit multiplier IC’s rather than using gates to build 4-bit multipliers building blocks.
Here we see that 4 bit multiplier, in conjunction with even more adders, can be used to
build multipliers of larger bit widths.
A much Easier Approach:
We could have done it quite easily if we just implement the 4-bit multiplier
circuit shown above to 8-bit multiplier. But in that case we would need 8-bit adders
IC’s which might be a problem so we have avoided that.

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References
[1]http://www2.elo.utfsm.cl/~lsb/elo211/aplicaciones/katz/chapter5/chapter05.doc6.ht
ml.
[2]http://www.datasheetarchive.com/5%20bit%20binary%20multiplier%20using%20a
dders-datasheet.html.
[3] http://lap2.epfl.ch/courses/archord1/labs/A_8bit_Sequential_Multiplier.pdf.
[4] https://wiki.engr.illinois.edu/download/attachments/84770821/09-
AdditionMultiplication.pdf?version=1&modificationDate=1254112213000.

8. An 8-Bit Multiplier
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Undertaking
We certify that project work titled “An 8-bit Multiplier” is our own work. Where
material has been used from other sources it has been properly acknowledged/referred.
Names Reg# Signatures
Muhammad Asad Nawaz 11-EE-57
Syed Mubeen Riaz 11-EE-153
Muhammad Sharjeel Hashmi 11-EE-159
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