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Atm.ppt
This document presents a mini project on designing an automated teller machine (ATM) controller. The objectives are to review literature on ATM controllers, design the architecture specifications, develop a Verilog model, and verify functionality through behavioral simulation and FPGA synthesis. Key components of the ATM controller include a card swiper, keypad, display, memory modules, and a state machine controlled transaction verification process. The controller will be modeled in Verilog and simulated using Modelsim, with the intended functionality verified through test cases.
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Atm.ppt
- 1. Mini Project Presentation Design of Automated Teller Machine Controller
- 2. Aim of theProject Design of Automated Teller Machine Controller
- 3. Objectives of theProject To review the literature for understanding the Automated Teller Machine Controller realization for RTL Modeling To arrive at the design specifications for architecture based on reviewed literature for intended application To design Verilog module for controller and perform behavioral simulation To Synthesis the design using the FPGA flow and perform implementation
- 4. Methods and Methodology Verilog model will be developed for selected architecture Functionality of the design will be verified using test bench in Modelsim Performance of the design with the required specifications will be compared Synthesis will be performed and the gate level net list will be generated using Xilinx
- 5. ABSTRACT In thegrowing technological world, people want their work to be very simple in order to save their time. As we know some new technology is becoming popular in banking sector, which is referred as ATMs. It makes the work of people as well as the banking sectors to be easy. ATMs help in providing money to the people nearer to the living area by saving their time so that it becoming very popular. In this work the development of a Moore machine state diagram of an ATM controller.
- 6. . The developeddesign will be modeled using Verilog HDL language which is a Hardware Description Language (HDL) used to describe a digital system. The verification of developed model will be made by identifying the suitable test cases in a test bench. The simulation will be carried out using Modelsim tool and the intended functionality can be verified with the help of its simulation results and also it can be synthesized using the Xilinx tool.
- 7. LANGUAGES USED ANDTOOLS VHDL/Verilog HDL TOOLS REQUIRED: MODELSIM – Simulation, Xilinx - Synthesis
- 9. Basically an ATM(Automated Teller Machine) is the combination of hardware and software. The hardware used is card swiper, keypad, display, etc. The software such as operating system controls this hardware’s. Now a day’s digital system is entered in replacing the software. An automated teller machine (ATM) is a computerized electronic device that helps the customers of a financial institution to access the financial transactions in a public place without any help from others. ATMs have moved away from custom hardware architectures using microcontrollers and/or application-specific integrated circuits to adopting a hardware architecture that is very similar to a personal computer.
- 10. Simple ATM Networking Bank Computer Host Computer ATM Telephone network Telephone network
- 11. ATM accesses thebank account through telephone networking, a host processor and a bank computer to verify the data. All the operations of ATM are in synchronization in reference to a common clock source. In case of any misconnection between the process steps, the whole transaction is rolled back to effect no change in the account status. The ATM Controllers are working on windows based operating systems, which also provide ease to designers for programming and modeling its operation. ATM controllers are sophisticated chip elements designed and programmed to make the transaction simple and user-friendly
- 12. Block Diagram ofATM Controller Control State Machine Signal Flow Data Flow CardScanned Card Swiper 4 CardNumber PIN 4 PIN Parser 4 Fund Checker Entered Amount Parser AccountNumber IPINcountCheck DepositSelected NOselection OverflowUnderflow enterWAmount TransactionValid CancelTransaction Key{0,1,C,E} Note : Clock and power from the common source is fed to all the blocks and modules. Key Pad MEMORY Display LUT (Look up Table) Card Information Storage Module Transaction Verifier 3 4 2 16 16 16 16 16 16 16 16 16 16 16 CardPIN AccountNum PINentered enterPin Key Ente red Key {0,1,C,E} Tran sacti onS elec ted Amo untE nter ed CheckStatus StoreAccNum LockStatus PINequality whichOption oldBalance AmountOut enterDAmount newBalance verify Req Write Lock ReqDone welcome Inva lidTr ansa ctio n anyt hing Else Key {E,W,C} Key {0,1} Keystroke codes C : Clear E : Enter W : Withdraw ATM Controller
- 13. To summarize theoperation, the ATM controller is activated on swipe of a card at the card swiper. It then checks its lock status and asks to enter the PIN only when unlocked. User has to enter the correct PIN within three trials, after which ATM corresponds with the memory to lock the account and no further transaction on the account is possible. On getting the PIN matched, user is asked for the option for the operation he wants to do. For both withdrawal and deposit, he is been provided with the current balance of the account and asked for the transaction amount.
- 14. General Flow OfATM Process
- 15. Flow-chart for Onesession
- 16. Flow Chart ForOne Transaction
- 17. Basic Block Diagramfor ATM Controller System
- 18. Card Information StorageModule
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- 24. Basic steps forsimulating a design in ModelSim
- 25. XILINX Implementation DesignFlpw Chart
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- 31. RTL Schematic OfBasic Input and Output
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