SlideShare a Scribd company logo
IOSR Journal of Electronics and Communication Engineering (IOSR-JECE)
e-ISSN: 2278-2834,p- ISSN: 2278-8735.Volume 10, Issue 2, Ver. IV (Mar - Apr.2015), PP 01-10
www.iosrjournals.org
DOI: 10.9790/2834-10240110 www.iosrjournals.org 1 | Page
Serial Communication Protocol Conversion and Circular Buffer
Implementation in FPGA using Verilog
Madhulika Sharma1
, Puneet Maheshwari2
, Pravin Fatnani2
, Preet Jain1
1
(Department of Electronics and Communication Engineering, Shri Vaishnav Institute of Technology and
Science, Indore, India)
2
(Accelerator Control Section, Raja Ramanna Centre for Advanced Technology, Indore, India)
Abstract: Raja Ramanna Centre for Advanced Technology (RRCAT) has two synchrotron radiation sources,
Indus-1 and Indus-2. Microtron is the common injector to both the machines. A new, FPGA based, control
system architecture is planned in which it supervises and monitors different subsystems present for the
operation of Microtron with the help of Equipment Control Modules (ECMs). At present some subsystems
communicate with operator console directly over RS232 interface such as the ‘Tesla Meter’ and the
‘Temperature Scanner’. For modularity, those subsystems must be brought over RS485 interface and with
unified pre-defined custom protocol for communication. In this paper monitoring of the Tesla Meter is
proposed. An ECM communicates with Tesla Meter over RS32 interface and with an operator console over
RS485 interface. Digital logic is designed in Verilog HDL and implemented in FPGA for RS232 and RS485
communication controllers, respectively. A protocol conversion unit between Tesla Meter and ECM is also
implemented. For more feature, there is a need to capture data and store it for offline data analysis. Therefore,
a circular buffer is also designed and simulated to review the history data from the ECM. The work has been
completed using ModelSim XE and Xilinx ISE 8.2i softwares.
Keywords: Buffer, FPGA, Protocol Conversion, RS232, RS485, Serial Communication
I. Introduction
In RRCAT, there is an injector “Microtron” which sends electron pulses to the Booster. In the new
control system architecture for the microtron, ECMs are used to supervise and monitor different sub-systems of
the Microtron. ECM communicates with the operator console over RS485 interface. The communication is done
in a custom predefined protocol. The ECM needs to be interfaced with various subsystems. All the subsystems
do not have the same interface and some of them communicate over RS232 serial interface directly with
operator console. “Tesla Meter” is one such subsystem (Fig. 1). For modularity, it is necessary to bring all
subsystems over RS485 interface therefore it is required to design a logic to communicate over RS232 & RS485
with their respective protocols and sent data from Tesla Meter to operator console over RS485 interface (Fig. 2).
The operator console may send a „history data‟ request to ECM for offline analysis and the ECM must
respond to this request in correct way. Therefore, a module is designed to have facility to write a data into
internal memory and read & send the data as and when required by the operator console in a proper format.
Fig. 1: Communication between Tesla Meter and Operator Console on RS232
Fig. 2: Communication between Tesla Meter and Operator Console on RS485
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 2 | Page
II. Communication Protocol
2.1 Protocol for Tesla Meter
Tesla Meter receives a single character „F‟ as a command and transmits „Magnetic field data‟ as
response. The ECM transmits 'F' and receives „F D0D1D2D3D4D5D6D7T‟, Dn represents nth character.
2.2 Protocol for Operator Console
Protocol for the communication between ECM and Operator Console is designed in the form of
Command –Acknowledge-Response frames. The ECM receives Command frame and transmits
Acknowledgement and Response frames in a predefined format as shown in Fig. 3, 4 and 5. The
acknowledgement can be positive or negative depending upon the checksum in the Command frame.
Fig. 3: Command Frame
Fig. 4: Acknowledgement Frame
Fig. 5: Response Frame
III. Controller and Conversion Unit
For the two serial communication interfaces the design is divided into three modules:
1. Controller for communication over RS232.
2. Controller for communication over RS485.
3. Inter protocol conversion unit
Other than the protocol conversion unit both the controllers have one transmitter and one receiver
control logic. The modules communicate at the baud rate of 19.2 kbps.
3.1 RS232 Transmitter
RS232 Transmitter transmits „F‟ every tens of milliseconds to the Tesla Meter. A counter is
implemented to define delays between two „F‟ characters. An internal register is used to store „F‟ and shift
registers to transmit „F‟.
Fig. 6: Flow chart of RS232 Transmitter
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 3 | Page
3.2 RS232 Receiver
RS232 Receiver receives the serial data from the Tesla Meter. The data consists of 11 characters which
are received one by one. A character reception is initiated by the bit transition from logic „1‟ to „0‟ on idle line
(logic „1‟). This logic „0‟ is a start bit which is sampled in the mid of the bit duration to validate its logic states.
On validation the next 8 bits from LSB to MSB are stored in an internal register followed by a stop bit at logic
„1‟. All the data bits are sampled at the mid of the bit duration. On receiving the correct stop bit, a „Character
Valid‟ signal is generated otherwise the character is discarded. The procedure is repeated for complete data from
the Tesla Meter and whole data is stored in an internal register. On storing the data, a „data valid‟ signal is
generated which is used by the protocol conversion unit to move from one unit to another.
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 4 | Page
Fig. 7: Flow Chart of RS232 Receiver
3.3 RS485 Receiver
On receiving the characters in the Command frame between Start Delimiter ($) and End Delimiter (*),
the ASCII equivalent of HEX character is converted into the corresponding HEX value. We validate the start of
frame with Start Delimiter '$' and terminate the reception on getting End Delimiter (*). The storage is done on
the verification of the destination address of the received frame. Frame integrity is done by checksum
calculation which is last 4 nibbles of sum of all the data values between „$‟ and „*‟ in hex format. The
„Command type‟ value is also extracted from the command frame for the RS485 Transmitter. This all is done
with the synchronization on baud rate clock generated inside the design.
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 5 | Page
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 6 | Page
Fig. 8: Flow Chart of RS485 Receiver
3.4 RS485 Transmitter
RS485 Transmitter has two important signals, the „data enable‟ and „Serial data out‟ signals. The
RS485 is a multi-drop interface in which many slaves can communicate with each other over a single bus. All
slaves can receive data simultaneously but only one slave can transmit data and all other must drive their
transmitter output in high impedance state. A „data enable‟ is generated within the module which is used to
enable different driver ICs whenever ECM is required to send the data over RS485 interface. An
Acknowledgement frame is sent when Command frame received is either correct or incorrect and a Response
frame is sent when Command frame received is correct. The Acknowledgement and Response frames are stored
in an internal register array. The Acknowledgement frame consists of various fields in which the address of the
source and destination, type of command and type of acknowledgement are given. The Response frame contains
address of the source and destination along with data from Tesla Meter and subsystem‟s status information.
Fig. 9: Flow Chart of RS485 Transmitter
4. RS232 to RS485 Protocol Converter
The Protocol Converter is fed by the RS232 Controller which inputs the Magnetic Field value. The
value is written into the temporary buffer of RS485 transmitter continuously till transmission from the RS485
Transmitter is not active.
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 7 | Page
Fig. 10: Flow Chart of RS232 to RS485 Protocol Converter
5. Circular Buffer
A circular buffer is defined as a data structure which has a fixed-size, single buffer connected end-to-
end. If the buffer is filled then the new data is written from the beginning and the old value has been
overwritten.
A circular buffer of a LIFO type is designed in which a clock of few tens of milliseconds is used to
write the data. The clock time period and number of locations decide the duration of data storage. On the
positive edge of the clock the data is written and on the negative edge of the clock the data is read. The control
of Read or Write operation is done by the generation of the read and write signal internally. Whenever Operator
Console sends a read data command, a read signal is generated which reads the whole buffer starting from the
current data location to last. Once „read‟ is complete, the buffer goes into write state as shown in the simulation
waveform (Fig. 16).
Fig. 11: Flow Chart of Circular Buffer
IV. Results
Table 1: Theoretical, Software Simulation and Practical Results
Theoretical Value
(duration)
Post Route
Simulation Value
(duration)
Practical Value
(duration)
Appearance of ASCII 'F' 26.70ms 26.70ms 26.40ms
Acknowledgement Frame of 240 bits 12.50ms 12.57ms 12.56ms
Response Frame of 280 bits 14.58ms 14.76ms 14.64ms
Acknowledgement &Response Frame of 520 bits 27.08ms 28.53ms 29.12ms
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 8 | Page
The Post route simulation waveforms are given in Fig. 12 to 16:
Fig. 12: Appearance of ASCII 'F' in every 26.70ms
Fig. 13: Acknowledgement Frame transmits in 12.57ms
Fig. 14: Response Frame transmits in 14.76ms
Fig. 15: Acknowledgement Frame followed by Response Frame in 28.53ms.
Fig. 16: Functional simulation of Circular Buffer
The Oscilloscope waveforms are given in Fig. 17 to 20.
Fig. 17: Appearance of ASCII 'F' in every 26.40ms
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 9 | Page
Fig. 18: Acknowledgement Frame transmits in 12.56ms
Fig. 19: Response Frame transmits in 14.64ms
Fig. 20: Acknowledgement Frame followed by Response Frame in 29.12ms
Analysis of the results is done by the comparison of theoretical, simulated and actual values. The
Table 1 shows the various numbers with some differences. The reason for the variation between theoretical and
simulated values is due to difference in the baud rate clock timings. The theoretical value of the Baud Clock is
19.20 kHz and simulation value is 19.17 kHz so that the duration of 1 bit of data would be 52.083µs and
52.160µs respectively. Other reasons can be propagation delays and measurement error. The actual results are
measured with time base in milliseconds. The measurement of microseconds are done with time base of few
milliseconds which itself can cause some deviation of results from simulated values. Although these deviations
are observed, the behaviour and functionality of the communication is not affected. The designed system is
successful in all the aspects of implementation
V. Conclusion
RS232 & RS485 controllers are designed, simulated and implemented in FPGA with the help of
Verilog HDL. The digital design for controllers is synthesized in terms of logic resource of the Spartan FPGA.
The modules are designed to work at a baud rate of 19.2 kbps. This is verified through implementation and
controllers are working successfully with Tesla Meter and Operator Console. It is noted that for complete
communication at RS485 interface, it takes around 60 ms from reception of command to the transmission of
response. This implies that data from 15 subsystems can be updated at this baud rate in 1s. Thus it may be
concluded that this protocol conversion is useful for Microtron like systems where data update rate is of the
order of a second and number of sub-systems are less than 15. The circular buffer is also designed and simulated
using ModelSim XE & Xilinx ISE 8.2i. The implementation part will be completed in the near future.
Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA ….
DOI: 10.9790/2834-10240110 www.iosrjournals.org 10 | Page
Reference
[1]. Puneet Maheshwari, Yogendra Sheth, Pravin Fatnani, C.P. Navathe. RRCAT, FPGA based Control System Hardware for
Microtron, DAE-BRNS Indian Particle Accelerator Conference, ©2013, Kolkata, West Bengal, India.
[2]. Jan Axelson, Serial port Complete COM ports, USB Virtual COM Ports, and Ports for Embedded Systems (Lakeview Research
LLC, 5310 Chinook Ln., Madison WI 53704, 2nd
edition, ©2007, Stockton, California).
[3]. Clive “Max” Maxfield, FPGAs World Class Designs (Newnes, 1st
edition, ©2009, Burlington, United States of America).
[4]. Samir Palnitkar, Verilog HDL A guide to Digital Design and Synthesis (SunSoft Press, 2nd
edition, ©2003, New Delhi, India).
[5]. Pong P. Chu, FPGA Pototyping by Verilog Examples Xilinx SpartanTM
-3 Version (Wiley A John Wiley & Sons, Inc., Publication,
1st
edition, ©2008, Hoboken, New Jersey, United States of America).
[6]. M. Morris Mano, Michael D. Ciletti, Digital Design with an Introduction to the Verilog HDL (Pearson, 5th
edition, ©2013, New
Jersey, United States of America).
[7]. http://www.asciitable.com/

More Related Content

What's hot

8096 microcontrollers notes
8096 microcontrollers notes8096 microcontrollers notes
8096 microcontrollers notes
Dr.YNM
 
Introduction to embedded systems
Introduction to embedded systemsIntroduction to embedded systems
Introduction to embedded systems
Игорь Медведев
 
Microprocess Microconroller mcq 1000+
Microprocess Microconroller mcq 1000+Microprocess Microconroller mcq 1000+
Microprocess Microconroller mcq 1000+
Kumaran K
 
Review on Transmission and Reception of Data through USB in VHDL
Review on Transmission and Reception of Data through USB in VHDLReview on Transmission and Reception of Data through USB in VHDL
Review on Transmission and Reception of Data through USB in VHDL
IRJET Journal
 
Microprocessor & Microcontoller short questions with answers
Microprocessor & Microcontoller short questions with answersMicroprocessor & Microcontoller short questions with answers
Microprocessor & Microcontoller short questions with answers
Mathankumar S
 
Serial Communication
Serial CommunicationSerial Communication
Serial Communication
UshaRani289
 
M.sc I-sem-8086 notes
M.sc  I-sem-8086 notesM.sc  I-sem-8086 notes
M.sc I-sem-8086 notes
Dr.YNM
 
Security Enhancement in Networked Embedded System
Security Enhancement in Networked Embedded System Security Enhancement in Networked Embedded System
Security Enhancement in Networked Embedded System
IJECEIAES
 
Unit 3 devices&buses
Unit 3 devices&busesUnit 3 devices&buses
Unit 3 devices&buses
Pavithra S
 
Bm36382385
Bm36382385Bm36382385
Bm36382385
IJERA Editor
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
IOSR Journals
 
Architectures of HDLC Controllers (A Study)
Architectures of HDLC Controllers (A Study)Architectures of HDLC Controllers (A Study)
Architectures of HDLC Controllers (A Study)
VIT-AP University
 
Serial Data Communication
Serial Data CommunicationSerial Data Communication
Serial Data Communication
Desty Rahayu
 
Pin diagram of 8085
Pin diagram of 8085Pin diagram of 8085
Pin diagram of 8085
ShivamSood22
 
Microprocessorandmicroconrollermcq3 121116120640-phpapp02
Microprocessorandmicroconrollermcq3 121116120640-phpapp02Microprocessorandmicroconrollermcq3 121116120640-phpapp02
Microprocessorandmicroconrollermcq3 121116120640-phpapp02
Yazeed Khalid
 

What's hot (15)

8096 microcontrollers notes
8096 microcontrollers notes8096 microcontrollers notes
8096 microcontrollers notes
 
Introduction to embedded systems
Introduction to embedded systemsIntroduction to embedded systems
Introduction to embedded systems
 
Microprocess Microconroller mcq 1000+
Microprocess Microconroller mcq 1000+Microprocess Microconroller mcq 1000+
Microprocess Microconroller mcq 1000+
 
Review on Transmission and Reception of Data through USB in VHDL
Review on Transmission and Reception of Data through USB in VHDLReview on Transmission and Reception of Data through USB in VHDL
Review on Transmission and Reception of Data through USB in VHDL
 
Microprocessor & Microcontoller short questions with answers
Microprocessor & Microcontoller short questions with answersMicroprocessor & Microcontoller short questions with answers
Microprocessor & Microcontoller short questions with answers
 
Serial Communication
Serial CommunicationSerial Communication
Serial Communication
 
M.sc I-sem-8086 notes
M.sc  I-sem-8086 notesM.sc  I-sem-8086 notes
M.sc I-sem-8086 notes
 
Security Enhancement in Networked Embedded System
Security Enhancement in Networked Embedded System Security Enhancement in Networked Embedded System
Security Enhancement in Networked Embedded System
 
Unit 3 devices&buses
Unit 3 devices&busesUnit 3 devices&buses
Unit 3 devices&buses
 
Bm36382385
Bm36382385Bm36382385
Bm36382385
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
 
Architectures of HDLC Controllers (A Study)
Architectures of HDLC Controllers (A Study)Architectures of HDLC Controllers (A Study)
Architectures of HDLC Controllers (A Study)
 
Serial Data Communication
Serial Data CommunicationSerial Data Communication
Serial Data Communication
 
Pin diagram of 8085
Pin diagram of 8085Pin diagram of 8085
Pin diagram of 8085
 
Microprocessorandmicroconrollermcq3 121116120640-phpapp02
Microprocessorandmicroconrollermcq3 121116120640-phpapp02Microprocessorandmicroconrollermcq3 121116120640-phpapp02
Microprocessorandmicroconrollermcq3 121116120640-phpapp02
 

Viewers also liked

A011130108
A011130108A011130108
A011130108
IOSR Journals
 
A Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc Network
A Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc NetworkA Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc Network
A Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc Network
IOSR Journals
 
B017410916
B017410916B017410916
B017410916
IOSR Journals
 
J011116571
J011116571J011116571
J011116571
IOSR Journals
 
F017143035
F017143035F017143035
F017143035
IOSR Journals
 
Review and Performance Comparison of Distributed Wireless Reprogramming Proto...
Review and Performance Comparison of Distributed Wireless Reprogramming Proto...Review and Performance Comparison of Distributed Wireless Reprogramming Proto...
Review and Performance Comparison of Distributed Wireless Reprogramming Proto...
IOSR Journals
 
Productive disciplinary engagement according to students’ school levels: a co...
Productive disciplinary engagement according to students’ school levels: a co...Productive disciplinary engagement according to students’ school levels: a co...
Productive disciplinary engagement according to students’ school levels: a co...
IOSR Journals
 
G017415465
G017415465G017415465
G017415465
IOSR Journals
 
E017233034
E017233034E017233034
E017233034
IOSR Journals
 
B017420915
B017420915B017420915
B017420915
IOSR Journals
 
K0815660
K0815660K0815660
K0815660
IOSR Journals
 
I017646188
I017646188I017646188
I017646188
IOSR Journals
 
Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.
Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.
Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.
IOSR Journals
 
G010345056
G010345056G010345056
G010345056
IOSR Journals
 
I017554954
I017554954I017554954
I017554954
IOSR Journals
 
C010341216
C010341216C010341216
C010341216
IOSR Journals
 
Design of Anti-collision Technique for RFID UHF Tag using Verilog
Design of Anti-collision Technique for RFID UHF Tag using VerilogDesign of Anti-collision Technique for RFID UHF Tag using Verilog
Design of Anti-collision Technique for RFID UHF Tag using Verilog
IOSR Journals
 
K010635566
K010635566K010635566
K010635566
IOSR Journals
 
A012250107
A012250107A012250107
A012250107
IOSR Journals
 
Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...
Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...
Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...
IOSR Journals
 

Viewers also liked (20)

A011130108
A011130108A011130108
A011130108
 
A Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc Network
A Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc NetworkA Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc Network
A Survey Paper on Cluster Head Selection Techniques for Mobile Ad-Hoc Network
 
B017410916
B017410916B017410916
B017410916
 
J011116571
J011116571J011116571
J011116571
 
F017143035
F017143035F017143035
F017143035
 
Review and Performance Comparison of Distributed Wireless Reprogramming Proto...
Review and Performance Comparison of Distributed Wireless Reprogramming Proto...Review and Performance Comparison of Distributed Wireless Reprogramming Proto...
Review and Performance Comparison of Distributed Wireless Reprogramming Proto...
 
Productive disciplinary engagement according to students’ school levels: a co...
Productive disciplinary engagement according to students’ school levels: a co...Productive disciplinary engagement according to students’ school levels: a co...
Productive disciplinary engagement according to students’ school levels: a co...
 
G017415465
G017415465G017415465
G017415465
 
E017233034
E017233034E017233034
E017233034
 
B017420915
B017420915B017420915
B017420915
 
K0815660
K0815660K0815660
K0815660
 
I017646188
I017646188I017646188
I017646188
 
Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.
Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.
Characteristic Comparison of U-Shaped Monopole and Complete Monopole Antenna.
 
G010345056
G010345056G010345056
G010345056
 
I017554954
I017554954I017554954
I017554954
 
C010341216
C010341216C010341216
C010341216
 
Design of Anti-collision Technique for RFID UHF Tag using Verilog
Design of Anti-collision Technique for RFID UHF Tag using VerilogDesign of Anti-collision Technique for RFID UHF Tag using Verilog
Design of Anti-collision Technique for RFID UHF Tag using Verilog
 
K010635566
K010635566K010635566
K010635566
 
A012250107
A012250107A012250107
A012250107
 
Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...
Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...
Recent Developments and Analysis of Electromagnetic Metamaterial with all of ...
 

Similar to A010240110

A010610109
A010610109A010610109
A010610109
IOSR Journals
 
Development of Distributed Mains Monitoring and Switching System for Indus Co...
Development of Distributed Mains Monitoring and Switching System for Indus Co...Development of Distributed Mains Monitoring and Switching System for Indus Co...
Development of Distributed Mains Monitoring and Switching System for Indus Co...
iosrjce
 
High speed customized serial protocol for IP integration on FPGA based SOC ap...
High speed customized serial protocol for IP integration on FPGA based SOC ap...High speed customized serial protocol for IP integration on FPGA based SOC ap...
High speed customized serial protocol for IP integration on FPGA based SOC ap...
IJMER
 
Robotic Project - published paper
Robotic Project - published paperRobotic Project - published paper
Robotic Project - published paper
Robert Rosier
 
Implementation of MIL-STD1553 using Microcontroller Atmega 328P
Implementation of MIL-STD1553 using Microcontroller Atmega 328PImplementation of MIL-STD1553 using Microcontroller Atmega 328P
Implementation of MIL-STD1553 using Microcontroller Atmega 328P
IRJET Journal
 
EXIDE PPT TEMPLATE.pptx
EXIDE PPT TEMPLATE.pptxEXIDE PPT TEMPLATE.pptx
EXIDE PPT TEMPLATE.pptx
NaveenK365392
 
Jy3717961800
Jy3717961800Jy3717961800
Jy3717961800
IJERA Editor
 
scada
scadascada
scada
edzam
 
Mobile robotic platform to gathering real time sensory data in wireless perso...
Mobile robotic platform to gathering real time sensory data in wireless perso...Mobile robotic platform to gathering real time sensory data in wireless perso...
Mobile robotic platform to gathering real time sensory data in wireless perso...
Alexander Decker
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
IOSR Journals
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
IOSR Journals
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
IOSR Journals
 
E010132736
E010132736E010132736
E010132736
IOSR Journals
 
Isa bus nptel
Isa bus nptelIsa bus nptel
Isa bus nptel
M.V Mahesh Vanamuthu
 
Serial Communication Interface with Error Detection
Serial Communication Interface with Error DetectionSerial Communication Interface with Error Detection
Serial Communication Interface with Error Detection
iosrjce
 
M010617376
M010617376M010617376
M010617376
IOSR Journals
 
avr-web-server
avr-web-serveravr-web-server
avr-web-server
Gustav Wiklander
 
Design &Implementation of I2C Master Controller Interfaced With RAM Using VHDL
Design &Implementation of I2C Master Controller Interfaced With RAM Using VHDLDesign &Implementation of I2C Master Controller Interfaced With RAM Using VHDL
Design &Implementation of I2C Master Controller Interfaced With RAM Using VHDL
IJERA Editor
 
Design and Verification of the UART and SPI protocol using UVM
Design and Verification of the UART and SPI protocol using UVMDesign and Verification of the UART and SPI protocol using UVM
Design and Verification of the UART and SPI protocol using UVM
IRJET Journal
 
Design and Implementation of a Stand-Alone Remote Terminal Unit
Design and Implementation of a Stand-Alone Remote Terminal UnitDesign and Implementation of a Stand-Alone Remote Terminal Unit
Design and Implementation of a Stand-Alone Remote Terminal Unit
IOSR Journals
 

Similar to A010240110 (20)

A010610109
A010610109A010610109
A010610109
 
Development of Distributed Mains Monitoring and Switching System for Indus Co...
Development of Distributed Mains Monitoring and Switching System for Indus Co...Development of Distributed Mains Monitoring and Switching System for Indus Co...
Development of Distributed Mains Monitoring and Switching System for Indus Co...
 
High speed customized serial protocol for IP integration on FPGA based SOC ap...
High speed customized serial protocol for IP integration on FPGA based SOC ap...High speed customized serial protocol for IP integration on FPGA based SOC ap...
High speed customized serial protocol for IP integration on FPGA based SOC ap...
 
Robotic Project - published paper
Robotic Project - published paperRobotic Project - published paper
Robotic Project - published paper
 
Implementation of MIL-STD1553 using Microcontroller Atmega 328P
Implementation of MIL-STD1553 using Microcontroller Atmega 328PImplementation of MIL-STD1553 using Microcontroller Atmega 328P
Implementation of MIL-STD1553 using Microcontroller Atmega 328P
 
EXIDE PPT TEMPLATE.pptx
EXIDE PPT TEMPLATE.pptxEXIDE PPT TEMPLATE.pptx
EXIDE PPT TEMPLATE.pptx
 
Jy3717961800
Jy3717961800Jy3717961800
Jy3717961800
 
scada
scadascada
scada
 
Mobile robotic platform to gathering real time sensory data in wireless perso...
Mobile robotic platform to gathering real time sensory data in wireless perso...Mobile robotic platform to gathering real time sensory data in wireless perso...
Mobile robotic platform to gathering real time sensory data in wireless perso...
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
 
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...Implementation of an Improved Microcontroller Based Moving Message Display Sy...
Implementation of an Improved Microcontroller Based Moving Message Display Sy...
 
E010132736
E010132736E010132736
E010132736
 
Isa bus nptel
Isa bus nptelIsa bus nptel
Isa bus nptel
 
Serial Communication Interface with Error Detection
Serial Communication Interface with Error DetectionSerial Communication Interface with Error Detection
Serial Communication Interface with Error Detection
 
M010617376
M010617376M010617376
M010617376
 
avr-web-server
avr-web-serveravr-web-server
avr-web-server
 
Design &Implementation of I2C Master Controller Interfaced With RAM Using VHDL
Design &Implementation of I2C Master Controller Interfaced With RAM Using VHDLDesign &Implementation of I2C Master Controller Interfaced With RAM Using VHDL
Design &Implementation of I2C Master Controller Interfaced With RAM Using VHDL
 
Design and Verification of the UART and SPI protocol using UVM
Design and Verification of the UART and SPI protocol using UVMDesign and Verification of the UART and SPI protocol using UVM
Design and Verification of the UART and SPI protocol using UVM
 
Design and Implementation of a Stand-Alone Remote Terminal Unit
Design and Implementation of a Stand-Alone Remote Terminal UnitDesign and Implementation of a Stand-Alone Remote Terminal Unit
Design and Implementation of a Stand-Alone Remote Terminal Unit
 

More from IOSR Journals

A011140104
A011140104A011140104
A011140104
IOSR Journals
 
M0111397100
M0111397100M0111397100
M0111397100
IOSR Journals
 
L011138596
L011138596L011138596
L011138596
IOSR Journals
 
K011138084
K011138084K011138084
K011138084
IOSR Journals
 
J011137479
J011137479J011137479
J011137479
IOSR Journals
 
I011136673
I011136673I011136673
I011136673
IOSR Journals
 
G011134454
G011134454G011134454
G011134454
IOSR Journals
 
H011135565
H011135565H011135565
H011135565
IOSR Journals
 
F011134043
F011134043F011134043
F011134043
IOSR Journals
 
E011133639
E011133639E011133639
E011133639
IOSR Journals
 
D011132635
D011132635D011132635
D011132635
IOSR Journals
 
C011131925
C011131925C011131925
C011131925
IOSR Journals
 
B011130918
B011130918B011130918
B011130918
IOSR Journals
 
I011125160
I011125160I011125160
I011125160
IOSR Journals
 
H011124050
H011124050H011124050
H011124050
IOSR Journals
 
G011123539
G011123539G011123539
G011123539
IOSR Journals
 
F011123134
F011123134F011123134
F011123134
IOSR Journals
 
E011122530
E011122530E011122530
E011122530
IOSR Journals
 
D011121524
D011121524D011121524
D011121524
IOSR Journals
 
C011121114
C011121114C011121114
C011121114
IOSR Journals
 

More from IOSR Journals (20)

A011140104
A011140104A011140104
A011140104
 
M0111397100
M0111397100M0111397100
M0111397100
 
L011138596
L011138596L011138596
L011138596
 
K011138084
K011138084K011138084
K011138084
 
J011137479
J011137479J011137479
J011137479
 
I011136673
I011136673I011136673
I011136673
 
G011134454
G011134454G011134454
G011134454
 
H011135565
H011135565H011135565
H011135565
 
F011134043
F011134043F011134043
F011134043
 
E011133639
E011133639E011133639
E011133639
 
D011132635
D011132635D011132635
D011132635
 
C011131925
C011131925C011131925
C011131925
 
B011130918
B011130918B011130918
B011130918
 
I011125160
I011125160I011125160
I011125160
 
H011124050
H011124050H011124050
H011124050
 
G011123539
G011123539G011123539
G011123539
 
F011123134
F011123134F011123134
F011123134
 
E011122530
E011122530E011122530
E011122530
 
D011121524
D011121524D011121524
D011121524
 
C011121114
C011121114C011121114
C011121114
 

Recently uploaded

Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
saastr
 
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with SlackLet's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
shyamraj55
 
Fueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte WebinarFueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte Webinar
Zilliz
 
National Security Agency - NSA mobile device best practices
National Security Agency - NSA mobile device best practicesNational Security Agency - NSA mobile device best practices
National Security Agency - NSA mobile device best practices
Quotidiano Piemontese
 
GraphRAG for Life Science to increase LLM accuracy
GraphRAG for Life Science to increase LLM accuracyGraphRAG for Life Science to increase LLM accuracy
GraphRAG for Life Science to increase LLM accuracy
Tomaz Bratanic
 
TrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy SurveyTrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy Survey
TrustArc
 
5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides
DanBrown980551
 
How to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptxHow to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptx
danishmna97
 
20240607 QFM018 Elixir Reading List May 2024
20240607 QFM018 Elixir Reading List May 202420240607 QFM018 Elixir Reading List May 2024
20240607 QFM018 Elixir Reading List May 2024
Matthew Sinclair
 
GenAI Pilot Implementation in the organizations
GenAI Pilot Implementation in the organizationsGenAI Pilot Implementation in the organizations
GenAI Pilot Implementation in the organizations
kumardaparthi1024
 
Project Management Semester Long Project - Acuity
Project Management Semester Long Project - AcuityProject Management Semester Long Project - Acuity
Project Management Semester Long Project - Acuity
jpupo2018
 
Mariano G Tinti - Decoding SpaceX
Mariano G Tinti - Decoding SpaceXMariano G Tinti - Decoding SpaceX
Mariano G Tinti - Decoding SpaceX
Mariano Tinti
 
Presentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of GermanyPresentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of Germany
innovationoecd
 
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Speck&Tech
 
Ocean lotus Threat actors project by John Sitima 2024 (1).pptx
Ocean lotus Threat actors project by John Sitima 2024 (1).pptxOcean lotus Threat actors project by John Sitima 2024 (1).pptx
Ocean lotus Threat actors project by John Sitima 2024 (1).pptx
SitimaJohn
 
Introduction of Cybersecurity with OSS at Code Europe 2024
Introduction of Cybersecurity with OSS  at Code Europe 2024Introduction of Cybersecurity with OSS  at Code Europe 2024
Introduction of Cybersecurity with OSS at Code Europe 2024
Hiroshi SHIBATA
 
Programming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup SlidesProgramming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup Slides
Zilliz
 
Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...
Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...
Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...
Jeffrey Haguewood
 
AI 101: An Introduction to the Basics and Impact of Artificial Intelligence
AI 101: An Introduction to the Basics and Impact of Artificial IntelligenceAI 101: An Introduction to the Basics and Impact of Artificial Intelligence
AI 101: An Introduction to the Basics and Impact of Artificial Intelligence
IndexBug
 
OpenID AuthZEN Interop Read Out - Authorization
OpenID AuthZEN Interop Read Out - AuthorizationOpenID AuthZEN Interop Read Out - Authorization
OpenID AuthZEN Interop Read Out - Authorization
David Brossard
 

Recently uploaded (20)

Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
Deep Dive: AI-Powered Marketing to Get More Leads and Customers with HyperGro...
 
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with SlackLet's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
Let's Integrate MuleSoft RPA, COMPOSER, APM with AWS IDP along with Slack
 
Fueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte WebinarFueling AI with Great Data with Airbyte Webinar
Fueling AI with Great Data with Airbyte Webinar
 
National Security Agency - NSA mobile device best practices
National Security Agency - NSA mobile device best practicesNational Security Agency - NSA mobile device best practices
National Security Agency - NSA mobile device best practices
 
GraphRAG for Life Science to increase LLM accuracy
GraphRAG for Life Science to increase LLM accuracyGraphRAG for Life Science to increase LLM accuracy
GraphRAG for Life Science to increase LLM accuracy
 
TrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy SurveyTrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy Survey
 
5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides5th LF Energy Power Grid Model Meet-up Slides
5th LF Energy Power Grid Model Meet-up Slides
 
How to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptxHow to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptx
 
20240607 QFM018 Elixir Reading List May 2024
20240607 QFM018 Elixir Reading List May 202420240607 QFM018 Elixir Reading List May 2024
20240607 QFM018 Elixir Reading List May 2024
 
GenAI Pilot Implementation in the organizations
GenAI Pilot Implementation in the organizationsGenAI Pilot Implementation in the organizations
GenAI Pilot Implementation in the organizations
 
Project Management Semester Long Project - Acuity
Project Management Semester Long Project - AcuityProject Management Semester Long Project - Acuity
Project Management Semester Long Project - Acuity
 
Mariano G Tinti - Decoding SpaceX
Mariano G Tinti - Decoding SpaceXMariano G Tinti - Decoding SpaceX
Mariano G Tinti - Decoding SpaceX
 
Presentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of GermanyPresentation of the OECD Artificial Intelligence Review of Germany
Presentation of the OECD Artificial Intelligence Review of Germany
 
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
 
Ocean lotus Threat actors project by John Sitima 2024 (1).pptx
Ocean lotus Threat actors project by John Sitima 2024 (1).pptxOcean lotus Threat actors project by John Sitima 2024 (1).pptx
Ocean lotus Threat actors project by John Sitima 2024 (1).pptx
 
Introduction of Cybersecurity with OSS at Code Europe 2024
Introduction of Cybersecurity with OSS  at Code Europe 2024Introduction of Cybersecurity with OSS  at Code Europe 2024
Introduction of Cybersecurity with OSS at Code Europe 2024
 
Programming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup SlidesProgramming Foundation Models with DSPy - Meetup Slides
Programming Foundation Models with DSPy - Meetup Slides
 
Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...
Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...
Salesforce Integration for Bonterra Impact Management (fka Social Solutions A...
 
AI 101: An Introduction to the Basics and Impact of Artificial Intelligence
AI 101: An Introduction to the Basics and Impact of Artificial IntelligenceAI 101: An Introduction to the Basics and Impact of Artificial Intelligence
AI 101: An Introduction to the Basics and Impact of Artificial Intelligence
 
OpenID AuthZEN Interop Read Out - Authorization
OpenID AuthZEN Interop Read Out - AuthorizationOpenID AuthZEN Interop Read Out - Authorization
OpenID AuthZEN Interop Read Out - Authorization
 

A010240110

  • 1. IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-ISSN: 2278-2834,p- ISSN: 2278-8735.Volume 10, Issue 2, Ver. IV (Mar - Apr.2015), PP 01-10 www.iosrjournals.org DOI: 10.9790/2834-10240110 www.iosrjournals.org 1 | Page Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA using Verilog Madhulika Sharma1 , Puneet Maheshwari2 , Pravin Fatnani2 , Preet Jain1 1 (Department of Electronics and Communication Engineering, Shri Vaishnav Institute of Technology and Science, Indore, India) 2 (Accelerator Control Section, Raja Ramanna Centre for Advanced Technology, Indore, India) Abstract: Raja Ramanna Centre for Advanced Technology (RRCAT) has two synchrotron radiation sources, Indus-1 and Indus-2. Microtron is the common injector to both the machines. A new, FPGA based, control system architecture is planned in which it supervises and monitors different subsystems present for the operation of Microtron with the help of Equipment Control Modules (ECMs). At present some subsystems communicate with operator console directly over RS232 interface such as the ‘Tesla Meter’ and the ‘Temperature Scanner’. For modularity, those subsystems must be brought over RS485 interface and with unified pre-defined custom protocol for communication. In this paper monitoring of the Tesla Meter is proposed. An ECM communicates with Tesla Meter over RS32 interface and with an operator console over RS485 interface. Digital logic is designed in Verilog HDL and implemented in FPGA for RS232 and RS485 communication controllers, respectively. A protocol conversion unit between Tesla Meter and ECM is also implemented. For more feature, there is a need to capture data and store it for offline data analysis. Therefore, a circular buffer is also designed and simulated to review the history data from the ECM. The work has been completed using ModelSim XE and Xilinx ISE 8.2i softwares. Keywords: Buffer, FPGA, Protocol Conversion, RS232, RS485, Serial Communication I. Introduction In RRCAT, there is an injector “Microtron” which sends electron pulses to the Booster. In the new control system architecture for the microtron, ECMs are used to supervise and monitor different sub-systems of the Microtron. ECM communicates with the operator console over RS485 interface. The communication is done in a custom predefined protocol. The ECM needs to be interfaced with various subsystems. All the subsystems do not have the same interface and some of them communicate over RS232 serial interface directly with operator console. “Tesla Meter” is one such subsystem (Fig. 1). For modularity, it is necessary to bring all subsystems over RS485 interface therefore it is required to design a logic to communicate over RS232 & RS485 with their respective protocols and sent data from Tesla Meter to operator console over RS485 interface (Fig. 2). The operator console may send a „history data‟ request to ECM for offline analysis and the ECM must respond to this request in correct way. Therefore, a module is designed to have facility to write a data into internal memory and read & send the data as and when required by the operator console in a proper format. Fig. 1: Communication between Tesla Meter and Operator Console on RS232 Fig. 2: Communication between Tesla Meter and Operator Console on RS485
  • 2. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 2 | Page II. Communication Protocol 2.1 Protocol for Tesla Meter Tesla Meter receives a single character „F‟ as a command and transmits „Magnetic field data‟ as response. The ECM transmits 'F' and receives „F D0D1D2D3D4D5D6D7T‟, Dn represents nth character. 2.2 Protocol for Operator Console Protocol for the communication between ECM and Operator Console is designed in the form of Command –Acknowledge-Response frames. The ECM receives Command frame and transmits Acknowledgement and Response frames in a predefined format as shown in Fig. 3, 4 and 5. The acknowledgement can be positive or negative depending upon the checksum in the Command frame. Fig. 3: Command Frame Fig. 4: Acknowledgement Frame Fig. 5: Response Frame III. Controller and Conversion Unit For the two serial communication interfaces the design is divided into three modules: 1. Controller for communication over RS232. 2. Controller for communication over RS485. 3. Inter protocol conversion unit Other than the protocol conversion unit both the controllers have one transmitter and one receiver control logic. The modules communicate at the baud rate of 19.2 kbps. 3.1 RS232 Transmitter RS232 Transmitter transmits „F‟ every tens of milliseconds to the Tesla Meter. A counter is implemented to define delays between two „F‟ characters. An internal register is used to store „F‟ and shift registers to transmit „F‟. Fig. 6: Flow chart of RS232 Transmitter
  • 3. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 3 | Page 3.2 RS232 Receiver RS232 Receiver receives the serial data from the Tesla Meter. The data consists of 11 characters which are received one by one. A character reception is initiated by the bit transition from logic „1‟ to „0‟ on idle line (logic „1‟). This logic „0‟ is a start bit which is sampled in the mid of the bit duration to validate its logic states. On validation the next 8 bits from LSB to MSB are stored in an internal register followed by a stop bit at logic „1‟. All the data bits are sampled at the mid of the bit duration. On receiving the correct stop bit, a „Character Valid‟ signal is generated otherwise the character is discarded. The procedure is repeated for complete data from the Tesla Meter and whole data is stored in an internal register. On storing the data, a „data valid‟ signal is generated which is used by the protocol conversion unit to move from one unit to another.
  • 4. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 4 | Page Fig. 7: Flow Chart of RS232 Receiver 3.3 RS485 Receiver On receiving the characters in the Command frame between Start Delimiter ($) and End Delimiter (*), the ASCII equivalent of HEX character is converted into the corresponding HEX value. We validate the start of frame with Start Delimiter '$' and terminate the reception on getting End Delimiter (*). The storage is done on the verification of the destination address of the received frame. Frame integrity is done by checksum calculation which is last 4 nibbles of sum of all the data values between „$‟ and „*‟ in hex format. The „Command type‟ value is also extracted from the command frame for the RS485 Transmitter. This all is done with the synchronization on baud rate clock generated inside the design.
  • 5. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 5 | Page
  • 6. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 6 | Page Fig. 8: Flow Chart of RS485 Receiver 3.4 RS485 Transmitter RS485 Transmitter has two important signals, the „data enable‟ and „Serial data out‟ signals. The RS485 is a multi-drop interface in which many slaves can communicate with each other over a single bus. All slaves can receive data simultaneously but only one slave can transmit data and all other must drive their transmitter output in high impedance state. A „data enable‟ is generated within the module which is used to enable different driver ICs whenever ECM is required to send the data over RS485 interface. An Acknowledgement frame is sent when Command frame received is either correct or incorrect and a Response frame is sent when Command frame received is correct. The Acknowledgement and Response frames are stored in an internal register array. The Acknowledgement frame consists of various fields in which the address of the source and destination, type of command and type of acknowledgement are given. The Response frame contains address of the source and destination along with data from Tesla Meter and subsystem‟s status information. Fig. 9: Flow Chart of RS485 Transmitter 4. RS232 to RS485 Protocol Converter The Protocol Converter is fed by the RS232 Controller which inputs the Magnetic Field value. The value is written into the temporary buffer of RS485 transmitter continuously till transmission from the RS485 Transmitter is not active.
  • 7. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 7 | Page Fig. 10: Flow Chart of RS232 to RS485 Protocol Converter 5. Circular Buffer A circular buffer is defined as a data structure which has a fixed-size, single buffer connected end-to- end. If the buffer is filled then the new data is written from the beginning and the old value has been overwritten. A circular buffer of a LIFO type is designed in which a clock of few tens of milliseconds is used to write the data. The clock time period and number of locations decide the duration of data storage. On the positive edge of the clock the data is written and on the negative edge of the clock the data is read. The control of Read or Write operation is done by the generation of the read and write signal internally. Whenever Operator Console sends a read data command, a read signal is generated which reads the whole buffer starting from the current data location to last. Once „read‟ is complete, the buffer goes into write state as shown in the simulation waveform (Fig. 16). Fig. 11: Flow Chart of Circular Buffer IV. Results Table 1: Theoretical, Software Simulation and Practical Results Theoretical Value (duration) Post Route Simulation Value (duration) Practical Value (duration) Appearance of ASCII 'F' 26.70ms 26.70ms 26.40ms Acknowledgement Frame of 240 bits 12.50ms 12.57ms 12.56ms Response Frame of 280 bits 14.58ms 14.76ms 14.64ms Acknowledgement &Response Frame of 520 bits 27.08ms 28.53ms 29.12ms
  • 8. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 8 | Page The Post route simulation waveforms are given in Fig. 12 to 16: Fig. 12: Appearance of ASCII 'F' in every 26.70ms Fig. 13: Acknowledgement Frame transmits in 12.57ms Fig. 14: Response Frame transmits in 14.76ms Fig. 15: Acknowledgement Frame followed by Response Frame in 28.53ms. Fig. 16: Functional simulation of Circular Buffer The Oscilloscope waveforms are given in Fig. 17 to 20. Fig. 17: Appearance of ASCII 'F' in every 26.40ms
  • 9. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 9 | Page Fig. 18: Acknowledgement Frame transmits in 12.56ms Fig. 19: Response Frame transmits in 14.64ms Fig. 20: Acknowledgement Frame followed by Response Frame in 29.12ms Analysis of the results is done by the comparison of theoretical, simulated and actual values. The Table 1 shows the various numbers with some differences. The reason for the variation between theoretical and simulated values is due to difference in the baud rate clock timings. The theoretical value of the Baud Clock is 19.20 kHz and simulation value is 19.17 kHz so that the duration of 1 bit of data would be 52.083µs and 52.160µs respectively. Other reasons can be propagation delays and measurement error. The actual results are measured with time base in milliseconds. The measurement of microseconds are done with time base of few milliseconds which itself can cause some deviation of results from simulated values. Although these deviations are observed, the behaviour and functionality of the communication is not affected. The designed system is successful in all the aspects of implementation V. Conclusion RS232 & RS485 controllers are designed, simulated and implemented in FPGA with the help of Verilog HDL. The digital design for controllers is synthesized in terms of logic resource of the Spartan FPGA. The modules are designed to work at a baud rate of 19.2 kbps. This is verified through implementation and controllers are working successfully with Tesla Meter and Operator Console. It is noted that for complete communication at RS485 interface, it takes around 60 ms from reception of command to the transmission of response. This implies that data from 15 subsystems can be updated at this baud rate in 1s. Thus it may be concluded that this protocol conversion is useful for Microtron like systems where data update rate is of the order of a second and number of sub-systems are less than 15. The circular buffer is also designed and simulated using ModelSim XE & Xilinx ISE 8.2i. The implementation part will be completed in the near future.
  • 10. Serial Communication Protocol Conversion and Circular Buffer Implementation in FPGA …. DOI: 10.9790/2834-10240110 www.iosrjournals.org 10 | Page Reference [1]. Puneet Maheshwari, Yogendra Sheth, Pravin Fatnani, C.P. Navathe. RRCAT, FPGA based Control System Hardware for Microtron, DAE-BRNS Indian Particle Accelerator Conference, ©2013, Kolkata, West Bengal, India. [2]. Jan Axelson, Serial port Complete COM ports, USB Virtual COM Ports, and Ports for Embedded Systems (Lakeview Research LLC, 5310 Chinook Ln., Madison WI 53704, 2nd edition, ©2007, Stockton, California). [3]. Clive “Max” Maxfield, FPGAs World Class Designs (Newnes, 1st edition, ©2009, Burlington, United States of America). [4]. Samir Palnitkar, Verilog HDL A guide to Digital Design and Synthesis (SunSoft Press, 2nd edition, ©2003, New Delhi, India). [5]. Pong P. Chu, FPGA Pototyping by Verilog Examples Xilinx SpartanTM -3 Version (Wiley A John Wiley & Sons, Inc., Publication, 1st edition, ©2008, Hoboken, New Jersey, United States of America). [6]. M. Morris Mano, Michael D. Ciletti, Digital Design with an Introduction to the Verilog HDL (Pearson, 5th edition, ©2013, New Jersey, United States of America). [7]. http://www.asciitable.com/