Computer System Architecture Lecture Note 7

1. CSC 203 1.5
Computer System Architecture
Budditha Hettige
Department of Statistics and Computer Science
University of Sri Jayewardenepura

2. Addressing
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3. Addressing
• Subject of specifying where the operands
(addresses) are
– ADD instruction requires 2 or 3 operands, and
instruction must tell where to find operands and
where to put result
• Addressing Modes
– Methods of interpreting the bits of an address field
to find operand
• Immediate Addressing
• Direct Addressing
• Register Addressing
• Register Indirect Addressing
• Indexed Addressing
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4. Immediate Addressing
• Simplest way to specify where the operand is
• Address part of instruction contains operand itself
(immediate operand)
• Operand is automatically fetched from memory at
the same time the instruction it self is fetched
– Immediately available for use
• No additional memory references are required
• Disadvantages
– only a constant can be supplied
– value of the constant is limited by size of address field
• Good for specifying small integers
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5. Example
Immediate Addressing
MOV R1, #8 ; Reg[R1]  8
ADD R2R2, #3 ; Reg[R2]  Reg[R2] + 3
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6. Direct Addressing
• Operand is in memory, and is specified by giving
its full address (memory address is hardwired into
instruction)
• Instruction will always access exactly same
memory location, which cannot change
• Can only be used for global variables who
address is known at compile time
• Example Instruction:
– ADD R1, R1(1001) ; Reg[R1]  Reg[R1] +Mem[1001]
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7. Direct Addressing Example
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8. Register Addressing
• Same as direct addressing with the exception that it
specifies a register instead of memory location
• Most common addressing mode on most computers
since register accesses are very fast
• Compilers try to put most commonly accessed
variables in registers
• Cannot be used only in LOAD and STORE instructions
(one operand in is always a memory address)
• Example instruction:
– ADD R3, R4 ; Reg[R3]  Reg[R3] + Reg[R4]
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9. Register Indirect Addressing
• Operand being specified comes from memory or goes
to memory
• Its address is not hardwired into instruction, but is
contained in a register (pointer)
• Can reference memory without having full memory
address in the instruction
• Different memory words can be used on different
executions of the instruction
• Example instruction:
– ADD R1,R1(R2) ; Reg[R1]  Reg[R1] +
Mem[Reg[R2]]
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10. Example
• Following generic assembly program calculates the
sum of elements (1024) of an array A of integers of 4
bytes each, and stores result in register R1
– MOV R1, #0 ; sum in R1 (0 initially)
– MOV R2, #A ; Reg[R2] = address of array A
– MOV R3, #A+4096 ; Reg[R3] = address of first word
beyond A
– LOOP: ADD R1, (R2) ; register indirect via R2 to get
operand
– ADD R2, #4 ; increment R2 by one word
– CMP R2, R3 ; is R2 < R3?
– BLT LOOP ; loop if R2 < R3
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11. Indexed Addressing
• Memory is addressed by giving a register plus
a constant offset
• Used to access local variables
• Example instruction:
– ADD R3, 100(R2)
; Reg[R3]  Reg[R3] + Mem[100+Reg[R2]]
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12. Based-Indexed Addressing
• Memory address is computed by adding
up two registers plus an optional offset
• Example instruction:
ADD R3, (R1+R2)
;Reg[R3]  Reg[R3] + Mem[Reg[R1] +
Reg[R2]]
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13. Instruction Types
• ISA level instructions are divided into few
categories
– Data Movement Instructions
• Copy data from one location to another
– Examples (Pentium II integer instructions):
• MOV DST, SRC – copies SRC (source) to DST
(destination)
• PUSH SRC – push SRC into the stack
• XCHG DS1, DS2 – exchanges DS1 and DS2
• CMOV DST, SRC – conditional move
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14. Instruction Types contd..
– Dyadic Operations
• Combine two operands to produce a result (arithmetic
instructions, Boolean instructions)
– Examples (Pentium II integer instructions):
• ADD DST, SRC – adds SRC to DST, puts result in
DST
• SUB DST, SRC – subtracts DST from SRC
• AND DST, SRC – Boolean AND SRC into DST
• OR DST, SRC - Boolean OR SRC into DST
• XOR DST,DST SRC – Boolean Exclusive OR to DST
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15. Instruction Types contd..
• Monadic Operations
– Have one operand and produce one result
– Shorter than dyadic instructions
• Examples (Pentium II integer
instructions):
– INC DST – adds 1 to DST
– DEC DST – subtracts 1 from DST
– NOT DST – replace DST with 1’s
complement
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16. Instruction Types contd..
• Comparison and Conditional Branch
Instructions
• Examples (Pentium II integer
instructions):
– TST SRC1, SRC2 – Boolean AND operands, set flags
(EFLAGS)
– CMP SRC1, SRC2 – sets flags based on SRC1-SRC2
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17. Instruction Types contd..
• Procedure (Subroutine) call Instructions
– When the procedure has finished its task,
transfer is returned to statement after the call
• Examples (Pentium II integer instructions):
– CALL ADDR -Calls procedure at ADDR
– RET - Returns from procedure
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18. Instruction Types contd..
• Loop Control Instructions
– LOOPxx – loops until condition is met
• Input / Output Instructions
There are several input/output schemes
currently used in personal computers
– Programmed I/O with busy waiting
– Interrupt-driven I/O
– DMA (Direct Memory Access) I/O
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19. Programmed I/O with busy waiting
• Simplest I/O method
• Commonly used in low-end processors
• Processors have a single input instruction and a
single output instruction, and each of them selects
one of the I/O devices
• A single character is transferred between a fixed
register in the processor and selected I/O device
• Processor must execute an explicit sequence of
instructions for each and every character read or
written
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20. DMA I/O
• DMA controller is a chip that has a direct
access to the bus
• It consists of at least four registers, each
can be loaded by software.
– Register 1 contains memory address to be
read/written
– Register 2 contains the count of how many
bytes / words to be transferred
– Register 3 specifies the device number or I/O
space address to use
– Register 4 indicates whether data are to be read
from or written to I/O device
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21. Structure of a DMA
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22. Registers in the DMA
• Status register: readable by the CPU to determine the status of
the DMA device (idle, busy, etc)
• Command register: writable by the CPU to issue a command to
the DMA
• Data register: readable and writable. It is the buffering place for
data that is being transferred between the memory and the IO
device.
• Address register: contains the starting location of memory
where from or where to the data will be transferred. The Address
register must be programmed by the CPU before issuing a "start"
command to the DMA.
• Count register: contains the number of bytes that need to be
transferred. The information in the address and the count register
combined will specify exactly what information need to be
transferred.
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23. Example
• Writing a block of 32 bytes from memory
address 100 to a terminal device (4)
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24. Example contd..
• CPU writes numbers 32, 100, and 4 into first three
DMA registers, and writes the code for WRITE (1, for
example) in the fourth register
• DMA controller makes a bus request to read byte 100
from memory
• DMA controller makes an I/O request to device 4 to
write the byte to it
• DMA controller increments its address register by 1
and decrements its count register by 1
• If the count register is > 0, another byte is read from
memory and then written to device
• DMA controller stops transferring data when count = 0
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25. Sample Questions
Q1.
1. Explain the processor architecture of 8086.
2. What are differences in Intel Pentium
Processor and dual core processor.
3. What are the advantages and disadvantage of
the multi-core processors
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26. Sample Questions
Q2.
1. What is addressing.
2. Comparing advantages, disadvantages
and features briefly explain each
addressing modes.
3. What is DMA and why it useful for
Programming?. Explain your answer
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