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Chapter 2
8085 Microprocessor and 8051
Microcontroller
Microprocessor Architecture
• The microprocessor can be programmed to
perform functions on given data by writing
specific instructions into its memory.
– The microprocessor reads one instruction at a
time, matches it with its instruction set, and
performs the data manipulation specified.
– The result is either stored back into memory or
displayed on an output device.
2
The 8085 Architecture
• The 8085 uses three separate busses to
perform its operations
– The address bus.
– The data bus.
– The control bus.
3
4
The Address Bus
– 16 bits wide (A0 A1…A15)
• Therefore, the 8085 can access locations with numbers from
0 to 65,536. Or, the 8085 can access a total of 64K addresses.
– “Unidirectional”.
• Information flows out of the microprocessor and into the
memory or peripherals.
– When the 8085 wants to access a peripheral or a
memory location, it places the 16-bit address on the
address bus and then sends the appropriate control
signals.
5
The Data Bus
– 8 bits wide (D0 D1…D7)
– “Bi-directional”.
• Information flows both ways between the
microprocessor and memory or I/O.
– The 8085 uses the data bus to transfer the binary
information.
– Since the data bus has 8-bits only, then the 8085
can manipulate data 8 bits at-a-time only.
6
The Control Bus
– There is no real control bus. Instead, the control
bus is made up of a number of single bit control
signals.
7
Operation Types in a Microprocessor
• All of the operations of the microprocessor
can be classified into one of three types:
- Microprocessor-Initiated Operations
- Internal Operations
- Peripheral-Initiated Operations
8
Microprocessor-Initiated Operations
• These are operations that the microprocessor
itself starts.
• These are usually one of 4 operations:
– Memory Read
– Memory Write
– I/O Read (Get data from an input device)
– I/O write (Send data to an output device)
9
Microprocessor-Initiated Operations
• It is important to note that the microprocessor treats
memory and I/O devices the same way.
– Input and output devices simply look like memory
locations to the microprocessor.
• For example, the keyboard may look like memory address A3F2H.
To get what key is being pressed, the microprocessor simply reads
the data at location A3F2H.
– The communication process between the microprocessor
and peripheral devices consist of the following three steps:
– Identify the address.
– Transfer the binary information.
– Provide the right timing signals.
10
The Read Operation
– To read the contents of a memory location, the
following steps take place:
• The microprocessor places the 16-bit address of the
memory location on the address bus.
• The microprocessor activates a control signal called
“memory read” which enables the memory chip.
• The memory decodes the address and identifies the
right location.
• The memory places the contents on the data bus.
• The microprocessor reads the value of the data bus
after a certain amount of time.
11
Internal Data Operations
• The 8085 can perform a number of internal
operations. Such as: storing data, Arithmetic &
Logic operations, Testing for condition, etc.
– To perform these operations, the microprocessor
needs an internal architecture similar to the
following:
12
Accumulator Flags
B C
D E
H L
Program Counter
Stack Pointer
Data
Address 8
16
• Registers
Six general purpose registers used to store 8-bit data
during a program execution
The registers are identified as B, C, D, E, H, and L
They can be combined as register pairs: BC, DE, and HL to
perform 16-bit operations
• Accumulator
8-bit register that is part of the ALU
Used to store 8-bit data and in performing 8-bit
arithmetic and logical operations, and in storing the
results op operations
13
The Internal Architecture
• The Program Counter (PC)
– This is a register that is used to control the
sequencing of the execution of instructions.
– This register always holds the address of the next
instruction.
– Since it holds an address, it must be 16 bits wide.
14
The Internal Architecture
• The Stack pointer
– The stack pointer is also a 16-bit register that is
used to point into memory.
– The memory this register points to is a special
area called the stack.
– The stack is an area of memory used to hold data
that will be retreived soon.
– The stack is usually accessed in a Last In First Out
(LIFO) fashion.
15
Externally-Initiated Operations
• External devices can initiate (start) one of the 4
following operations:
– Reset
• All operations are stopped and the program counter is reset
to 0000.
– Interrupt
• The microprocessor’s operations are interrupted and the
microprocessor executes what is called a “service routine”.
• This routine “handles” the interrupt, (perform the necessary
operations). Then the microprocessor returns to its previous
operations and continues.
16
Externally-Initiated Operations
– Ready
• The 8085 has a pin called RDY. This pin is used by external
devices to stop the 8085 until they catch up.
• As long as the RDY pin is low, the 8085 will be in a wait state.
– Hold
• The 8085 has a pin called HOLD. This pin is used by external
devices to gain control of the busses.
• When the HOLD signal is activated by an external device, the
8085 stops executing instructions and stops using the
busses.
• This would allow external devices to control the information
on the busses. Example DMA.
17
8085 Pin Configuraation
• 40 Pins.
• Address Bus A15 – A8 (8 Pins)
• Data Bus AD7 – AD0 (8 Pins)
• Control and Status Signals (6 Pins)
• Power supply and clock frequency (5 Pins)
• Externally initiated signals (11 Pins)
• Serial I/O Ports (2 Pins)
18
19
Addressing Modes
• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack
20
Immediate Addressing
• Operand is part of instruction
• Operand = address field
• e.g. ADD 5
– Add 5 to contents of accumulator
– 5 is operand
• No memory reference to fetch data
• Fast
• Limited range
21
Immediate Addressing Diagram
Operand
Opcode
Instruction
22
Direct Addressing
• Address field contains address of operand
• Effective address (EA) = address field (A)
• e.g. ADD A
– Add contents of cell A to accumulator
– Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out
effective address
• Limited address space 23
Direct Addressing Diagram
Address A
Opcode
Instruction
Memory
Operand
24
Indirect Addressing (1)
• Memory cell pointed to by address field
contains the address of (pointer to) the
operand
• EA = (A)
– Look in A, find address (A) and look there for
operand
• e.g. ADD (A)
– Add contents of cell pointed to by contents of A to
accumulator
25
Indirect Addressing (2)
• Large address space
• 2n where n = word length
• May be nested, multilevel, cascaded
– e.g. EA = (((A)))
• Draw the diagram yourself
• Multiple memory accesses to find operand
• Hence slower
26
Indirect Addressing Diagram
Address A
Opcode
Instruction
Memory
Operand
Pointer to operand
27
Register Addressing (1)
• Operand is held in register named in address
filed
• EA = R
• Limited number of registers
• Very small address field needed
– Shorter instructions
– Faster instruction fetch
28
Register Addressing (2)
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
– Requires good assembly programming or compiler
writing
– N.B. C programming
• register int a;
• c.f. Direct addressing
29
Register Addressing Diagram
Register Address R
Opcode
Instruction
Registers
Operand
30
Register Indirect Addressing
• C.f. indirect addressing
• EA = (R)
• Operand is in memory cell pointed to by
contents of register R
• Large address space (2n)
• One fewer memory access than indirect
addressing
31
Register Indirect Addressing Diagram
Register Address R
Opcode
Instruction
Memory
Operand
Pointer to Operand
Registers
32
Bit position of different flag register
33
34
35
INSTRUCTION SET OF 8085
Instruction Set of 8085
 An instruction is a binary pattern designed inside a
microprocessor to perform a specific function.
 The entire group of instructions that a microprocessor
supports is called Instruction Set.
 8085 has 246 instructions.
 Each instruction is represented by an 8-bit binary value.
 These 8-bits of binary value is called Op-Code or
Instruction Byte.
37
Classification of Instruction Set
• Data Transfer Instruction
• Arithmetic Instructions
• Logical Instructions
• Branching Instructions
• Control Instructions
38
Data Transfer Instructions
• These instructions move data between
registers, or between memory and registers.
• These instructions copy data from source to
destination.
• While copying, the contents of source are not
modified.
39
Data Transfer Instructions
Opcode Operand Description
MOV Rd, Rs
M, Rs
Rd, M
Copy from source to destination.
 This instruction copies the contents of the source register into
the destination register.
 The contents of the source register are not altered.
 If one of the operands is a memory location, its location is
specified by the contents of the HL registers.
 Example: MOV B, C or MOV B, M
40
Data Transfer Instructions
Opcode Operand Description
MVI Rd, Data
M, Data
Move immediate 8-bit
 The 8-bit data is stored in the destination register or
memory.
 If the operand is a memory location, its location is
specified by the contents of the H-L registers.
 Example: MVI B, 57H or MVI M, 57H
41
Data Transfer Instructions
Opcode Operand Description
LDA 16-bit address Load Accumulator
 The contents of a memory location, specified by a
16-bit address in the operand, are copied to the
accumulator.
 The contents of the source are not altered.
 Example: LDA 2034H
42
Data Transfer Instructions
Opcode Operand Description
LDAX B/D Register Pair Load accumulator indirect
 The contents of the designated register pair point to a memory
location.
 This instruction copies the contents of that memory location into
the accumulator.
 The contents of either the register pair or the memory location are
not altered.
 Example: LDAX B
43
Data Transfer Instructions
Opcode Operand Description
LXI Reg. pair, 16-bit
data
Load register pair immediate
 This instruction loads 16-bit data in the register pair.
 Example: LXI H, 2034 H
44
Data Transfer Instructions
Opcode Operand Description
LHLD 16-bit address Load H-L registers direct
 This instruction copies the contents of memory
location pointed out by 16-bit address into register L.
 It copies the contents of next memory location into
register H.
 Example: LHLD 2040 H
45
Data Transfer Instructions
Opcode Operand Description
STA 16-bit address Store accumulator direct
 The contents of accumulator are copied into the
memory location specified by the operand.
 Example: STA 2500 H
46
Data Transfer Instructions
Opcode Operand Description
STAX Reg. pair Store accumulator indirect
 The contents of accumulator are copied into the
memory location specified by the contents of the
register pair.
 Example: STAX B
47
Data Transfer Instructions
Opcode Operand Description
SHLD 16-bit address Store H-L registers direct
 The contents of register L are stored into memory
location specified by the 16-bit address.
 The contents of register H are stored into the next
memory location.
 Example: SHLD 2550 H
48
Data Transfer Instructions
Opcode Operand Description
XCHG None Exchange H-L with D-E
 The contents of register H are exchanged with the
contents of register D.
 The contents of register L are exchanged with the
contents of register E.
 Example: XCHG
49
Data Transfer Instructions
Opcode Operand Description
SPHL None Copy H-L pair to the Stack Pointer (SP)
 This instruction loads the contents of H-L pair into
SP.
 Example: SPHL
50
Data Transfer Instructions
Opcode Operand Description
XTHL None Exchange H–L with top of stack
 The contents of L register are exchanged with the
location pointed out by the contents of the SP.
 The contents of H register are exchanged with the
next location (SP + 1).
 Example: XTHL
51
Data Transfer Instructions
Opcode Operand Description
PCHL None Load program counter with H-L contents
 The contents of registers H and L are copied into the
program counter (PC).
 The contents of H are placed as the high-order byte
and the contents of L as the low-order byte.
 Example: PCHL
52
Data Transfer Instructions
Opcode Operand Description
PUSH Reg. pair Push register pair onto stack
 The contents of register pair are copied onto stack.
 SP is decremented and the contents of high-order registers (B,
D, H, A) are copied into stack.
 SP is again decremented and the contents of low-order
registers (C, E, L, Flags) are copied into stack.
 Example: PUSH B
53
Data Transfer Instructions
Opcode Operand Description
POP Reg. pair Pop stack to register pair
 The contents of top of stack are copied into register pair.
 The contents of location pointed out by SP are copied to the
low-order register (C, E, L, Flags).
 SP is incremented and the contents of location are copied to
the high-order register (B, D, H, A).
 Example: POP H
54
Data Transfer Instructions
Opcode Operand Description
OUT 8-bit port address Copy data from accumulator to a port with 8-bit
address
 The contents of accumulator are copied into the I/O
port.
 Example: OUT 78 H
55
Data Transfer Instructions
Opcode Operand Description
IN 8-bit port address Copy data to accumulator from a port with 8-bit
address
 The contents of I/O port are copied into accumulator.
 Example: IN 8C H
56
Arithmetic Instructions
• These instructions perform the operations
like:
– Addition
– Subtract
– Increment
– Decrement
57
Addition
• Any 8-bit number, or the contents of register,
or the contents of memory location can be
added to the contents of accumulator.
• The result (sum) is stored in the accumulator.
• No two other 8-bit registers can be added
directly.
• Example: The contents of register B cannot be
added directly to the contents of register C.
58
Subtraction
• Any 8-bit number, or the contents of register, or the
contents of memory location can be subtracted from
the contents of accumulator.
• The result is stored in the accumulator.
• Subtraction is performed in 2’s complement form.
• If the result is negative, it is stored in 2’s complement
form.
• No two other 8-bit registers can be subtracted directly.
59
Increment / Decrement
• The 8-bit contents of a register or a memory
location can be incremented or decremented
by 1.
• The 16-bit contents of a register pair can be
incremented or decremented by 1.
• Increment or decrement can be performed on
any register or a memory location.
60
Arithmetic Instructions
Opcode Operand Description
ADD R
M
Add register or memory to accumulator
 The contents of register or memory are added to the contents of
accumulator.
 The result is stored in accumulator.
 If the operand is memory location, its address is specified by H-L pair.
 All flags are modified to reflect the result of the addition.
 Example: ADD B or ADD M
61
Arithmetic Instructions
Opcode Operand Description
ADC R
M
Add register or memory to accumulator with
carry
 The contents of register or memory and Carry Flag (CY) are added to the
contents of accumulator.
 The result is stored in accumulator.
 If the operand is memory location, its address is specified by H-L pair.
 All flags are modified to reflect the result of the addition.
 Example: ADC B or ADC M
62
Arithmetic Instructions
Opcode Operand Description
ADI 8-bit data Add immediate to accumulator
 The 8-bit data is added to the contents of
accumulator.
 The result is stored in accumulator.
 All flags are modified to reflect the result of the
addition.
 Example: ADI 45 H 63
Arithmetic Instructions
Opcode Operand Description
ACI 8-bit data Add immediate to accumulator with carry
 The 8-bit data and the Carry Flag (CY) are added to the
contents of accumulator.
 The result is stored in accumulator.
 All flags are modified to reflect the result of the addition.
 Example: ACI 45 H
64
Arithmetic Instructions
Opcode Operand Description
DAD Reg. pair Add register pair to H-L pair
 The 16-bit contents of the register pair are added to the
contents of H-L pair.
 The result is stored in H-L pair.
 If the result is larger than 16 bits, then CY is set.
 No other flags are changed.
 Example: DAD B
65
Arithmetic Instructions
Opcode Operand Description
SUB R
M
Subtract register or memory from accumulator
 The contents of the register or memory location are subtracted from the
contents of the accumulator.
 The result is stored in accumulator.
 If the operand is memory location, its address is specified by H-L pair.
 All flags are modified to reflect the result of subtraction.
 Example: SUB B or SUB M
66
Arithmetic Instructions
Opcode Operand Description
SBB R
M
Subtract register or memory from accumulator
with borrow
 The contents of the register or memory location and Borrow Flag (i.e. CY)
are subtracted from the contents of the accumulator.
 The result is stored in accumulator.
 If the operand is memory location, its address is specified by H-L pair.
 All flags are modified to reflect the result of subtraction.
 Example: SBB B or SBB M
67
Arithmetic Instructions
Opcode Operand Description
SUI 8-bit data Subtract immediate from accumulator
 The 8-bit data is subtracted from the contents of the
accumulator.
 The result is stored in accumulator.
 All flags are modified to reflect the result of subtraction.
 Example: SUI 45 H
68
Arithmetic Instructions
Opcode Operand Description
SBI 8-bit data Subtract immediate from accumulator with
borrow
 The 8-bit data and the Borrow Flag (i.e. CY) is subtracted
from the contents of the accumulator.
 The result is stored in accumulator.
 All flags are modified to reflect the result of subtraction.
 Example: SBI 45 H
69
Arithmetic Instructions
Opcode Operand Description
INR R
M
Increment register or memory by 1
 The contents of register or memory location are incremented
by 1.
 The result is stored in the same place.
 If the operand is a memory location, its address is specified by
the contents of H-L pair.
 Example: INR B or INR M
70
Arithmetic Instructions
Opcode Operand Description
INX R Increment register pair by 1
 The contents of register pair are incremented by 1.
 The result is stored in the same place.
 Example: INX H
71
Arithmetic Instructions
Opcode Operand Description
DCR R
M
Decrement register or memory by 1
 The contents of register or memory location are decremented
by 1.
 The result is stored in the same place.
 If the operand is a memory location, its address is specified by
the contents of H-L pair.
 Example: DCR B or DCR M
72
Arithmetic Instructions
Opcode Operand Description
DCX R Decrement register pair by 1
 The contents of register pair are decremented by 1.
 The result is stored in the same place.
 Example: DCX H
73
Logical Instructions
• These instructions perform logical operations on data
stored in registers, memory and status flags.
• The logical operations are:
– AND
– OR
– XOR
– Rotate
– Compare
– Complement
74
AND, OR, XOR
• Any 8-bit data, or the contents of register, or
memory location can logically have
– AND operation
– OR operation
– XOR operation
with the contents of accumulator.
• The result is stored in accumulator.
75
Rotate
• Each bit in the accumulator can be shifted
either left or right to the next position.
76
Compare
• Any 8-bit data, or the contents of register, or
memory location can be compares for:
– Equality
– Greater Than
– Less Than
with the contents of accumulator.
• The result is reflected in status flags.
77
Complement
• The contents of accumulator can be
complemented.
• Each 0 is replaced by 1 and each 1 is replaced
by 0.
78
Logical Instructions
Opcode Operand Description
CMP R
M
Compare register or memory with accumulator
 The contents of the operand (register or memory)
are compared with the contents of the accumulator.
 Both contents are preserved .
 The result of the comparison is shown by setting the
flags of the PSW as follows:
79
Logical Instructions
Opcode Operand Description
CMP R
M
Compare register or memory with accumulator
 if (A) < (reg/mem): carry flag is set
 if (A) = (reg/mem): zero flag is set
 if (A) > (reg/mem): carry and zero flags are reset.
 Example: CMP B or CMP M
80
Logical Instructions
Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator
 The 8-bit data is compared with the contents of
accumulator.
 The values being compared remain unchanged.
 The result of the comparison is shown by setting the
flags of the PSW as follows:
81
Logical Instructions
Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator
 if (A) < data: carry flag is set
 if (A) = data: zero flag is set
 if (A) > data: carry and zero flags are reset
 Example: CPI 89H
82
Logical Instructions
Opcode Operand Description
ANA R
M
Logical AND register or memory with
accumulator
 The contents of the accumulator are logically ANDed with the contents of
register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the contents
of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 CY is reset and AC is set.
 Example: ANA B or ANA M.
83
Logical Instructions
Opcode Operand Description
ANI 8-bit data Logical AND immediate with accumulator
 The contents of the accumulator are logically ANDed with the
8-bit data.
 The result is placed in the accumulator.
 S, Z, P are modified to reflect the result.
 CY is reset, AC is set.
 Example: ANI 86H.
84
Logical Instructions
Opcode Operand Description
XRA R
M
Exclusive OR register or memory with
accumulator
 The contents of the accumulator are XORed with the contents of the register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the contents of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 CY and AC are reset.
 Example: XRA B or XRA M.
85
Logical Instructions
Opcode Operand Description
ORA R
M
Logical OR register or memory with accumulator
 The contents of the accumulator are logically ORed with the contents of the register or
memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the contents of H-L pair.
 S, Z, P are modified to reflect the result.
 CY and AC are reset.
 Example: ORA B or ORA M.
86
Logical Instructions
Opcode Operand Description
ORI 8-bit data Logical OR immediate with accumulator
 The contents of the accumulator are logically ORed with the 8-
bit data.
 The result is placed in the accumulator.
 S, Z, P are modified to reflect the result.
 CY and AC are reset.
 Example: ORI 86H.
87
Logical Instructions
Opcode Operand Description
XRA R
M
Logical XOR register or memory with
accumulator
 The contents of the accumulator are XORed with the contents of the
register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the
contents of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 CY and AC are reset.
 Example: XRA B or XRA M.
88
Branching Instructions
• The branching instruction alter the normal
sequential flow.
• These instructions alter either unconditionally
or conditionally.
89
Control Instructions
• The control instructions control the operation
of microprocessor.
90

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Unit 2.ppt

  • 1. Chapter 2 8085 Microprocessor and 8051 Microcontroller
  • 2. Microprocessor Architecture • The microprocessor can be programmed to perform functions on given data by writing specific instructions into its memory. – The microprocessor reads one instruction at a time, matches it with its instruction set, and performs the data manipulation specified. – The result is either stored back into memory or displayed on an output device. 2
  • 3. The 8085 Architecture • The 8085 uses three separate busses to perform its operations – The address bus. – The data bus. – The control bus. 3
  • 4. 4
  • 5. The Address Bus – 16 bits wide (A0 A1…A15) • Therefore, the 8085 can access locations with numbers from 0 to 65,536. Or, the 8085 can access a total of 64K addresses. – “Unidirectional”. • Information flows out of the microprocessor and into the memory or peripherals. – When the 8085 wants to access a peripheral or a memory location, it places the 16-bit address on the address bus and then sends the appropriate control signals. 5
  • 6. The Data Bus – 8 bits wide (D0 D1…D7) – “Bi-directional”. • Information flows both ways between the microprocessor and memory or I/O. – The 8085 uses the data bus to transfer the binary information. – Since the data bus has 8-bits only, then the 8085 can manipulate data 8 bits at-a-time only. 6
  • 7. The Control Bus – There is no real control bus. Instead, the control bus is made up of a number of single bit control signals. 7
  • 8. Operation Types in a Microprocessor • All of the operations of the microprocessor can be classified into one of three types: - Microprocessor-Initiated Operations - Internal Operations - Peripheral-Initiated Operations 8
  • 9. Microprocessor-Initiated Operations • These are operations that the microprocessor itself starts. • These are usually one of 4 operations: – Memory Read – Memory Write – I/O Read (Get data from an input device) – I/O write (Send data to an output device) 9
  • 10. Microprocessor-Initiated Operations • It is important to note that the microprocessor treats memory and I/O devices the same way. – Input and output devices simply look like memory locations to the microprocessor. • For example, the keyboard may look like memory address A3F2H. To get what key is being pressed, the microprocessor simply reads the data at location A3F2H. – The communication process between the microprocessor and peripheral devices consist of the following three steps: – Identify the address. – Transfer the binary information. – Provide the right timing signals. 10
  • 11. The Read Operation – To read the contents of a memory location, the following steps take place: • The microprocessor places the 16-bit address of the memory location on the address bus. • The microprocessor activates a control signal called “memory read” which enables the memory chip. • The memory decodes the address and identifies the right location. • The memory places the contents on the data bus. • The microprocessor reads the value of the data bus after a certain amount of time. 11
  • 12. Internal Data Operations • The 8085 can perform a number of internal operations. Such as: storing data, Arithmetic & Logic operations, Testing for condition, etc. – To perform these operations, the microprocessor needs an internal architecture similar to the following: 12 Accumulator Flags B C D E H L Program Counter Stack Pointer Data Address 8 16
  • 13. • Registers Six general purpose registers used to store 8-bit data during a program execution The registers are identified as B, C, D, E, H, and L They can be combined as register pairs: BC, DE, and HL to perform 16-bit operations • Accumulator 8-bit register that is part of the ALU Used to store 8-bit data and in performing 8-bit arithmetic and logical operations, and in storing the results op operations 13
  • 14. The Internal Architecture • The Program Counter (PC) – This is a register that is used to control the sequencing of the execution of instructions. – This register always holds the address of the next instruction. – Since it holds an address, it must be 16 bits wide. 14
  • 15. The Internal Architecture • The Stack pointer – The stack pointer is also a 16-bit register that is used to point into memory. – The memory this register points to is a special area called the stack. – The stack is an area of memory used to hold data that will be retreived soon. – The stack is usually accessed in a Last In First Out (LIFO) fashion. 15
  • 16. Externally-Initiated Operations • External devices can initiate (start) one of the 4 following operations: – Reset • All operations are stopped and the program counter is reset to 0000. – Interrupt • The microprocessor’s operations are interrupted and the microprocessor executes what is called a “service routine”. • This routine “handles” the interrupt, (perform the necessary operations). Then the microprocessor returns to its previous operations and continues. 16
  • 17. Externally-Initiated Operations – Ready • The 8085 has a pin called RDY. This pin is used by external devices to stop the 8085 until they catch up. • As long as the RDY pin is low, the 8085 will be in a wait state. – Hold • The 8085 has a pin called HOLD. This pin is used by external devices to gain control of the busses. • When the HOLD signal is activated by an external device, the 8085 stops executing instructions and stops using the busses. • This would allow external devices to control the information on the busses. Example DMA. 17
  • 18. 8085 Pin Configuraation • 40 Pins. • Address Bus A15 – A8 (8 Pins) • Data Bus AD7 – AD0 (8 Pins) • Control and Status Signals (6 Pins) • Power supply and clock frequency (5 Pins) • Externally initiated signals (11 Pins) • Serial I/O Ports (2 Pins) 18
  • 19. 19
  • 20. Addressing Modes • Immediate • Direct • Indirect • Register • Register Indirect • Displacement (Indexed) • Stack 20
  • 21. Immediate Addressing • Operand is part of instruction • Operand = address field • e.g. ADD 5 – Add 5 to contents of accumulator – 5 is operand • No memory reference to fetch data • Fast • Limited range 21
  • 23. Direct Addressing • Address field contains address of operand • Effective address (EA) = address field (A) • e.g. ADD A – Add contents of cell A to accumulator – Look in memory at address A for operand • Single memory reference to access data • No additional calculations to work out effective address • Limited address space 23
  • 24. Direct Addressing Diagram Address A Opcode Instruction Memory Operand 24
  • 25. Indirect Addressing (1) • Memory cell pointed to by address field contains the address of (pointer to) the operand • EA = (A) – Look in A, find address (A) and look there for operand • e.g. ADD (A) – Add contents of cell pointed to by contents of A to accumulator 25
  • 26. Indirect Addressing (2) • Large address space • 2n where n = word length • May be nested, multilevel, cascaded – e.g. EA = (((A))) • Draw the diagram yourself • Multiple memory accesses to find operand • Hence slower 26
  • 27. Indirect Addressing Diagram Address A Opcode Instruction Memory Operand Pointer to operand 27
  • 28. Register Addressing (1) • Operand is held in register named in address filed • EA = R • Limited number of registers • Very small address field needed – Shorter instructions – Faster instruction fetch 28
  • 29. Register Addressing (2) • No memory access • Very fast execution • Very limited address space • Multiple registers helps performance – Requires good assembly programming or compiler writing – N.B. C programming • register int a; • c.f. Direct addressing 29
  • 30. Register Addressing Diagram Register Address R Opcode Instruction Registers Operand 30
  • 31. Register Indirect Addressing • C.f. indirect addressing • EA = (R) • Operand is in memory cell pointed to by contents of register R • Large address space (2n) • One fewer memory access than indirect addressing 31
  • 32. Register Indirect Addressing Diagram Register Address R Opcode Instruction Memory Operand Pointer to Operand Registers 32
  • 33. Bit position of different flag register 33
  • 34. 34
  • 35. 35
  • 37. Instruction Set of 8085  An instruction is a binary pattern designed inside a microprocessor to perform a specific function.  The entire group of instructions that a microprocessor supports is called Instruction Set.  8085 has 246 instructions.  Each instruction is represented by an 8-bit binary value.  These 8-bits of binary value is called Op-Code or Instruction Byte. 37
  • 38. Classification of Instruction Set • Data Transfer Instruction • Arithmetic Instructions • Logical Instructions • Branching Instructions • Control Instructions 38
  • 39. Data Transfer Instructions • These instructions move data between registers, or between memory and registers. • These instructions copy data from source to destination. • While copying, the contents of source are not modified. 39
  • 40. Data Transfer Instructions Opcode Operand Description MOV Rd, Rs M, Rs Rd, M Copy from source to destination.  This instruction copies the contents of the source register into the destination register.  The contents of the source register are not altered.  If one of the operands is a memory location, its location is specified by the contents of the HL registers.  Example: MOV B, C or MOV B, M 40
  • 41. Data Transfer Instructions Opcode Operand Description MVI Rd, Data M, Data Move immediate 8-bit  The 8-bit data is stored in the destination register or memory.  If the operand is a memory location, its location is specified by the contents of the H-L registers.  Example: MVI B, 57H or MVI M, 57H 41
  • 42. Data Transfer Instructions Opcode Operand Description LDA 16-bit address Load Accumulator  The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator.  The contents of the source are not altered.  Example: LDA 2034H 42
  • 43. Data Transfer Instructions Opcode Operand Description LDAX B/D Register Pair Load accumulator indirect  The contents of the designated register pair point to a memory location.  This instruction copies the contents of that memory location into the accumulator.  The contents of either the register pair or the memory location are not altered.  Example: LDAX B 43
  • 44. Data Transfer Instructions Opcode Operand Description LXI Reg. pair, 16-bit data Load register pair immediate  This instruction loads 16-bit data in the register pair.  Example: LXI H, 2034 H 44
  • 45. Data Transfer Instructions Opcode Operand Description LHLD 16-bit address Load H-L registers direct  This instruction copies the contents of memory location pointed out by 16-bit address into register L.  It copies the contents of next memory location into register H.  Example: LHLD 2040 H 45
  • 46. Data Transfer Instructions Opcode Operand Description STA 16-bit address Store accumulator direct  The contents of accumulator are copied into the memory location specified by the operand.  Example: STA 2500 H 46
  • 47. Data Transfer Instructions Opcode Operand Description STAX Reg. pair Store accumulator indirect  The contents of accumulator are copied into the memory location specified by the contents of the register pair.  Example: STAX B 47
  • 48. Data Transfer Instructions Opcode Operand Description SHLD 16-bit address Store H-L registers direct  The contents of register L are stored into memory location specified by the 16-bit address.  The contents of register H are stored into the next memory location.  Example: SHLD 2550 H 48
  • 49. Data Transfer Instructions Opcode Operand Description XCHG None Exchange H-L with D-E  The contents of register H are exchanged with the contents of register D.  The contents of register L are exchanged with the contents of register E.  Example: XCHG 49
  • 50. Data Transfer Instructions Opcode Operand Description SPHL None Copy H-L pair to the Stack Pointer (SP)  This instruction loads the contents of H-L pair into SP.  Example: SPHL 50
  • 51. Data Transfer Instructions Opcode Operand Description XTHL None Exchange H–L with top of stack  The contents of L register are exchanged with the location pointed out by the contents of the SP.  The contents of H register are exchanged with the next location (SP + 1).  Example: XTHL 51
  • 52. Data Transfer Instructions Opcode Operand Description PCHL None Load program counter with H-L contents  The contents of registers H and L are copied into the program counter (PC).  The contents of H are placed as the high-order byte and the contents of L as the low-order byte.  Example: PCHL 52
  • 53. Data Transfer Instructions Opcode Operand Description PUSH Reg. pair Push register pair onto stack  The contents of register pair are copied onto stack.  SP is decremented and the contents of high-order registers (B, D, H, A) are copied into stack.  SP is again decremented and the contents of low-order registers (C, E, L, Flags) are copied into stack.  Example: PUSH B 53
  • 54. Data Transfer Instructions Opcode Operand Description POP Reg. pair Pop stack to register pair  The contents of top of stack are copied into register pair.  The contents of location pointed out by SP are copied to the low-order register (C, E, L, Flags).  SP is incremented and the contents of location are copied to the high-order register (B, D, H, A).  Example: POP H 54
  • 55. Data Transfer Instructions Opcode Operand Description OUT 8-bit port address Copy data from accumulator to a port with 8-bit address  The contents of accumulator are copied into the I/O port.  Example: OUT 78 H 55
  • 56. Data Transfer Instructions Opcode Operand Description IN 8-bit port address Copy data to accumulator from a port with 8-bit address  The contents of I/O port are copied into accumulator.  Example: IN 8C H 56
  • 57. Arithmetic Instructions • These instructions perform the operations like: – Addition – Subtract – Increment – Decrement 57
  • 58. Addition • Any 8-bit number, or the contents of register, or the contents of memory location can be added to the contents of accumulator. • The result (sum) is stored in the accumulator. • No two other 8-bit registers can be added directly. • Example: The contents of register B cannot be added directly to the contents of register C. 58
  • 59. Subtraction • Any 8-bit number, or the contents of register, or the contents of memory location can be subtracted from the contents of accumulator. • The result is stored in the accumulator. • Subtraction is performed in 2’s complement form. • If the result is negative, it is stored in 2’s complement form. • No two other 8-bit registers can be subtracted directly. 59
  • 60. Increment / Decrement • The 8-bit contents of a register or a memory location can be incremented or decremented by 1. • The 16-bit contents of a register pair can be incremented or decremented by 1. • Increment or decrement can be performed on any register or a memory location. 60
  • 61. Arithmetic Instructions Opcode Operand Description ADD R M Add register or memory to accumulator  The contents of register or memory are added to the contents of accumulator.  The result is stored in accumulator.  If the operand is memory location, its address is specified by H-L pair.  All flags are modified to reflect the result of the addition.  Example: ADD B or ADD M 61
  • 62. Arithmetic Instructions Opcode Operand Description ADC R M Add register or memory to accumulator with carry  The contents of register or memory and Carry Flag (CY) are added to the contents of accumulator.  The result is stored in accumulator.  If the operand is memory location, its address is specified by H-L pair.  All flags are modified to reflect the result of the addition.  Example: ADC B or ADC M 62
  • 63. Arithmetic Instructions Opcode Operand Description ADI 8-bit data Add immediate to accumulator  The 8-bit data is added to the contents of accumulator.  The result is stored in accumulator.  All flags are modified to reflect the result of the addition.  Example: ADI 45 H 63
  • 64. Arithmetic Instructions Opcode Operand Description ACI 8-bit data Add immediate to accumulator with carry  The 8-bit data and the Carry Flag (CY) are added to the contents of accumulator.  The result is stored in accumulator.  All flags are modified to reflect the result of the addition.  Example: ACI 45 H 64
  • 65. Arithmetic Instructions Opcode Operand Description DAD Reg. pair Add register pair to H-L pair  The 16-bit contents of the register pair are added to the contents of H-L pair.  The result is stored in H-L pair.  If the result is larger than 16 bits, then CY is set.  No other flags are changed.  Example: DAD B 65
  • 66. Arithmetic Instructions Opcode Operand Description SUB R M Subtract register or memory from accumulator  The contents of the register or memory location are subtracted from the contents of the accumulator.  The result is stored in accumulator.  If the operand is memory location, its address is specified by H-L pair.  All flags are modified to reflect the result of subtraction.  Example: SUB B or SUB M 66
  • 67. Arithmetic Instructions Opcode Operand Description SBB R M Subtract register or memory from accumulator with borrow  The contents of the register or memory location and Borrow Flag (i.e. CY) are subtracted from the contents of the accumulator.  The result is stored in accumulator.  If the operand is memory location, its address is specified by H-L pair.  All flags are modified to reflect the result of subtraction.  Example: SBB B or SBB M 67
  • 68. Arithmetic Instructions Opcode Operand Description SUI 8-bit data Subtract immediate from accumulator  The 8-bit data is subtracted from the contents of the accumulator.  The result is stored in accumulator.  All flags are modified to reflect the result of subtraction.  Example: SUI 45 H 68
  • 69. Arithmetic Instructions Opcode Operand Description SBI 8-bit data Subtract immediate from accumulator with borrow  The 8-bit data and the Borrow Flag (i.e. CY) is subtracted from the contents of the accumulator.  The result is stored in accumulator.  All flags are modified to reflect the result of subtraction.  Example: SBI 45 H 69
  • 70. Arithmetic Instructions Opcode Operand Description INR R M Increment register or memory by 1  The contents of register or memory location are incremented by 1.  The result is stored in the same place.  If the operand is a memory location, its address is specified by the contents of H-L pair.  Example: INR B or INR M 70
  • 71. Arithmetic Instructions Opcode Operand Description INX R Increment register pair by 1  The contents of register pair are incremented by 1.  The result is stored in the same place.  Example: INX H 71
  • 72. Arithmetic Instructions Opcode Operand Description DCR R M Decrement register or memory by 1  The contents of register or memory location are decremented by 1.  The result is stored in the same place.  If the operand is a memory location, its address is specified by the contents of H-L pair.  Example: DCR B or DCR M 72
  • 73. Arithmetic Instructions Opcode Operand Description DCX R Decrement register pair by 1  The contents of register pair are decremented by 1.  The result is stored in the same place.  Example: DCX H 73
  • 74. Logical Instructions • These instructions perform logical operations on data stored in registers, memory and status flags. • The logical operations are: – AND – OR – XOR – Rotate – Compare – Complement 74
  • 75. AND, OR, XOR • Any 8-bit data, or the contents of register, or memory location can logically have – AND operation – OR operation – XOR operation with the contents of accumulator. • The result is stored in accumulator. 75
  • 76. Rotate • Each bit in the accumulator can be shifted either left or right to the next position. 76
  • 77. Compare • Any 8-bit data, or the contents of register, or memory location can be compares for: – Equality – Greater Than – Less Than with the contents of accumulator. • The result is reflected in status flags. 77
  • 78. Complement • The contents of accumulator can be complemented. • Each 0 is replaced by 1 and each 1 is replaced by 0. 78
  • 79. Logical Instructions Opcode Operand Description CMP R M Compare register or memory with accumulator  The contents of the operand (register or memory) are compared with the contents of the accumulator.  Both contents are preserved .  The result of the comparison is shown by setting the flags of the PSW as follows: 79
  • 80. Logical Instructions Opcode Operand Description CMP R M Compare register or memory with accumulator  if (A) < (reg/mem): carry flag is set  if (A) = (reg/mem): zero flag is set  if (A) > (reg/mem): carry and zero flags are reset.  Example: CMP B or CMP M 80
  • 81. Logical Instructions Opcode Operand Description CPI 8-bit data Compare immediate with accumulator  The 8-bit data is compared with the contents of accumulator.  The values being compared remain unchanged.  The result of the comparison is shown by setting the flags of the PSW as follows: 81
  • 82. Logical Instructions Opcode Operand Description CPI 8-bit data Compare immediate with accumulator  if (A) < data: carry flag is set  if (A) = data: zero flag is set  if (A) > data: carry and zero flags are reset  Example: CPI 89H 82
  • 83. Logical Instructions Opcode Operand Description ANA R M Logical AND register or memory with accumulator  The contents of the accumulator are logically ANDed with the contents of register or memory.  The result is placed in the accumulator.  If the operand is a memory location, its address is specified by the contents of H-L pair.  S, Z, P are modified to reflect the result of the operation.  CY is reset and AC is set.  Example: ANA B or ANA M. 83
  • 84. Logical Instructions Opcode Operand Description ANI 8-bit data Logical AND immediate with accumulator  The contents of the accumulator are logically ANDed with the 8-bit data.  The result is placed in the accumulator.  S, Z, P are modified to reflect the result.  CY is reset, AC is set.  Example: ANI 86H. 84
  • 85. Logical Instructions Opcode Operand Description XRA R M Exclusive OR register or memory with accumulator  The contents of the accumulator are XORed with the contents of the register or memory.  The result is placed in the accumulator.  If the operand is a memory location, its address is specified by the contents of H-L pair.  S, Z, P are modified to reflect the result of the operation.  CY and AC are reset.  Example: XRA B or XRA M. 85
  • 86. Logical Instructions Opcode Operand Description ORA R M Logical OR register or memory with accumulator  The contents of the accumulator are logically ORed with the contents of the register or memory.  The result is placed in the accumulator.  If the operand is a memory location, its address is specified by the contents of H-L pair.  S, Z, P are modified to reflect the result.  CY and AC are reset.  Example: ORA B or ORA M. 86
  • 87. Logical Instructions Opcode Operand Description ORI 8-bit data Logical OR immediate with accumulator  The contents of the accumulator are logically ORed with the 8- bit data.  The result is placed in the accumulator.  S, Z, P are modified to reflect the result.  CY and AC are reset.  Example: ORI 86H. 87
  • 88. Logical Instructions Opcode Operand Description XRA R M Logical XOR register or memory with accumulator  The contents of the accumulator are XORed with the contents of the register or memory.  The result is placed in the accumulator.  If the operand is a memory location, its address is specified by the contents of H-L pair.  S, Z, P are modified to reflect the result of the operation.  CY and AC are reset.  Example: XRA B or XRA M. 88
  • 89. Branching Instructions • The branching instruction alter the normal sequential flow. • These instructions alter either unconditionally or conditionally. 89
  • 90. Control Instructions • The control instructions control the operation of microprocessor. 90

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