The CPU or central processing unit is the brain of the computer and performs data processing. It has three main components - the arithmetic logical unit (ALU) which performs calculations, the control unit which directs operations, and registers which temporarily store data. The CPU fetches instructions from memory, decodes them, executes the operations, and stores the results. It has different modes like user mode for programs and supervisor mode for the operating system kernel. Interrupts can cause a break in program execution from events internal or external to the CPU. Computer instructions vary between complex instruction set computers (CISCs) and reduced instruction set computers (RISCs).

1. Computer Organization

2. What is a CPU?
• The CPU or the central processing unit is
considered to be the " brain " of the
computer. It is the part of the computer
that performs bulk of data processing
operations

3. Major Components of CPU
• Arithmetic Logical Unit (ALU)
• Control Unit (CU)
• Registers

4. Arithmetic Logical Unit (ALU)
• The arithmetic logical unit or ALU
performs the required
microoperations for executing the
instructions
• Note : micro-operations are detailed low-level
instructions used in some designs to implement
complex machine instructions.

5. Control Unit
• The Control Unit supervises the
transfer of information among the
registers and instructs the ALU as
to which operation to perform

6. Registers
• Registers are groups of flip flops
with each flip flop capable of
storing one bit of information

7. Functions of a CPU
The primary function of a CPU or
an instruction set processor is to
execute sequence of instructions
which are stored in main memory
or external memory

8. Modes in a CPU
There are two modes in which a CPU
operates :
1)User Mode
1)Supervisor Mode (Kernel Mode)

9. User Mode
• In User mode, the executing code has no
ability to directly access hardware or
reference memory.
• It is the mode where all user programs
execute. It does not have access to RAM
and hardware. The reason for this is
because if all programs ran in kernel
mode, they would be able to overwrite
each other’s memory.

10. Supervisor Mode
• In Supervisor mode, the executing code
has complete and unrestricted access to
the underlying hardware.
• It can execute any CPU instruction and
reference any memory address.
• This mode is generally reserved for the
lowest-level, most trusted functions of the
operating system.

11. Steps of Operation
Also referred as the Machine Cycle
1)FETCH
1)DECODE
3)EXECUTE
4)STORE

13. Program Execution Cycle
1)FETCH
The first step the CPU carries out is to
fetch some data and instructions
(program) from main memory then store
them in its own interal temporary area
claaed 'registers'

14. 2)DECODE
• The next step is for the CPU to make
sense of the instruction it has just fetched.
• This process is called 'decode'.
• Each make of CPU has a different
instruction set, which are designed to
understand a specific set of commands

15. 3)EXECUTE
• This is the part of the cycle when data
processing takes place
• The instruction is carried out upon the data
to be executed.
• Once the execute stage is complete, the
CPU sets itself to begin another cycle
once more

16. List of Registers
Register Symbol Number of Bits Register Name Function
DR 16 Data Register
Holds memory
operand
AR 12 Address Register
Holds address for
memory
AC 16 Accumulator Process register
IR 16 Instruction Register
Holds instruction
code
PC 12 Program Counter
Holds address of
instruction
TR 16 Temporary Register
Holds temporary
data
INPR 8 Input Register
Holds input
character
OUTR 8 Output Register
Holds output
character

17. Program Interrupt
• Program interrupts refers to program
control from a currently running program to
another service program as a result of an
external or internal generated request
• Control returns to the original program
after the service program is executed

18. Interrupt Procedure
1. The interrupt procedure is initiated by an internal or
external signal rather than from the execution of an
instruction
2. The address of the interrupt service program is
determined by the hardware rather than from the
address field of the instruction
3. An interrupt procedure usually stores all the information
necessary to define the state of the CPU rather than
storing only the program counter

19. Types of Interrupts
• There are three major types of interrupts
that cause a break in the normal execution
of a program .They can be classified as :
1.External Interrupts
2.Internal Interrupts
3.Software Interrupts

20. • External interrupts come from input-output(I/O) devices
,from a timing device, from a circuit monitoring power supply
or from any other external source
• Internal interrupts arise from illegal or erroneous use of an
instruction or data. Also called as traps e.g. Register overflow,
attempt to divide by zero, protection violation
• The service program that processes the internal interrupt
determines the corrective measure to be taken.
• The difference between internal and external interrupts is that
the internal interrupt is initiated by some exceptional condition
caused by the program itself rather than by an external event
• Internal interrupts are synchronous with the program while the
external interrupts are asynchronous
• Software interrupts are special call instructions that behave
like an interrupt. It can be used by the user at any point of
time to initiate an interrupt procedure e.g. instruction provided
to switch between user mode to the supervisor mode

21. Instruction Sets in Computer
• The design of the instruction set for the
processor is an important aspect of
computer architecture
• As digital hardware became cheaper and
with the advent of integrated circuits,
computer instructions tends to increase
both in number and complexity

22. RISC and CISC
• Computers are classified on the basis of
instruction set architecture as :
1) Complex Instruction Set Computer (CISC)
1) Reduced Instruction Set Computer
(RISC)

23. Characterstics of CISC
• A computer with large number of
instructions is classified as 'complex
instruction set computer'
• Number of instructions ranges from 100 to
250
• Specialized instructions are used very
frequently

24. • A large variety of addressing modes are
available - typically from 5 to 20 different
modes
• Instructions are present which can
manipualte operands in memory

25. RISC
• In the early 1980s, computers use fewer
instructions with simple constructs so that
they can be executed much faster within
the CPU without having to use memory as
often.
• This type os computer is classified as a
reduced instruction set computer or RISC

26. Charaterstics of RISC
• Relatively few instructions
• Relatively few addressing modes
• Memory access limited to load and
instructions
• All operations done within the registers of
the CPU
• Fixed-length, easily decoded instruction
format
• Single-cycle instruction execution

27. CISC vs RISC
CISC RISC
Emphasis on hardware Empahsis on software
Includes multi-clock complex instructions Single-clock, reduced instruction only
Memory-to-memory:
"LOAD" and "STORE" incorporated in
instructions
Register to register:
"LOAD" and "STORE" are independent
instructions
Small code sizes, high cycles per second Large code sizes, low cycles per second
Transistors used for storing complex
instructions
Spends more transistors on memory
registers

28. Register Transfer Language
• The symbolic notation used to describe
the micro operation transfers among
register is called a register transfer
language

29. Basic Symbols for Register Transfers
Symbols Description Examples
Letters & Numerals Denotes a register MAR, R2
Parenthesis ( )
Denotes a part of the
register
R2(0-7), R2(L)
Arrow ←
Denotes transfer of
information
R2←R1
Comma ,
Seperates two
microoperations
R2←R1, R1←R2

30. Types of Addressing Modes
• Each instruction of a computer specifies an operation on
certain data. The are various ways of specifying address
of the data to be operated on. These different ways of
specifying data are called the addressing modes. The
most common addressing modes are:
• Immediate addressing mode
• Direct addressing mode
• Indirect addressing mode
• Register addressing mode
• Register indirect addressing mode
• Displacement addressing mode
• Stack addressing mode

31. • To specify the addressing mode of an
instruction several methods are used.
Most often used are :
• a) Different operands will use different
addressing modes.
• b) One or more bits in the instruction
format can be used as mode field. The
value of the mode field determines which
addressing mode is to be used.
• The effective address will be either main
memory address of a register.

32. Immediate Addressing
• This is the simplest form of addressing. Here,
the operand is given in the instruction itself.
• This mode is used to define a constant or set
initial values of variables.
• The advantage of this mode is that no memory
reference other than instruction fetch is required
to obtain operand.
• The disadvantage is that the size of the number
is limited to the size of the address field, which
most instruction sets is small compared to word
length.

33. Immediate Addressing
• operand is a part of instruction
• operand = address field
• e.g. ADD 5
• —Add 5 to contents of accumulator
• —5 is operand
• No memory reference to fetch data
• Fast
• Limited range

34. Direct Addressing
• In direct addressing mode, effective
address of the operand is given in the
address field of the instruction. It requires
one memory reference to read the
operand from the given location and
provides only a limited address space.
Length of the address field is usually less
than the word length.
• Ex : Move P, Ro, Add Q, Ro P and Q are
the address of operand.

35. • Address field contains address of
operand
• Effective address (EA) = address
field (A)
• e.g. ADD A
• —Add contents of cell A to
accumulator
• —Look in memory at address A
for operand
• Single memory reference to
access data
• No additional calculations to work
out effective address
• Limited address space
Direct Addressing

36. Indirect Addressing
• Indirect addressing mode, the address field of
the instruction refers to the address of a word in
memory, which in turn contains the full length
address of the operand.
• The advantage of this mode is that for the word
length of N, an address space of 2N can be
addressed.
• The disadvantage is that instruction execution
requires two memory reference to fetch the
operand Multilevel or cascaded indirect
addressing can also be used.

37. • Memory cell pointed to by address
field contains the address of
(pointer to) the operand
• EA = (A)
• —Look in A, find address (A) and
look there for operand
• e.g. ADD (A)
• —Add contents of cell pointed to
by contents of A to accumulator
• Large address space
• 2n where n = word length
• May be nested, multilevel,
cascaded
• —e.g. EA = (((A)))
• Multiple memory accesses to find
operand
• Hence slower
Indirect Addressing

38. Register Direct Addressing
• Register addressing mode is similar to
direct addressing.
• The only difference is that the address
field of the instruction refers to a register
rather than a memory location 3 or 4 bits
are used as address field to reference 8 to
16 generate purpose registers.
• The advantages of register addressing are
Small address field is needed in the
instruction.

39. Register Direct Addressing
• Operand is held in register named
in address filed
• EA = R
• Limited number of registers
• Very small address field needed
• —Shorter instructions
• —Faster instruction fetch
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps
performance
• —Requires good assembly
programming or compiler writing
• —N.B. C programming
• –register int a;

40. Register Indirect Addressing
• This mode is similar to indirect addressing.
The address field of the instruction refers
to a register. The register contains the
effective address of the operand. This
mode uses one memory reference to
obtain the operand. The address space is
limited to the width of the registers
available to store the effective address.

41. Register Indirect Addressing
• C.f. indirect
addressing
• EA = (R)
• Operand is in memory
cell pointed to by
contents of register R
• Large address space
(2n)
• One fewer memory
access than indirect
addressing

42. Displacement Addressing
• In displacement addressing mode there are 3 types of
addressing mode. They are :
• 1) Relative addressing
• 2) Base register addressing
• 3) Indexing addressing.
• This is a combination of direct addressing and register
indirect addressing. The value contained in one address
field. A is used directly and the other address refers to a
register whose contents are added to A to produce the
effective address.

43. Displacement Addressing
• EA = A + (R)
• Address field hold two
values
• —A = base value
• —R = register that
holds displacement
• —or vice versa

44. Stack Addressing
• Stack is a linear array of locations referred
to as last-in first out queue. The stack is a
reserved block of location, appended or
deleted only at the top of the stack. Stack
pointer is a register which stores the
address of top of stack location. This
mode of addressing is also known as
implicit addressing.

45. Stack Addressing
• Operand is (implicitly) on top of stack
• e.g.
• —ADD Pop top two items from stack and
add
• The stack mode of addressing is a form of
implied addressing
• the machine instructions need not include
a memory reference but implicitly operate
on top of stack.

46. Control Organization
• There are two major types of organizations: hardwired
control and micro programmed control
• In the hardwired organization, the control logic is implemented
with gates, flip-flops, decoders and other digital circuits.
Advantage: It can be optimized to produce a fast mode of
operation
• In the micro programmed organization, the control information
is stored in a control memory .The control memory is
programmed to initiate the required sequence of micro
operations
• A hardwire control requires changes in the wiring among the
various components if the design has to be changed or
modified
• On the other hand any changes in the micro programmed
control can be done by updating the micro program in the
control memory

47. Hardwired Structure
Sequential
Logic circuit
Instruction
Register
Status
Signal
Control
Signal

48. Micro programmed Structure
Status
Signals
Address
Logic
Control
Memory
Microinstruction
Register
Instruction
Register
Decoder
Control
Signals

49. Questions ????