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48th Annual Meeting Associazione Gruppo Italiano di Elettronica Reconfigurable Platform Composer Tool Project
- 1. 48th Annual Meeting Associazione Gruppo Italiano di Elettronica Reconfigurable Platform Composer Tool Project Francesca Palumbo University of Sassari, PolComIng – Information Engineering Group Carlo Sau, Tiziana Fanni, Luigi Raffo University of Cagliari, Diee – Microelectronics and Bioengineering Group 22-24 June 2016 – Brescia (Italy)
- 2. Outline Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project • Foundations and Timeline of the RPCT Project: – Context – Target Technologies – Project Development • RPCT Framework: – Approach – Baseline Functionality and Extensions • Achievements and Final Remarks
- 3. Outline Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project • Foundations and Timeline of the RPCT Project: – Context – Target Technologies – Project Development • RPCT Framework: – Approach – Baseline Functionality and Extensions • Achievements and Final Remarks
- 4. Modern Embedded Systems Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Embedded Systems (real-time computing systems with a dedicated functionality) are pervasive (98% of computers are embedded) and may present sensing and actuating capabilities. Safety Security Certif. Distrib. HMI Seamless MPSoC Energy Automotive x x x x x x x Aerospace x x x x x x x Healthcare x x x x x x x x Consumer x x x IDC - Design of Future ES (SMART 2009/0063) Colliding technical requirements. Complex functionalities.
- 5. Multimedia Domain Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project HIGH PERFORMANCES real time, portability, long battery life UP-TO-DATE SOLUTIONS last audio/video codecs, file formats... MORE INTEGRATED FEATURES MP3, Camera, Video, GPS... MARKET DEMAND convenient form factor, affordable price, fashion
- 6. Reconfigurable Platform Composer Tool Project Target & Technological Challenges Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project • DATAFLOW MODEL OF COMPUTATION – Modularity and parallelism EASIER INTEGRATION AND FAVOURED RE-USABILITY • COARSE-GRAINED RECONFIGURABILITY – Flexibility and resource sharing MULTI-APPLICATION PORTABLE DEVICES Automated are fundamental to guarantee . Dealing with systems, in particular for , state of the art still lacks in providing a broadly accepted solution.
- 7. Framework Development Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project 2010 2011 2012 2013 2014 2015 2016 Baseline tool specification: Multi-Dataflow Composer (MDC) tool MPEG-RVC Framework Integration: Orcc + MDC + Xronos + Turnus MDC: Structural Profiler MDC: Low-Power Extension MDC: Co-processor Generator
- 8. Framework Evaluation Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project 2010 2011 2012 2013 2014 2015 2016 Reconfigurable Image/Video Coding: JPEG e H.264 Neural Signal Decoding Adaptive Filtering: HEVC Encoding Cryptograph ic Systems
- 9. Outline Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project • Foundations and Timeline of the RPCT Project: – Context – Target Technologies – Project Development • RPCT Framework: – Approach – Baseline Functionality and Extensions • Achievements and Final Remarks
- 10. Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Dynamic Power Manager Multi Dataflow Composer Tool Structural Profiler Co-Processor Generator Power Efficiency Functional Complexity Time to Market: Design & Mapping Automation Constraint Driven Optimisation http://sites.unica.it/rpct/ Fast Integration and Prototyping MDC design suite Design Suite & Targeted Challenges
- 11. Baseline: Dataflow to HW Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project coarse grained substrate coarse grained reconfigurable substrate C D A B E DA C D A B SB C D E SB A B C D A B 1:1 2:1
- 12. MDC Front-End: Datapath Merging Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project MDC front-end α C D A B E DA DF β γ SB 0 E A C B SB 1 SB 2 F D SB 0 1 2 α 1 0 1 β 0 x 0 γ x x 1 0 1 0 1 0 1 multi-dataflowshared
- 13. MDC Back-End: Hw System Implementation Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project CGR substrate SB 0 E A C B SB 1 SB 2 F D SB 0 1 2 α 1 0 1 β 0 x 0 γ x x 1 MDC back-end SB 0 SB 2 A B D SB 1 F E C configurator sel0 sel1 sel2 ID 0 1 0 1 1 0 HDL components library A B C F E D hardware communication protocol
- 14. Integration within the MPEG-RVC framework Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project composition Orcc font-end .cal MDC front-end optimisation .xdf TURNUS causation trace analysis worst case parsing script generation XRONOS high level synthesis MDC back-end IR.java multi-dataflow action weights optimal FIFOs size per IR RVC-CAL dataflows multi-dataflow optimal FIFOs size HDL components library RVC-CAL hardware protocol CGR substrate S B
- 15. Structural Profiler Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project What are the topological characteristics impacting on the CGR substrate? 1. Number of merged dataflow specifications SB E A C B SB SB F D SB E A C B SB DF D α+β+γ tot static power 73 μW α+β|γ tot static power 72 μW E DA DFC D A B α β γ 3 μW 4 μW 13 μW 27 μW 7 μW 3 μW 3 μW 11 μW 2 μW 3 μW 4 μW 13 μW 27 μW 7 μW 3 μW 2 μW 11 μW 2 μW
- 16. Structural Profiler Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project B DD DBC D A B α β γ SBB CA SB D D SB CA BSB SB SB SB D SB D SB α+γ+β frequency 45 MHz β+α+γ frequency 42 MHz internal CP external (SB) CP What are the topological characteristics impacting on the CGR substrate? 2. Merging order
- 17. Structural Profiler Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project B CA D EA B CF H EG SB SB A DF HG B C SB E SB A F B C D EA H EG !NDm 2 1 ! !N k pm k N D pre-synthesis low level feedback ai pi CPj B CA D EA B CF H EG Sequences Generator mer part mer not mer 1mnD MDCfront-end not merged partially merged merged N input dataflows
- 18. Structural Profiler Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project M i ia 1 Area M i ip 1 Power ),max( 11 SBin CPCPCP Frequency )max( jin CPCP )()ln(*)( bgNbfCP SBSB empirical functions of the SB size in bits b number of SBs in the DP chain number of actors involved in the DP ai/ pi = actor area/power CPj = input dataflow critical path longest SB chain within the DP SB SB A DF HG B C SB E low level feedback ai pi CPj current design point (DP)
- 19. Structural Profiler Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Automated Pareto Analysis AREA/POWER OPTIMAL FREQ. OPTIMAL 2 MSs= Merged dataflow Specifications (example with N=7)
- 20. Dynamic Power Management Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project α C D A B E DA DF β γ SB 0 E A C B SB 1 SB 2 F D E DA DF SB 0 E A C B SB 1 SB 2 F D C D A B E DA SB 0 E A C B SB 1 SB 2 F D DFE DA SB 0 E A C B SB 1 SB 2 F D α execution: E and F are wasting power!β execution: B, C and F are wasting power!γ execution: A, B, C, E, SB0 and SB1 are wasting power!
- 21. Dynamic Power Management Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project C F D A B E LogicRegions(LRs) Identification LR 1 2 3 4 5 actors A B,C D E F α 1 1 1 0 0 β 1 0 1 1 0 γ 0 0 1 0 1 γα β S B E A C B S B S B F D E DA DF C D A B α β γ MDCfront-end
- 22. Dynamic Power Management Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project low power (clock gated) CGR substrate en generator C F D A B E ID clk configurator en1 en2 en3 en4 en5 LR actors α β γ 1 A 1 1 0 2 B,C 1 0 0 3 D 1 1 1 4 E 0 1 0 5 F 1 0 1 MDC back-end
- 23. Co-Processor Generator Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project SYSTEMBUS HARDWARE ACCELERATOR/CO-PROCESSOR LOCAL MEMORY CONFIG REGS (manually assembled) HUGE EFFORT!!! S B E S BC D A B
- 24. Co-Processor Generator Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Co-Processor Characterization S B E A C B S B S B F D E DA DF C D A B α β γ MDCfront-end SB 0 1 2 α 1 0 1 β 0 x 0 γ x x 1 Template configuration Driver specification # of I/O I/O size I/O pattern app ID app I/O .vhd .c software drivers co-processor architectural template
- 25. Extension: Co-Processor Generator Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Co-Processor Deployment Xilinx EDK wrapper template CGR APIs .vhd .c S B E A C B S B S B F D MDCback-end software drivers co-processor architectural template .vhd CGR substrate communication link • mm-sys: memory- mapped (loosely coupled) • s-sys: stream- based (tightly coupled )
- 26. User Interface Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Input Dataflow Specifications Specify the Extension to be used (if any).
- 27. Outline Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project • Foundations and Timeline of the RPCT Project: – Context – Target Technologies – Project Development • RPCT Framework: – Approach – Baseline Functionality and Extensions • Achievements and Final Remarks
- 28. Achievements Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project Implantable Devices: strict area & power constraints Spike sorting is a critical task in neural signal decoding because of its computational cost. MDC approach led to extremely promising area and power saving.
- 29. Conclusion, On-Going and Future Plan Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project MDC design suite Dynamic Power Manager Baseline MDC Tool Structural Profiler Co-Processor Generator http://sites.unica.it/rpct/ Power Gating Power Modelling HW/SW Partitioning Multi/Hybrid-Accelerator Parser and Algorithms Dynamic Partial Reconfiguration Dynamic Power Profiling High-Level Feedback Heuristic DSE
- 30. Acknowledgements Francesca Palumbo, University of Sassari Reconfigurable Platform Composer Tool Project The RPCT research project, developed at the Department of Electrical and Electronic Engineering (University of Cagliari), has been funded by Sardinian Regional Government (L.R. 7/2007, CRP-18324).
- 31. 48th Annual Meeting Associazione Gruppo Italiano di Elettronica Reconfigurable Platform Composer Tool Project 2012 – 2015 http://sites.unica.it/rpct/ 22-24 June 2016 – Brescia (Italy)