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This document is a resume for Jaydip Patel seeking an internship or entry-level position in VLSI design and validation. It summarizes his education, including an M.S. in Electrical and Electronics Engineering from California State University, Sacramento and a B.S. in Electronics and Communication Engineering from Gujarat University, India. It also lists relevant coursework, professional experience including internships, tools and software skills, and projects in analog and mixed signal design, logic design, computer architecture, and VLSI validation and testing.

