Power aware compilation is a software approach to reducing energy consumption by optimizing code during compilation. It works by [1] analyzing assembly code produced during compilation to calculate clock cycles needed for execution, [2] developing optimization models to replace instructions with equivalents needing fewer cycles, and [3] generating optimized assembly code requiring less energy to run. This technique aims to make developers aware of programs' energy efficiency and influence more energy-conscious software development.

1. Power Aware Compilation
Nadgauda Rajeev Ajit, Vinay Kulkarni,
rajeev.acn@gmail.com vinayklk1@gmail.com
8th semester, ISE, 8th semester, ISE,
Basaveshwar Engineering College, Basaveshwar Engineering
College,
Bagalkot. Bagalkot.
Abstract computers), designing alternatives that
reduce heat dissipation (in internal circuits
“Every joule is precious” – in today’s or overall heat dissipation), Register
world every aspect of system is bound by assisted techniques, Low Power cache,
energy consumption.. Energy is an essential Partitioned Data Cache. Other techniques
asset because the factors that generate it are include Register spilling, Memory access
mainly depleting resources. Hence it becomes due to cache misses. Apart from the above
an implicit requirement to conserve energy, be mentioned methods obvious methods
it in any form i.e. computing systems, which involve replacing hardware i.e. processors
may be either battery driven or driven by AC with higher frequency etc.
power supply. Power consumption can be
reduced by having efficient operating systems o Software approach: This approach focuses
that consume lesser power. The same can be on optimizing code from an energy
applied while compiling programs on systems consumption perspective which is
where we can produce energy efficient achieved by analyzing the input code and
machine codes. We propose a technique called replacing redundant instructions. This may
power aware compilation which is a software involve internal manipulation of the input
approach to power aware computing. Using code (software package), which could be a
this technique, each and every developer or high level language (HLL) or an assembly
user could know the amount of energy level language (ALL). This internal
consumed by their code; further, if feasible our manipulation is done by reducing the
system optimizes the energy consumption. The computational time required by the set of
described methodology leads to producing instructions to execute completely. The
energy efficient software modules which would processor consumes a large part of the
save a few joules on every machine so imagine input power hence there is a need to relate
the energy conserved for such software the execution of a program which is a set
running on trillions of computing systems. of instructions to the time required to
execute the program. The processor
KEYWORDS: Power aware compilation, circuits are controlled by a timing signal
efficient machine codes. called clock. The clock defines regular
clock intervals called clock cycle. Hence
1. Introduction the execution of program is related to the
number of clock cycles. The figure below
Most system design today shows the levels of energy consumption in
concentrates on producing energy aware a computing system.
systems. Any software package i.e. code
designed for a specific set of operations
consume some energy to compute and to
perform the desired operations. This leads to a
requirement which intends to optimize code
from an energy consumption perspective.
There are two principal methods to reduce
energy consumption on computing systems
o Hardware approach: This involves
different methods: The basic method
involves checking on current leaks in the
internal circuitry (mother board in case of

2. Figure 1.0: Percentage of Energy
Consumption.
2. Power aware system
2.1 Proposed Method to identify the
Assembly level executables.
A path is needed to access the
assembly level code of the high-level code.
This may involve accessing the intermediate
target code produced by the language
processing system (Gcc compiler). This
assembly level code would then be directly
compared to the database. We convert the high
level input code into Linux Intel assembly
using the powerful GCC compiler. Figure 2.0
is a sample extracted for a simple c program.
Figure 2.0:Sample Linux Intel Assembly Code
For C program.
2.2 Design principle
Any instruction that is compiled onto a
machine requires certain number of clock
cycles to execute. We know that
Energy (Joules) =Power (Watts)*Time
(Seconds).
[Ref Milliwatt Project, Carla, Duke
University]
Where Power is a factor that varies
based on the hardware used in the computing
system. It is important to note that we focus on
the software approach to reducing energy

3. consumption. The essence is to reduce the
number of clock cycles a program takes to
completely execute on a given system
(Processor).i.e. we can conclude
Eαt
Where E=Energy in joules, t = total time in
seconds.
Therefore in the event of calculation
of the Energy for a program to completely
execute, power can be considered as constant.
This results in the proof for a totally software
oriented approach to reduce energy
consumption. And hence provides a degree of
relaxation on the need to input highly accurate
system variables (hardware). Figure 2.1:Sample output for (Fig 2.0).
t=n*T assembly function of the language processing
system (.S file incase of Linux Intel Assembly)
Where n = number of clock cycles required for and scanning each instruction which would be
the input program to execute. compared to the information in the database
which contains the registers used in an 8086
T=time period =>inverse of frequency of the Intel processor and the Clocks required by
processor in Hertz (Hz) . each Intel 8086 instruction. The clock cycles
required by each instruction results in the total
T=1/f number of clock cycles by the program to
execute completely i.e. ‘n’. This computed
T varies based on the system on which the total of all clock cycles can be used to further
application is run. compute ’t’. For Example considering the
instruction on line number 11
The sample extracted in Figure (2.1) is a
filtered version using shell scripts on Linux 83 andl $-16, %esp.
platform to enable the file to be processed by
our energy computing program. It depicts the For the above instruction, we first analyze the
line numbers of the ALL code in the first type of operands i.e. if it is a memory, register
column, Opcode in the second, instruction or an immediate value based on which we
mnemonic in the third and the operands in the calculate or set the relative EA (Effective
rest of the columns. The sample output is address) & relatively on comparison with the
shown below in Figure 2.1. database which stores clocks and Opcode we
assign the clocks required by that instruction.
2.2Clock Cycle Calculation
3. Language Processing Concepts
This computation plays a pivotal role in the
entire analysis of energy consumption by a A compiler is a program that can read
program. This includes accessing the file program in one language (a source language)
containing the assembly code produced by and translate it into an equivalent program in
the another language (a target language).
Figure 3.0: Compiler function.

4. code, registers or memory locations are
selected for each
Figure 3.1: Steps of processing.
of the variables used by the program. Then,
the intermediate instruction is translated into
sequence of machine instructions that perform
Figure 2.2: Sample clock cycle calculation for the same task. A crucial aspect of code
(Fig2.0). generation is the judicious assignment of
registers to hold variables. For example, using
An important role of the compiler is to report
registers R1 and R2, the intermediate
any errors in the source program that it detects
optimized code might get translated into the
during the translation process. If the target
machine code
program is an executable machine-language
program, it can then be called by the user to
LDF R2, id3
process inputs and produce outputs.
Intermediate Code Generation: In the process
of translating a source program into a target MULF R2, R2, #60.0
code, a compiler may construct one or more
LDF R1, id2
intermediate representation, which can have a
variety of forms. Syntax trees are a form of ADDF R1, R1, R2
intermediate representation; they are
commonly used during syntax and semantic STF id1, R1
analysis.
Code Generation: The code generator
takes as input an intermediate representation of 4. The New System
the source program and maps it into the target
language. If the target language is machine

5. The proposed system intends to be
either as a standalone application or as a
structured parameter to the compiler. Our
system focuses on optimizing input programs
(HLL or ALL) intended to be compiled on
machines, to produce energy efficient software
that are architecture specific machine code.
Below is an overall architectural prospective of
the system. It has been split into two sections
for convenient depiction.
The figure 4.0 is the system that
processes the HLL and produces the formatted
ALL precisely the Linux Intel Assembly code
for further processing by the system of figure
4.1.
The database consists of the
instructions and the corresponding clocks
which have been extracted from various books
on microprocessors.
In case of optimization of the input
code we adopt a new approach based on the
clock value weight of each instruction. Once
judged, that instruction would be replaced by a
similar instruction performing the same task. It
is but obvious that a lot of dependency issues
would have to be addressed to undertake such
a task.
Figure 4.0: Architectural view part1

6. and clock calculation .i.e. we find the energy
hungry instructions and try to replace them by
lesser energy consuming instructions. Here we
consider an example:
Assume the compiler generates:
addl $1, -32(%ebp)
This instruction solely consumes 17+EA clock
cycles. Now a suggested replacement on
analysis shows a movl instruction that moves
immediate to a register. Generally the register
“%ebx “ is not used hence using that register :
movl $1, %ebx
addl %ebx, -32(%ebp)
Now adding the memory content to this
register content, we get only 13 clocks and the
effective address, hence saving 4 clocks. We
replaced such instructions to reduce the clocks
and hence correspondingly reducing the
energy. But later it was discovered that there
were certain syntactic problems with the above
assumptions, hence we overruled the use of the
above models. We started working on the
“pushl” instruction generated by the compiler
in the .s file and we made observations that if
the “memory push“ instructions were removed
we would still have an executable .s file. In
this .s file the programmer’s original intention
is maintained. This model saves up to 20
clocks because every memory push requires
16+EA clocks. If the percentage of reduction is
feasible then the .s file is produced for the user
or the developer. This file is the newly
optimized file.
6. Conclusion:
The Power Aware Compilation
techniques do far more than just saving a few
joules i.e. this technique intends to make the
programmer or developer aware about the
programs efficiency. This relatively has an
effect on the prototype of development with
Figure 4.1: Architectural view part2 (Ref fig respect to software development. If the
4.0). application were to be fine-tuned and
structured as a parameter to the compiler this
would add capabilities to the compiler from a
energy aware prospective and hence casting an
5.Optimization Methodology: impact on Energy aware computing systems.
We design models, known as 6. References:
optimization models. These models are
identified through a combination of analysis

7. [1] Hongbo Yang,”Power-Aware Compilation
Techniques for High Performance
Processors”,University Of Delaware,2004.
[2]Jose.L.Ayala,Alexander Veiden Bawn,and
Marisa Lopez-Vallejo,Power-Aware
Compilation For Register File Energy
Reduction,”International Journal Of Parallel
Programming,vol 31 No 6”,December 2003.
[3] Carla Schlatter Ellis, “Milly Watt Project”,
Duke University, Indiana, February 2005.
[4] Leland L.Beck , D.Manjula ,System
Software , Pearson Education,3rd Edition.
[5] Alfred v.aho, Monica s. Lam, Ravi Sethi ,
Jeffery d. Ullman ,Compilers , Pearson
Education, 2nd Edition.
[6] Douglas V Hall,Microprocessors and
Interfacing , TATA McGRAW HILL,2nd
Edition.
[7]Carl Hamacher , Computer Organization,4th
edition.
[8]Norman Matloff ”Introduction To Linux
Intel Assembly” ,2001.
7. Credits:
[1] Project Guide:
PROF.P.V.KULKARNI
[HOD,ISE,BEC,BGK].
[2] Valuable Assistance:
PROF.RAMESH KOTI [E&C Dept.
BEC,BGK].
[3]Project Associates:
[ i ].NADGAUDA RAJEEV AJIT [ISE].
[ ii].VINAY S KULKARNI [ISE].
[iii].NIKHILPRATEEK KULKARNI [ISE].
[iv].NIRANJAN D KUMAR [ISE].