This document describes two experiments involving simulations in PSPICE software. Experiment 5 involves designing an inverter using IC 7404 to invert an input signal, either making the output high when input is low and vice versa. Experiment 6 involves designing a push-pull network using BJTs, which uses complementary NPN and PNP transistors to both source and sink current to the same load.

1. EXPERIMENT NO. 5
AIM: To design an inverter using IC 7404 on PSPICE and
simulate it.
REQUIREMENT: PSPICE software.
THEORY:
Basicallyan inverter is an ic that inverts the input given to it.
If the input signal is high then output will be low and vice
versa.
TRUTH TABLE:

3. OUTPUT:-

4. EXPERIMENT NO. 6
AIM: To design a push pull network using B.J.T. on PSPICE
and simulate it.
REQUIREMENT: PSPICE software.
THEORY:
This circuit is formally called the Complementary
Symmetrical Push-Pull output stage. Taking the stuffiness out
of the terms, the name says that
1) The stage has an NPN and a PNP device.
2) The NPN and PNP circuits look the same.
3) The stage can both source and sink current. Because the
circuit is really only a couple of emitter followers driving the
same load, the operation is simple; Q1 conducts on positive
swings; Q2 conducts on negative swings.

5. CIRCUIT:-

6. OUTPUT:-