MICROPROGRAMMED
-> CONTROL UNIT IMPLEMENTATION
-> What Is Control Unit ??
-> Hardwire
-> Microprogrammed
-> Hardwire Vs Microprogrammed
-> Microprogrammed Control Unit
-> Micro-Operations
-> Control Memory
-> Microprogrammed Control Organization
-> Microprogram Routines
-> Conditional Branching
-> Mapping Of Instruction
-> Address Sequencing
-> Micro-Program Example
-> Micro-Instruction Format
-> Microinstruction Fields
-> Symbolic Microinstruction
(Ref : Computer System Architecture by Morris Mano 3rd edition) : Microprogrammed Control unit, micro instructions, micro operations, symbolic and binary microprogram.
(Ref : Computer System Architecture by Morris Mano 3rd edition) : Microprogrammed Control unit, micro instructions, micro operations, symbolic and binary microprogram.
CISC & RISC Architecture with contents
History Of CISC & RISC
Need Of CISC
CISC
CISC Characteristics
CISC Architecture
The Search for RISC
RISC Characteristics
Bus Architecture
Pipeline Architecture
Compiler Structure
Commercial Application
Reference
There are situations, called hazards, that prevent the next instruction in the instruction stream from executing during its designated cycle
There are three classes of hazards
Structural hazard
Data hazard
Branch hazard
CISC & RISC Architecture with contents
History Of CISC & RISC
Need Of CISC
CISC
CISC Characteristics
CISC Architecture
The Search for RISC
RISC Characteristics
Bus Architecture
Pipeline Architecture
Compiler Structure
Commercial Application
Reference
There are situations, called hazards, that prevent the next instruction in the instruction stream from executing during its designated cycle
There are three classes of hazards
Structural hazard
Data hazard
Branch hazard
Origin of Microprocessor and Classification of Microprocessor Vijay Kumar
This Presentation have information about the topics are
Microprocessors evolution,
Introduction to 8085,
Basic terms,
Types of Processors,
Microprocessor Based System,
Origin of Microprocessor,
Classification of Microprocessor,
Memory,
Input and Output Devices and
Technological Improvements on Microprocessor.
Question 1. please describe an embedded system in less than 100 word.pdfarmcomputers
Question 1. please describe an embedded system in less than 100 words. You will need to cover
all the major characteristics of the embedded system to earn full points.
Question 2. please explain RISC and CISC and give the advantages and disadvantages of both.
Solution
1.An embedded system is a combination of computer hardware and software and some additional
parts, either mechanical or electronic—designed to perform a dedicated function.
Example of embedded system is Digital Watch
It contains a simple, inexpensive 4-bit processor and its own on-chip ROM. The only other
hardware elements of the watch are the inputs (buttons) and outputs (display and speaker).It
consists of a software, which when carefully designed, allows enormous flexibility and helps to
create a reasonably reliable product at extraordinarily low production cost.
other examples are:Microwave oven, cordless phones, ATMS etc
2) RISC (Reduced Instruction Set Computer)
RISC stands for Reduced Instruction Set Computer.
To execute each instruction, if there is separate electronic circuitry in the control unit, which
produces all the necessary signals, this approach of the design of the control section of the
processor is called RISC design.It is also called hard-wired approach.
Examples of RISC processors:
IBM RS6000, MC88100
DEC’s Alpha 21064, 21164 and 21264 processors
Features of RISC Processors:
The standard features of RISC processors are listed below:
RISC processors use a small and limited number of instructions.
RISC machines mostly uses hardwired control unit.
RISC processors consume less power and are having high performance.
Each instruction is very simple and consistent.
RISC processors uses simple addressing modes.
RISC instruction is of uniform fixed length.
CISC (Complex Instruction Set Computer)
CISC stands for Complex Instruction Set Computer. If the control unit contains a number of
micro-electronic circuitry to generate a set of control signals and each micro-circuitry is
activated by a micro-code, this design approach is called CISC design.
Examples of CISC processors are:
Intel 386, 486, Pentium, Pentium Pro, Pentium II, Pentium III
Motorola’s 68000, 68020, 68040, etc.
Features of CISC Processors:
The standard features of CISC processors are listed below:
CISC chips have a large amount of different and complex instructions.
CISC machines generally make use of complex addressing modes.
Different machine programs can be executed on CISC machine.
CISC machines uses micro-program control unit.
CISC processors are having limited number of registers.
Advantages of CISC Architecture:
1)Microprogramming is easy to implement and much less expensive than hard wiring a control
unit.
2)It is easy to add new commands into the chip without changing the structure of the instruction
set as the architecture uses general-purpose hardware to carry out commands.
3)This architecture makes the efficient use of main memory since the complexity (or more
capability) of instruction allo.
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This slide is special for master students (MIBS & MIFB) in UUM. Also useful for readers who are interested in the topic of contemporary Islamic banking.
Introduction to AI for Nonprofits with Tapp NetworkTechSoup
Dive into the world of AI! Experts Jon Hill and Tareq Monaur will guide you through AI's role in enhancing nonprofit websites and basic marketing strategies, making it easy to understand and apply.
Macroeconomics- Movie Location
This will be used as part of your Personal Professional Portfolio once graded.
Objective:
Prepare a presentation or a paper using research, basic comparative analysis, data organization and application of economic information. You will make an informed assessment of an economic climate outside of the United States to accomplish an entertainment industry objective.
Acetabularia Information For Class 9 .docxvaibhavrinwa19
Acetabularia acetabulum is a single-celled green alga that in its vegetative state is morphologically differentiated into a basal rhizoid and an axially elongated stalk, which bears whorls of branching hairs. The single diploid nucleus resides in the rhizoid.
Francesca Gottschalk - How can education support child empowerment.pptxEduSkills OECD
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Biological screening of herbal drugs: Introduction and Need for
Phyto-Pharmacological Screening, New Strategies for evaluating
Natural Products, In vitro evaluation techniques for Antioxidants, Antimicrobial and Anticancer drugs. In vivo evaluation techniques
for Anti-inflammatory, Antiulcer, Anticancer, Wound healing, Antidiabetic, Hepatoprotective, Cardio protective, Diuretics and
Antifertility, Toxicity studies as per OECD guidelines
Synthetic Fiber Construction in lab .pptxPavel ( NSTU)
Synthetic fiber production is a fascinating and complex field that blends chemistry, engineering, and environmental science. By understanding these aspects, students can gain a comprehensive view of synthetic fiber production, its impact on society and the environment, and the potential for future innovations. Synthetic fibers play a crucial role in modern society, impacting various aspects of daily life, industry, and the environment. ynthetic fibers are integral to modern life, offering a range of benefits from cost-effectiveness and versatility to innovative applications and performance characteristics. While they pose environmental challenges, ongoing research and development aim to create more sustainable and eco-friendly alternatives. Understanding the importance of synthetic fibers helps in appreciating their role in the economy, industry, and daily life, while also emphasizing the need for sustainable practices and innovation.
2024.06.01 Introducing a competency framework for languag learning materials ...Sandy Millin
http://sandymillin.wordpress.com/iateflwebinar2024
Published classroom materials form the basis of syllabuses, drive teacher professional development, and have a potentially huge influence on learners, teachers and education systems. All teachers also create their own materials, whether a few sentences on a blackboard, a highly-structured fully-realised online course, or anything in between. Despite this, the knowledge and skills needed to create effective language learning materials are rarely part of teacher training, and are mostly learnt by trial and error.
Knowledge and skills frameworks, generally called competency frameworks, for ELT teachers, trainers and managers have existed for a few years now. However, until I created one for my MA dissertation, there wasn’t one drawing together what we need to know and do to be able to effectively produce language learning materials.
This webinar will introduce you to my framework, highlighting the key competencies I identified from my research. It will also show how anybody involved in language teaching (any language, not just English!), teacher training, managing schools or developing language learning materials can benefit from using the framework.
Unit 8 - Information and Communication Technology (Paper I).pdfThiyagu K
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3. • Hardwired
• Microprogrammed
Instruction code
Combinational
Logic Circuits
Memory
Sequence
Counter
.
.
Control
signals
Control
signals
Next Address
Generator
(sequencer)
CAR Control
Memory
CDR
Decodin
g
Circuit
Memory
.
.
CAR: Control Address Register
CDR: Control Data RegisterInstruction code
Thursday, October 26, 2017
3
4. Control Unit :
The control unit (CU) is a component of a
computer's central processing unit (CPU)
that directs the operation of the processor.
It tells the computer's memory,
arithmetic/logic unit and input and output
devices on how to respond to a program's
instructions.
Thursday, October 26, 2017
4
5. Hardwire :
Hardwire control is a control
mechanism that generates control signals
by using an appropriate Finite State
Machine (FSM). Actually we sort it on
circuit.
The disadvantage is that wrong wiring
waste waste the whole circuit and time .
Thursday, October 26, 2017
5
6. Microprogrammed :
Microprogrammed control is a control
mechanism that generates control signals
by reading a memory called a Control
Storage (CS) that certain control signals.
It’s like a chips or bio’s and digital clock
watch (Masjid) is a chiped
microprogrammed.
Flexibility (change time etc )…
Thursday, October 26, 2017
6
7. HARDWIRED CONTROL
UNIT
MICROPROGRAMMED
CONTROL UNIT
1) Speed is fast.
2) More costlier.
3) Occurrence of error is more.
4) Control functions implemented in
hardware
5) Not flexible to accommodate new
system specification or new
instruction redesign is required.
6) Difficult to handle complex instruction
sets.
7) Complicated design process.
8) Complex decoding and sequencing
logic.
9) More chip area.
10) Application:
Mostly RISC microprocessor.
1) Speed is slow.
2) Cheaper.
3) Occurrence of error is less.
4) Control functions implemented in
software
5) More flexible to accommodate new
system specification or new
instructions
6) Easier to handle complex instruction
sets
7) Orderly, systematic and simple
design process.
8) Easier decoding and sequencing
logic
9) Less chip area.
10) Application:
Mainframes some microprocessors
Thursday, October 26, 2017
7
9. • Control Signals :
Group of bits used to select paths in Multiplexer,decoder
and Arithematic logic units.
• Control Variables :
Multiple Micro-operations
i.e a=a+b
• Binary variables specify micro-operations
• Control Word :
String of 1’s and 0’s represented control variables.
• Control Memory :
Memory certain control words
Thursday, October 26, 2017
9
10. • Micro-instructions:
Instructions that makes microprogrammed
are called micro-instruction.
• In micro instruction write program and stored in chip
o Control words stored in control memory.
o Specify control signals for execution of micro operation.
• Micro-program:
Sequence of micro-instruction
Thursday, October 26, 2017
10
11. • Are the funcional, or
atomic, operations of a
processor.
• A single micro-operation
generally involves a
transfer between
registers, transfer
between registers and
external bus, or a
simple ALU operation.
Thursday, October 26, 2017
11
12. Read-only memory (ROM)
Content of word in ROM at given address specifies
microinstruction
Each computer instruction initiates series of
microinstructions (micro program) in control memory
These microinstructions generate micro operations to
• Fetch instruction from main memory
• Evaluate effective address
• Execute operation specified by instruction
• Return control to fetch phase for next instruction
Thursday, October 26, 2017
12
13. Micro-program are stored in ROM. That
memory is called Control Memory.
(Like A Library)
Address
Control
memory
(ROM)
Control word
(microinstruction)
Thursday, October 26, 2017
13
14. Control memory:
• Contains microprograms (set of microinstructions)
• Microinstruction contains
Bits initiate microoperations
Bits determine address of next microinstruction
Control
word
Next Address
Generator
(sequencer)
CAR
Control
Memory
(ROM)
CDR
External
input
Thursday, October 26, 2017
14
15. Control address register (CAR) :
• Specifies address of next microinstruction
Next address generator (microprogram
sequencer)
• Determines address sequence for control memory
Microprogram sequencer functions
• Increment CAR by one
• Transfer external address into CAR
• Load initial address into CAR to start control
operations
Thursday, October 26, 2017
15
16. Control data register (CDR)- or pipeline
register:
• Holds microinstruction read from control memory
• Allows execution of microoperations specified by
control word simultaneously with generation of next
microinstruction
Control unit can operate without CDR
Control
word
Next Address
Generator
(sequencer)
CAR
Control
Memory
(ROM)
External
input
Thursday, October 26, 2017
16
17. Routine :
• Every block of code is “Routine.”
• Group of microinstructions stored in control
memory.
Each computer instruction has its own
microprogram routine to generate
microoperations that execute the
instruction.
Thursday, October 26, 2017
17
18. Subroutine:
• Sequence of microinstructions used by other routines
to accomplish particular task
Example:
• Subroutine to generate effective address of operand
for memory reference instruction
Thursday, October 26, 2017
18
19. Branching from one routine to another depends on
status bit conditions.
Working on the base of condition.
e.g :
{ if a>50;
cout<<message;
----------
----------
----------
}
Unconditional branch
• Fix value of status bit to 1
e.g :
Goto X;
Thursday, October 26, 2017
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20. Each computer instruction has its own
microprogram routine stored in a given
location of the control memory
Mapping:
• Transformation from instruction code bits to
address in control memory where routine is
located
Thursday, October 26, 2017
20
22. Each routine must be able to branch to the next routine
in the sequence. An initial address is loaded into the
CAR when power is turned on; this is usually the
address of the first microinstruction in the instruction
fetch routine. Next, the control unit must determine the
effective address of the instruction.
Address sequencing capabilities required in control
unit
• Incrementing CAR
• Unconditional or conditional branch, depending on status bit
conditions
• Mapping from bits of instruction to address for control memory
• Facility for subroutine call and return
Thursday, October 26, 2017
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23. 1940
opcode 940
1 is the opcode.
940 is the Address.
---------------------------------------------
------------------------------------------
---------------------------------------
CONTROL UNIT
Thursday, October 26, 2017
23
24. Computer instruction format:
Four computer instructions:
(EA is Effective Address)
I Opcode Address
15 14 11 10 0
ADD 0000 AC AC + M[EA]
BRANCH 0001 if (AC < 0) then (PC EA)
STORE 0010 M[EA] AC
EXCHANGE 0011 AC M[EA], M[EA] AC
Symbol OP-code Description
Thursday, October 26, 2017
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25. • F1,F2,F3 : Micro-operation fields.
• CD : Condition for branching
• BR : Branch Field
• AD : Address Field
Thursday, October 26, 2017
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26. CD Condition Symbol Comments
00 Always = 1 U Unconditional branch
01 DR(15) I Indirect address bit
10 AC(15) S Sign bit of AC
11 AC = 0 Z Zero value in AC
BR Symbol Function
00 JMP CAR AD if condition = 1
CAR CAR + 1 if condition = 0
01 CALL CAR AD, SBR CAR + 1 if condition = 1
CAR CAR + 1 if condition = 0
10 RET CAR SBR (Return from subroutine)
11 MAP CAR(2-5) DR(11-14), CAR(0,1,6) 0
Thursday, October 26, 2017
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27. Sample Format :
Label May be empty or may specify symbolic address
terminated with colon
Micro-ops Consists of 1, 2, or 3 symbols separated by commas
CD One of {U, I, S, Z}
U: Unconditional Branch
I: Indirect address bit
S: Sign of AC
Z: Zero value in AC
BR One of (JMP, CALL, RET, MAP)
AD One of (Symbolic address, NEXT, empty).
Thursday, October 26, 2017
27