This document discusses the concept and viability of using a high temperature superconductor fault current limiter (HTSFCL) for power system protection. It begins with an introduction to the increasing fault current levels in power systems due to rising loads. It then reviews previous fault current limiting methods and outlines the ideal characteristics of a fault current limiter. The document focuses on modeling and simulating an HTSFCL using MATLAB. The HTSFCL design incorporates superconducting and stainless steel layers. Simulation results show the HTSFCL's ability to limit fault currents within a cycle by transitioning from a superconducting to resistive state as temperature rises during a fault.
The number of Power Electronic Converter(PECs) utilised in power systems throughout the world is increasing.
PECs are found in a huge range of applications, in power systems they are used to interface Distributed Generation (DG) to the main power system and for fault current limiting/interruption applications.
These PEC interfaces generally have a low tolerance to overcurrent and rely on extremely fast acting protection which is integral to the PECs’ control systems.
The widespread introduction of PEC-interfaced energy sources has both positive and negative implications for network protection.
This presentation on Power Quality Improvement Techniques: A Review presented by Sahid Raja Khan student of B. Tech. Electrical Engineering of Compucom Institute of Technology and Management Jaipur. It describes the improvement technique of Power Quality at GSS and other Substations including Generating Stations.
Matlab/simulink simulation of unified power quality conditioner-battery energ...IJECEIAES
This paper presents performance analysis of Unified Power Quality Conditioner-Battery Energy Storage (UPQC-BES) system supplied by Photovoltaic (PV)-Wind Hybrid connected to three phase three wire (3P3W) of 380 volt (L-L) and 50 hertz distribution system. The performance of supply system is compared with two renewable energy (RE) sources i.e. PV and Wind, respectively. Fuzzy Logic Controller (FLC) is implemented to maintain DC voltage across the capacitor under disturbance scenarios of source and load as well as to compare the results with Proportional Intergral (PI) controller. There are six scenarios of disturbance i.e. (1) non-linear load (NL), (2) unbalance and nonlinear load (Unba-NL), (3) distortion supply and non-linear load (Dis-NL), (4) sag and non-linear load (Sag-NL), (5) swell and non-linear load (Swell-NL), and (6) interruption and non-linear load (Inter-NL). In disturbance scenario 1 to 5, implementation of FLC on UPQC-BES system supplied by three RE sources is able to obtain average THD of load voltage/source current slightly better than PI. Furthermore under scenario 6, FLC applied on UPQC-BES system supplied by three RE sources gives significantly better result of average THD of load voltage/source current than PI. This research is simulated using Matlab/Simulink.
This is the third slide set in series of Introductory course on Power Quality for undergraduates. This deals with transient over-voltages, Ferro Resonance, Over Voltage Protection, Switching Transients, Shielding
POWER QUALITY IMPROVEMENT AND FAULT RIDE THROUGH OF GRID CONNECTED WIND ENE...Bharadwaj S
This work tries to improve the power quality by compensating reactive power with Active Power Filters and also to analyze Fault Ride Through of Grid connected wind energy conversion systems.
The number of Power Electronic Converter(PECs) utilised in power systems throughout the world is increasing.
PECs are found in a huge range of applications, in power systems they are used to interface Distributed Generation (DG) to the main power system and for fault current limiting/interruption applications.
These PEC interfaces generally have a low tolerance to overcurrent and rely on extremely fast acting protection which is integral to the PECs’ control systems.
The widespread introduction of PEC-interfaced energy sources has both positive and negative implications for network protection.
This presentation on Power Quality Improvement Techniques: A Review presented by Sahid Raja Khan student of B. Tech. Electrical Engineering of Compucom Institute of Technology and Management Jaipur. It describes the improvement technique of Power Quality at GSS and other Substations including Generating Stations.
Matlab/simulink simulation of unified power quality conditioner-battery energ...IJECEIAES
This paper presents performance analysis of Unified Power Quality Conditioner-Battery Energy Storage (UPQC-BES) system supplied by Photovoltaic (PV)-Wind Hybrid connected to three phase three wire (3P3W) of 380 volt (L-L) and 50 hertz distribution system. The performance of supply system is compared with two renewable energy (RE) sources i.e. PV and Wind, respectively. Fuzzy Logic Controller (FLC) is implemented to maintain DC voltage across the capacitor under disturbance scenarios of source and load as well as to compare the results with Proportional Intergral (PI) controller. There are six scenarios of disturbance i.e. (1) non-linear load (NL), (2) unbalance and nonlinear load (Unba-NL), (3) distortion supply and non-linear load (Dis-NL), (4) sag and non-linear load (Sag-NL), (5) swell and non-linear load (Swell-NL), and (6) interruption and non-linear load (Inter-NL). In disturbance scenario 1 to 5, implementation of FLC on UPQC-BES system supplied by three RE sources is able to obtain average THD of load voltage/source current slightly better than PI. Furthermore under scenario 6, FLC applied on UPQC-BES system supplied by three RE sources gives significantly better result of average THD of load voltage/source current than PI. This research is simulated using Matlab/Simulink.
This is the third slide set in series of Introductory course on Power Quality for undergraduates. This deals with transient over-voltages, Ferro Resonance, Over Voltage Protection, Switching Transients, Shielding
POWER QUALITY IMPROVEMENT AND FAULT RIDE THROUGH OF GRID CONNECTED WIND ENE...Bharadwaj S
This work tries to improve the power quality by compensating reactive power with Active Power Filters and also to analyze Fault Ride Through of Grid connected wind energy conversion systems.
Come join the area's leading power quality experts as we demonstrate and replicate common power quality issues, problems and solutions in today's industrial and commercial electrical environments.
IRJET-Review on Power Quality Enhancement in weak Power Grids by Integration ...IRJET Journal
Prathmesh Mayekar, Mahesh Wagh, Nilkanth Shinde "Review on Power Quality Enhancement in weak Power Grids by Integration of Renewable Energy Technologies", International Research Journal of Engineering and Technology (IRJET), Volume2,issue-01 April 2015.e-ISSN:2395-0056, p-ISSN:2395-0072. www.irjet.net
Abstract
During Last decade power quality problems has become more complex at all level of power system. With the increased use of sophisticated electronics, high efficiency variable speed drive, power electronic controllers and also more & more non-linear loads, Power Quality has become an increasing concern to utilities and customers. The modern sensitive, Non-linear and sophisticated load affects the power quality. This paper deals with the issues of low power quality in weak power grids. Initially the various power quality issues are discussed with their definition or occurrence and then finally the solution to mitigate this power quality issues are discussed. The innovative solutions like integration of renewable energy systems along with energy storage to enhance power quality by interfacing with custom power devices are explained in detail. Nearly all sorts of solution for mitigating power quality issue require some sort of DC source for providing active power, which can be supplied by renewable energy source. Also the various energy storage systems are studied.
An adaptive protection scheme to prevent recloser-fuse miscoordination in dis...iosrjce
IOSR Journal of Electrical and Electronics Engineering(IOSR-JEEE) is a double blind peer reviewed International Journal that provides rapid publication (within a month) of articles in all areas of electrical and electronics engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electrical and electronics engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
Design and Mitigation Techniques of MV Capacitor Bank Switching Transients on...ijtsrd
This paper presents the techniques to mitigate transients caused by capacitor switching in the distribution system. It includes the theory of capacitive switching transients with different methods of mitigation. The paper uses MATLAB SIMULINK software package to simulate the specific mitigation devices. The mathematical calculations of different parameters such as transient voltages, current, and frequencies for each device are compared with obtained value from the simulations of each case study. Poonam Bhati | Mukesh Kumar Lodha ""Design and Mitigation Techniques of MV- Capacitor Bank Switching Transients on 132 KV Substation"" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-3 | Issue-4 , June 2019, URL: https://www.ijtsrd.com/papers/ijtsrd25093.pdf
Paper URL: https://www.ijtsrd.com/engineering/electrical-engineering/25093/design-and-mitigation-techniques-of-mv--capacitor-bank-switching-transients-on-132-kv-substation/poonam-bhati
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
VOLTAGE SAG AND SWELL ALLEVIATION IN DISTRIBUTION NETWORK USING CUSTOM POWER...Gaddafi Sani
IEEE-Pemc 2014 conference: VOLTAGE SAG AND SWELL ALLEVIATION IN DISTRIBUTION NETWORK USING CUSTOM POWER DEVICES; D-STATCOM AND DVR. by Abdullahi Kunya, T. Yalcinoz, Gaddafi Shehu
this is useful for peoples interested in power quality problems and their mitigation. it provides causes, effects of voltage sag and their mitigation techniques.
This directional over current relay employs the principle of actuation of the relay....It has a metallic disc free to rotate between the poles of two...
Come join the area's leading power quality experts as we demonstrate and replicate common power quality issues, problems and solutions in today's industrial and commercial electrical environments.
IRJET-Review on Power Quality Enhancement in weak Power Grids by Integration ...IRJET Journal
Prathmesh Mayekar, Mahesh Wagh, Nilkanth Shinde "Review on Power Quality Enhancement in weak Power Grids by Integration of Renewable Energy Technologies", International Research Journal of Engineering and Technology (IRJET), Volume2,issue-01 April 2015.e-ISSN:2395-0056, p-ISSN:2395-0072. www.irjet.net
Abstract
During Last decade power quality problems has become more complex at all level of power system. With the increased use of sophisticated electronics, high efficiency variable speed drive, power electronic controllers and also more & more non-linear loads, Power Quality has become an increasing concern to utilities and customers. The modern sensitive, Non-linear and sophisticated load affects the power quality. This paper deals with the issues of low power quality in weak power grids. Initially the various power quality issues are discussed with their definition or occurrence and then finally the solution to mitigate this power quality issues are discussed. The innovative solutions like integration of renewable energy systems along with energy storage to enhance power quality by interfacing with custom power devices are explained in detail. Nearly all sorts of solution for mitigating power quality issue require some sort of DC source for providing active power, which can be supplied by renewable energy source. Also the various energy storage systems are studied.
An adaptive protection scheme to prevent recloser-fuse miscoordination in dis...iosrjce
IOSR Journal of Electrical and Electronics Engineering(IOSR-JEEE) is a double blind peer reviewed International Journal that provides rapid publication (within a month) of articles in all areas of electrical and electronics engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electrical and electronics engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
Design and Mitigation Techniques of MV Capacitor Bank Switching Transients on...ijtsrd
This paper presents the techniques to mitigate transients caused by capacitor switching in the distribution system. It includes the theory of capacitive switching transients with different methods of mitigation. The paper uses MATLAB SIMULINK software package to simulate the specific mitigation devices. The mathematical calculations of different parameters such as transient voltages, current, and frequencies for each device are compared with obtained value from the simulations of each case study. Poonam Bhati | Mukesh Kumar Lodha ""Design and Mitigation Techniques of MV- Capacitor Bank Switching Transients on 132 KV Substation"" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-3 | Issue-4 , June 2019, URL: https://www.ijtsrd.com/papers/ijtsrd25093.pdf
Paper URL: https://www.ijtsrd.com/engineering/electrical-engineering/25093/design-and-mitigation-techniques-of-mv--capacitor-bank-switching-transients-on-132-kv-substation/poonam-bhati
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
VOLTAGE SAG AND SWELL ALLEVIATION IN DISTRIBUTION NETWORK USING CUSTOM POWER...Gaddafi Sani
IEEE-Pemc 2014 conference: VOLTAGE SAG AND SWELL ALLEVIATION IN DISTRIBUTION NETWORK USING CUSTOM POWER DEVICES; D-STATCOM AND DVR. by Abdullahi Kunya, T. Yalcinoz, Gaddafi Shehu
this is useful for peoples interested in power quality problems and their mitigation. it provides causes, effects of voltage sag and their mitigation techniques.
This directional over current relay employs the principle of actuation of the relay....It has a metallic disc free to rotate between the poles of two...
IOSR Journal of Applied Chemistry (IOSR-JAC) is an open access international journal that provides rapid publication (within a month) of articles in all areas of applied chemistry and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in Chemical Science. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
Here's the powerpoint of the presentation Nuts&Bold gave to the Museum Computer Network 2013 (#MCN2013).
The first part is all about our inspirations, the second one is the presentation of the process used for Variations, an entirely crowdsourced online exhibit, and the final part is about our current research.
Have fun and if you'd like more info connect yourself to our Facebook page www.facebook.com/nutsandbold.ca or linkedIn or twitter (@nutsbold) or contact us at info@nutsandbold.ca. We will be happy to talk to you some more about our process, the possibilities, etc.
Have fun and let us know what you thinker of the exhibit !
http://commissairesglaneurs.wix.com/variations
nutsandbold.ca
IOSR Journal of Electronics and Communication Engineering(IOSR-JECE) is an open access international journal that provides rapid publication (within a month) of articles in all areas of electronics and communication engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electronics and communication engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
A Fault Current Limiter Circuit to Improve Transient Stability in Power SystemIAES-IJPEDS
Short circuit current limitation in distribution system utilities can be an operational approach to improve power quality, since the estimated voltage sag amplitude during faults may be intensely reduced. The application of superconducting fault current limiter (SFCL) is projected here to limit the fault current that occurs in power system. SFCL utilizes superconductors to instantaneously decrease the unanticipated electrical surges that happen on utility distribution and power transmission networks. SFCL considerably decrease the economic burden on the utilities by reducing the wear on circuit breakers and protecting other expensive equipment. The designed SFCL model is used for determining an impedance level of SFCL according to the fault current limitation necessities of different types of the smart grid system. The representation of this paper about to see the optimum resistive value of SFCL for enhancing the transient stability of a power system. The assessment of optimal resistive value of the SFCL connected in series in a transmission line with a conductor throughout a short circuit fault is consistently determined by applying the equal-area criterion supported by power-angle curves. A Simulink based primary model is developed and additionally the simulation results for the projected model are achieved by using MATLAB.
Parasitic Boost Circuit for Transform Less Active Voltage Quality RegulatorIJMTST Journal
The voltage sag compensator, based on a series-connected voltage-source inverter, is among the most cost-effective solution against voltage sags. When voltage sags happen, the transformers, which are often installed in front of critical loads for electrical isolation, are exposed to the disfigured voltages and a dc offset will occur in its flux linkage. In this paper, a new topology of series-connected compensator is presented to mitigate long duration deep sags, and the compensation ability is highly improved with a unique shunt converter structure acting as a parasitic boost circuit that has been theoretically analyzed using open loop & closed loop control schemes. Additionally, the proposed active voltage quality regulator is a cost effective solution for long duration sags that are lower than 50% of the nominal voltage as it is transformer less compared with the traditional dynamic voltage restorer. a new topology of series-connected compensator is presented to mitigate long duration deep sags, and the compensation ability is highly improved with a unique shunt converter structure acting as a parasitic boost circuit that has been theoretically analyzed.
A Review on Optimization Techniques for Power Quality Improvement using DSTAT...ijtsrd
As demand for electricity has risen exponentially, power production and transmission are affected by scarce energy, environmental constraints and other losses. Soft computing methods to fix the sag, swell and disruption of the supply voltage in the distributed device. At present, a broad variety of highly versatile controls that leverage on newly available power electronics components are evolving for custom power applications. Control electronic equipment intended to improve the stability and efficiency of electricity flows in low voltage distribution networks. The control algorithm is used to derive the fundamental weighted value of the active and reactive power components. Using a digital signal processor, DSTATCOM is built and its output as a DSTATCOM is found to be satisfactory for different types of loads. Amit Radhakrishna Parhad | Pramod Kumar Rathore "A Review on Optimization Techniques for Power Quality Improvement using DSTATCOM (Neural Network Approach)" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-5 | Issue-4 , June 2021, URL: https://www.ijtsrd.compapers/ijtsrd42403.pdf Paper URL: https://www.ijtsrd.comengineering/electrical-engineering/42403/a-review-on-optimization-techniques-for-power-quality-improvement-using-dstatcom-neural-network-approach/amit-radhakrishna-parhad
Single core configurations of saturated core fault current limiter performanc...IJECEIAES
Economic growth with industrialization and urbanization lead to an extensive increase in power demand. It forced the utilities to add power generating facilities to cause the necessary demand-generation balance. The bulk power generating stations, mostly interconnected, with the penetration of distributed generation result in an enormous rise in the fault level of power networks. It necessitates for electrical utilities to control the fault current so that the existing switchgear can continue its services without upgradation or replacement for reliable supply. The deployment of fault current limiter (FCL) at the distribution and transmission networks has been under investigation as a potential solution to the problem. A saturated core fault current limiter (SCFCL) technology is a smart, scalable, efficient, reliable, and commercially viable option to manage fault levels in existing and future MV/HV supply systems. This paper presents the comparative performance analysis of two single-core SCFCL topologies impressed with different core saturations. It has demonstrated that the single AC winding configuration needs more bias power for affecting the same current limiting performance with an acceptable steady-state voltage drop contribution. The fault state impedance has a transient nature, and the optimum bias selection is a critical design parameter in realizing the SCFCL applications.
Modeling Analysis& Solution of Power Quality Problems Using DVR & DSTATCOMijsrd.com
A Power quality problem is an occurrence manifested as a nonstandard voltage, current or frequency that results in a failure or a disoperation of end use equipment. Utility distribution networks, sensitive industrial loads, and critical commercial operations all suffer from various types of outages and service interruptions which can cost significant financial loss per incident based on process down-time, lost production, idle work forces, and other factors. With the restructuring of Power Systems and with shifting trend towards Distributed and Dispersed Generation, the issue of Power Quality is going to take newer dimensions. The aim therefore, in this work, is to identify the prominent concerns in the area and thereby to recommend measures that can enhance the quality of the power, keeping in mind their economic viability and technical repercussions. In this paper electromagnetic transient studies are presented for the following two custom power controllers: the distribution static compensator (DSTATCOM), and the dynamic voltage restorer (DVR). Comprehensive results are presented to assess the performance of each device as a potential custom power solution.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Optimization Technique for Power Quality Improvement using DSTATCOM Neural Ne...ijtsrd
As the power demand has been increasing rapidly, power generation and transmission are being affected due to limited resources, environmental restrictions and other losses. soft computing the techniques of correcting the supply voltage sag, swell and interruption in a distributed system. At present, a wide range of very flexible controllers, which capitalize on newly available power electronics components, are emerging for custom power applications. Power electronic based equipment aimed at enhancing the reliability and quality of power flows in low voltage distribution networks. A control algorithm is used for the extraction of the fundamental weighted value of active and reactive power components. Using digital signal processor the DSTATCOM is developed and its performance of DSTATCOM is found to be satisfactory for various types of loads. Hareram Mishra | Manju Gupta | Dr. Anuprita Mishra "Optimization Technique for Power Quality Improvement using DSTATCOM (Neural Network Approach) – A Review" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-5 | Issue-5 , August 2021, URL: https://www.ijtsrd.com/papers/ijtsrd45219.pdf Paper URL: https://www.ijtsrd.com/engineering/other/45219/optimization-technique-for-power-quality-improvement-using-dstatcom-neural-network-approach- – -a-review/hareram-mishra
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A Voltage Controlled Dstatcom for Power Quality Improvementiosrjce
Due to increasing complexity in the power system, voltage sag is becoming one of the most significant
power quality problems. Voltage sag is a short reduction voltage from nominal voltage, occurs in a short time.
If the voltage sags exceed two to three cycles, then manufacturing systems making use of sensitive electronic
equipments are likely to be affected leading to major problems. It ultimately leads to wastage of resources (both
material and human) as well as financial losses. This is possible only by ensuring that uninterrupted flow of
power is maintained at proper voltage levels. This project tends look at the solving the sag problems by using
custom power devices such as Distribution Static compensator (D-STATCOM).Proposed scheme follows a new
algorithm to generate reference voltage for a distribution static compensator (DSTATCOM) operating in
voltage-control mode. The proposed scheme ensures that unity power factor (UPF) is achieved at the load
terminal during nominal operation, which is not possible in the traditional method. Also, the compensator
injects lower currents therefore, reduces losses in the feeder and voltage-source inverter. Further, a saving in
the rating of DSTATCOM is achieved which increases its capacity to mitigate voltage sag. Nearly UPF is
maintained, while regulating voltage at the load terminal, during load change. The state-space model of
DSTATCOM is incorporated with the deadbeat predictive controller for fast load voltage regulation during
voltage disturbances. With these features, this scheme allows DSTATCOM to tackle power-quality issues by
providing power factor correction, harmonic elimination, load balancing, and voltage regulation based on the
load requirement.
Harmonic enhancement in microgrid with applications on sensitive loadsIJECEIAES
Power quality issues are an important and growing problem in microgrid. There are two reasons; the more active consumer is participating in the power sector, the use of renewable energy which having a great impact on voltage variation. This paper discusses power quality disturbance and especially harmonic distortion issues in microgrid, and suggests a solution to maintain the operation of the distribution system within power quality standard. To protect sensitive loads from harmonics produced by the grid and by renewable energy sources, passive harmonic filter has been proposed in this paper. The electrical system of a nuclear research reactor as sensitive loads is designed by using Electrical Transient Analyzer Program (ETAP) software. The results show these technical issues are presented with their influence on electrical voltage and harmonic specter.
Similar to Concept and Viability of High Temperature Superconductor Fault Current Limiter for Power Systems Protection (20)
Cosmetic shop management system project report.pdfKamal Acharya
Buying new cosmetic products is difficult. It can even be scary for those who have sensitive skin and are prone to skin trouble. The information needed to alleviate this problem is on the back of each product, but it's thought to interpret those ingredient lists unless you have a background in chemistry.
Instead of buying and hoping for the best, we can use data science to help us predict which products may be good fits for us. It includes various function programs to do the above mentioned tasks.
Data file handling has been effectively used in the program.
The automated cosmetic shop management system should deal with the automation of general workflow and administration process of the shop. The main processes of the system focus on customer's request where the system is able to search the most appropriate products and deliver it to the customers. It should help the employees to quickly identify the list of cosmetic product that have reached the minimum quantity and also keep a track of expired date for each cosmetic product. It should help the employees to find the rack number in which the product is placed.It is also Faster and more efficient way.
About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Dr.Costas Sachpazis
Terzaghi's soil bearing capacity theory, developed by Karl Terzaghi, is a fundamental principle in geotechnical engineering used to determine the bearing capacity of shallow foundations. This theory provides a method to calculate the ultimate bearing capacity of soil, which is the maximum load per unit area that the soil can support without undergoing shear failure. The Calculation HTML Code included.
Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
Immunizing Image Classifiers Against Localized Adversary Attacksgerogepatton
This paper addresses the vulnerability of deep learning models, particularly convolutional neural networks
(CNN)s, to adversarial attacks and presents a proactive training technique designed to counter them. We
introduce a novel volumization algorithm, which transforms 2D images into 3D volumetric representations.
When combined with 3D convolution and deep curriculum learning optimization (CLO), itsignificantly improves
the immunity of models against localized universal attacks by up to 40%. We evaluate our proposed approach
using contemporary CNN architectures and the modified Canadian Institute for Advanced Research (CIFAR-10
and CIFAR-100) and ImageNet Large Scale Visual Recognition Challenge (ILSVRC12) datasets, showcasing
accuracy improvements over previous techniques. The results indicate that the combination of the volumetric
input and curriculum learning holds significant promise for mitigating adversarial attacks without necessitating
adversary training.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
Welcome to WIPAC Monthly the magazine brought to you by the LinkedIn Group Water Industry Process Automation & Control.
In this month's edition, along with this month's industry news to celebrate the 13 years since the group was created we have articles including
A case study of the used of Advanced Process Control at the Wastewater Treatment works at Lleida in Spain
A look back on an article on smart wastewater networks in order to see how the industry has measured up in the interim around the adoption of Digital Transformation in the Water Industry.
Planning Of Procurement o different goods and services
Concept and Viability of High Temperature Superconductor Fault Current Limiter for Power Systems Protection
1. IOSR Journal of Computer Engineering (IOSR-JCE)
e-ISSN: 2278-0661, p- ISSN: 2278-8727Volume 12, Issue 3 (Jul. - Aug. 2013), PP 76-89
www.iosrjournals.org
www.iosrjournals.org 76 | Page
Concept and Viability of High Temperature Superconductor
Fault Current Limiter for Power Systems Protection
Engr Dr Damian Obioma Dike 1 ,
Okwe Gerald Ibe 2
, Inyama Kelechi 2
,
Olekaibe Richard 2
1. Senior lecturer, Department of Electrical/Electronic Engineering Federal University of Technology
Owerri Imo State (Nigeria)
2. Student Department of Electrical/Electronic Engineering Federal University of Technology Owerri
Imo State (Nigeria)
Abstract: In today’s technological era, electrical energy is one of the most vital forms of energy and is needed
directly or indirectly in almost every field. As load gradually increases on a particular power system network, a
higher operating current state leading to increased fault current level is attained. It is not possible to change the
rating of the equipment and devices in the system or circuits to accommodate the increasing fault currents.
Integration of High Temperature Superconductor Fault Current Limiter (HTSFCL) in power system network
will provide instantaneous (sub cycle) current limitation abilities, which mitigates the effects and the buildup of
fault currents in the power system network .The devices in electronic and electrical circuits are sensitive to
disturbance and any disturbance or fault may damage the device permanently so that it must be replaced. The
cost of equipment like circuit breakers and transformers in power grid are very expensive. Moreover, replacing
damaged equipment is a time and labour consuming process, which also affects the reliability of power systems.
It is not possible to completely eliminate the faults but it is possible to limit the current during fault in order to
save the equipment and devices in the circuits or systems. One of the solutions to this age longed problem is the
application of a current limiting device in the system. This paper is centered on the concepts and viability of
High Temperature fault current limiters for power systems protection. The demonstration of this High
Temperature Superconductor Fault Current Limiter (HTSFCL) in power systems has been explained and
simulated using MATLAB tool. The results of the simulation with and without the fault are shown
Keywords: Super conducting fault limiter, MATLAB simulation, system reliability
I. Introduction
In today’s world, electrical energy is unquestionably the most versatile and universally useful form of
energy available. Electricity is only one of the many forms of energy used in industry, homes, businesses, and
transportation. With increase in the industry, consumption of electrical energy has increased. As such, our
lifestyles depend upon a reliable supply of electricity that is available whenever we need it. Because our
electrical supply is fairly reliable, it is assumed that the lights will come on at the flip of a switch, that the
refrigerator will keep food from spoiling, and that the air conditioner will keep homes and offices comfortable.
The electricity that we use is typically supplied via a network of transmission lines that carry the bulk
of the power, and distribution lines that reach out to customer loads; like a house or industry. The majority of
the distribution systems in most countries of the world operate in a radial topology in which there is a single
source of power that feeds the loads connected downstream. The topology is very simple to understand and their
protection schemes are well understood and work to protect loads and sources under fault conditions. However,
over a period of years, loads connected on a particular distribution system keeps increasing as new
neighborhoods
or small industries are added to the system. This creates a situation where the normal operating current
increases, resulting in a proportional increase in the fault current levels. This may lead to frequent power
outages and ultimately customer dissatisfaction if corrective actions are not taken. High Temperature Super
conductor Fault Current Limiter (FCL) is a revolutionary power system device that addresses the problems due
to increased fault current levels. It is a device that mitigates prospective fault currents to a lower manageable
level.
Submitted date 28 Jan 2013 Accepted Date: 05 Feb 2013
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II. Literature Survey
Before the research and development of the fault current limiter, the main area of research was to break
the circuit during fault in order to save the expensive equipment at power grids from large fault currents
generated during fault. In order to handle large fault currents circuit breaker with large rating were developed.
But the Problem with the circuit breakers is that they have a limited life period, and cannot break the circuit until
the first current cycle goes to zero. The research and development of fault current limiters started many years
ago. First the basic idea was to limit the fault current so it does not matter if the system is disconnected from
supply. Many other methods were used, like air core reactors, basically it was a good approach but the only
disadvantage was very high voltage drop in normal operation, for which volt-ampere reactive (VAR)
compensation was required. The increase in the size of the system is the other disadvantage of this approach.
The specifications of the Fault Current Limiter and a description of the limiting behavior and the
installation of the FCL are discussed in [1]. The FCL based on the Microprocessor/computer controlled method
is discussed by M.M.A.Salama [2, 3]. It consists of an LC circuit tuned to minimum impedance at supply
frequency and a thyristor controlled reactor as a shunt which is connected across the capacitor. The current is
limited by varying the firing angle of the thyristor, due to which the circuit breaker and other protective systems
can operate. The sensor and control circuits should operate accurately to detect the fault current. Fault Current
Limiter reported in [4] is based on an electromagnetic circuit with iron core and adjustable air gap. Basically the
impedance is much less during normal supply operation. During fault the forces produced by the fault current on
the plunger causes the inductance of the device to increase, which limits the current during fault. The proper
mechanical movement of the plunger is the main concern. Different approaches of limiting fault current by
using PTC thermistors have been explained by Dougal [5]. The results show that the path is good enough to
limit the fault current but at the same time the material characteristics need to be known in order for it to work
efficiently.
2.2. ROLE OF FAULT CURRENT LIMITER
As mentioned earlier, the role of the FCL is to limit prospective fault current levels to a more
manageable level without a significant impact on the distribution system. Consider a simple power system
model, as shown in Figure 2.1, consisting of a source with voltageVs, internal impedance Z s, load Z Load , and
fault impedance Z fault .
Z s
V s
Circu it
B reak er
Z lo a d
Fig 2.1 (a) Simplified power current
Z s
V s
S h o r t
C i r c u i t
Fig 2.1 (b) modified power circuit
In Steady state
𝐼𝑙𝑖𝑛𝑒 =
𝑉𝑠
𝑍𝑠 + 𝑍𝑙𝑜𝑎𝑑
− − − − − − − − 2.1
When fault occurs
𝐼𝑓𝑎𝑢𝑙𝑡 =
𝑉𝑠
𝑍𝑠 + 𝑍𝑓𝑎𝑢𝑙𝑡
− − − − − (2.2)
Since the supply impedance Z s is much smaller than the load impedance, Equation (2.2) shows that
the short circuiting of the load will substantially increase the current flow. However, if a FCL is placed in series,
as shown in the modified circuit, Equation (2.3) will hold true
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Where 𝑍𝑓𝑎𝑢𝑙𝑡 ≪ 𝑍𝑙𝑜𝑎𝑑
𝐼𝑓𝑎𝑢𝑙𝑡 =
𝑉𝑠
𝑍𝑠+𝑍 𝑓𝑐𝑙 +𝑍 𝑓𝑎𝑢𝑙𝑡
------- (2.3)
Equation (2.3) tells that, with an insertion of a FCL, the fault current will now be a function of not only
the source Zs and fault impedance Z fault , but also the impedance of the FCL. Hence, for a given source voltage
and increasing ZFCL will decrease the fault current I fault .
2.3 IDEAL FAULT CURRENT LIMITER CHARACTERISTICS
Before discussing any further, it is important that some of the ideal characteristics be laid out for an
FCL. An ideal FCL should meet the following operational requirements [1, 7, 10 and 11]
1) Virtually inexistent during steady state. This implies almost zero voltage drop across the FCL itself
2) Detection of the fault current within the first cycle (less than 16.667ms for 60Hz and 20ms for 50Hz) and
reduction to a desirable percentage in the next few cycles.
3) Capable of repeated operations for multiple faults in a short period of time
4) Automatic recovery of the FCL to pre-fault state without human intervention
5) No impact on voltage and angle stability
6) Ability to work up to the distribution voltage level class
7) No impact on the normal operation of relays and circuit breakers
8) Finally, small-size device that is relatively portable, lightweight and maintenance free
2.4 HIGH TEMPERATURE SUPERCONDUCTOR FAULT CURRENT LIMITERS (HTSFCL)
Superconductor based fault current limiters can be configured in one of the two ways: If the
superconductor is inserted in series with the circuit, then it is the resistive type. If the superconducting short
circuited secondary coil is magnetically coupled to the primary winding which is placed in series with the
circuit, it is known as reactive type. Here the investigation carried out is based on the computer modelling of the
superconductor fault current limiter and MATLAB simulation is used for the modelling. The FCL under
investigation is the resistive type. The superconducting material used is Bi-2223. The Bi-2223 is preferred as the
superconductor material for FCL as compared to YBCO because the change in the resistivity with increase in
temperature is faster in Bi-2223. Figure 2.2 shows the variation of resistivity with the temperature, it can be seen
the increase in resistivity of Bi-2223 is faster because of increase in temperature.
Figure 2.2 Variation of Resistivity with Temperature of Bi-2223 & YBCO
III. Modelling And Implementation Of Htsfcl
3.1.1 Matlab Simulation
In order to predict the limiting characteristics of the HTSFCL, it is implemented in the electrical system
and MATLAB simulation is carried out. By solving the differential equations the current can be obtained at any
point. In the simulation we apply Runge-Kutta method to solve the differential equations using time step of
0.00001s. The details can be found below which lists the complete MATLAB script. The parameters that are
considered are
• Thickness of the HTSFCL
• Length of the HTSFCL
• Specific heat capacity of the HTSFCL
• Specific resistance (Resistivity) of the HTSFCL
• Thermal conductivity of the HTSFCL
Figure 3.1 shows the circuit that has HTSFCL during steady state condition, where the current has
nominal value of 9000*sqrt2 and temperature is constant at 77K as superconductor is submerged in the liquid
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Nitrogen. During normal operation the switch is open and the HTSFCL is in its superconducting state. The
switch is closed (short circuit) in order to observe the working of the HTSFCL during fault. During fault the
HTSFCL comes out of zero resistance state and the resistance of the superconductor rises to a high value, which
results in an increase of temperature.
Fig3.1 Electrical Circuit with HTSFCL
Figure 3.2 shows the layout of the HTSFCL. The Superconductor layer of Bi-2223 is surrounded by
stainless steel layers. The function of the stainless layers is to remove the heat from the superconductor
element which helps to save the superconductor element from damage due to excess heat produced during fault.
Figure 3.2 The design of the HTSFCL
format long
% Initializing variables
V = 110000*sqrt(2);% Input Supply Voltage
w = 2*pi*50; % frequency
R = 9; % load Resistance
Eo = 0.05;
b = 3.0;
p = 20e-6;
jc = 2e+7; %Current Density
Ec = 1e-4;
Tc=108; % Critical Temperature of the High Temp. Superconductor
a = 7.5;
In = 9000*sqrt(2); % Nominal Current
thick_hts = 2e-3; % thickness of HTS (check this value)
wth_hts = In/(0.7*jc*thick_hts); % width of HTS
thick_ss = 4e-2; % thickness of stainless steel
wth_ss = 2e-3; % width of stainless steel
A = wth_hts*thick_hts; % Area of HTS
l = 80; % length of HTS (check this value)
L1 = 0.0165; % initial inductance
h = 0.00001; % Runge-Kutta step size
I = 0; % current at starting
t = 0; % starting time
TT = 77; % initial temperature of superconductor
NSS = 20; % stainless steel layers
NHTSC = 40; % HTS layers
KSS = 8; % thermal conductivity of stainless steel
KHTSC = 1; % thermal conductivity of HTS
CSS = 2.34e+6; % specific heat capacity of stainless steel
CHTSC = 6.35e+5; %specific heat capacity of HTS
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% Initialising temperature for all layers
for j=1:(2*NSS+NHTSC+1)
T(j) = TT;
end
% Layer constants
% Stainless steel
for j=1:NSS
K(j) = KSS; % thermal conductivity
C(j) = CSS; % specific heat capacity
end
K(NSS+1) = 0.5*(KSS+KHTSC); % thermal conductivity at interface 1
C(NSS+1) = 0.5*(CSS+CHTSC); % specific heat capacity at interface 1
% HTSC
for j=NSS+2:NSS+NHTSC
K(j) = KHTSC; % thermal conductivity
C(j) = CHTSC; % specific heat capacity
end
K(NSS+NHTSC+1) = 0.5*(KSS+KHTSC); %thermal conductivity atinterface 2
C(NSS+NHTSC+1) = 0.5*(CSS+CHTSC);%specific heat capacity atinterface 2
% Stainless steel
for j=NSS+NHTSC+2:2*NSS+NHTSC
K(j) = KSS; % thermal conductivity
C(j) = CSS; % specific heat capacity
end
% The following part creates E vs. J look-up tables
a1 = (log(Eo/Ec))/(log((jc/jc)^(1-(1/b))*(Eo/Ec)^(1/a)));
for(i=1:50)
jss(i)=((i*0.1)*1.0e+7)+2.0*1e7;
E(i) = (Ec)*((jss(i)/jc)^a1);
end
jss1=jss(50);
%The Flux flow regime
for(i=1:50)
jss(50+i)=((i*0.05)*1.0e+8)+jss1;
E(50+i) = [(Eo)*(Ec/Eo)^(b/a)]*[(jss(50+i)/jc)^b];
end
jss2=jss(100);
%The Normal conducting regime
for(i=1:50)
jss(100+i)=((i*0.05)*1.0e+8)+jss2;
E(100+i)=(p*TT*jss(100+i))/Tc;
end
% Create T vs. rho look-up tables
T_values = [50 60 70 77 77.5 78 78.5 79.0 79.5 80 81 82 84 86 88 90 92 94 96 98 100 105 110 115 120
125 130 150 175 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900
950 1000];
rho_values = (1.4e-6)*[.7 .75 .8 .9 1.8 4.1 9.3 14.5 19.8 24.2 26.8
27.5 28.6 29.7 30.8 31.9 33 34.2 35.4 36.6 38.1 41.8 44.5 47.2 50 53 57 58 59 60 61 62 63 64 65
66 67 68 69 70 71 72 73 74 75 76];
% Calculate initial superconductor resistance.
rho = interp1(T_values, rho_values, T);
R_sup = rho * l / A;
for m=1:10000
Current(m) = I;
Time(m) = t;
J =I/A;
if (m>4000) % Close switch after two cycles.
V1 =V*sin(w*t);
%Current(m) = I;
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%Time(m) = t;
E1 =abs(V1)/l;
% Current density for layers
cur_den1 = 0.1*abs(I)/(wth_ss*thick_ss*2*NSS); %Stainless Steel
cur_den2 = 0.9*abs(I)/(wth_hts*thick_hts*NHTSC);% HTS
for j=1:NSS
JJ(j) = cur_den1;
end
for j=NSS+NHTSC+2:2*NSS+NHTSC
JJ(j) = cur_den1;
end
for j=NSS+2:NSS+NHTSC+1
JJ(j) = cur_den2;
end
% Interface values
JJ(NSS+1) = 0.5*(cur_den1+cur_den2);
JJ(NSS+NHTSC+1) = 0.5*(cur_den1+cur_den2);
% Calculating Q
SS_layer = thick_ss/NSS;
HTSC_layer = thick_hts/NHTSC;
Q(1) = 0;
for j=2:NSS
Q(j) = JJ(j)*E1; % Heat input for SS layer
end
for j=NSS+1:NSS+NHTSC
Q(j) = JJ(j)*E1; % Heat input for Superconductor layer
end
for j=NSS+NHTSC+1:2*NSS+NHTSC
Q(j) = JJ(j)*E1; % Heat input for SS layer
end
% Calculating Temperature
for j=2:NSS
T(j) = T(j)+[K(j)*h*(T(j+1)-2*T(j)+T(j-
1))]/[(C(j)*SS_layer*SS_layer)]+Q(j)*h/C(j);
if(j=3)
TT1(m) = T(j);
end
if(j=15)
TT2(m) = T(j);
end
end
for j=NSS+1:NSS+NHTSC
T(j) = T(j)+[K(j)*h*(T(j+1)-2*T(j)+T(j- 1))]/[(C(j)*HTSC_layer*HTSC_layer)]+Q(j)*h/C(j);
if(j=24)
TT3(m) = T(j);
end
if(j=30)
TT4(m) = T(j);
end
if(j=36)
TT5(m) = T(j);
end
end
for j=NSS+NHTSC+1:2*NSS+NHTSC
T(j) = T(j)+[K(j)*h*(T(j+1)-2*T(j)+T(j-1))] / [(C(j)*SS_layer*SS_layer)]+Q(j)*h/C(j);
if(j=45)
TT6(m) = T(j);
end
if(j=56)
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TT7(m) = T(j);
end
end
% Calculation of average temperature of HTS layer
sum = 0;
for j=NSS+1:NSS+NHTSC+1
sum = sum+T(j);
end
T_av = sum/NHTSC;
% Calculate new superconductor resistance
rho = interp1(T_values, rho_values, T_av);
R_sup = rho * l / A;
R_sup_values(m) = R_sup;
I =V1/R_sup;
t =t+h; % increment of time
end
if (m <=4000)
if abs(J) <= jss1
E1 = (Ec)*((abs(J)/jc)^a1);
elseif (abs(J) > jss1) & (abs(J) < jss2); %#ok<AND2>
E1 = [(Eo)*(Ec/Eo)^(b/a)]*[(abs(J)/jc)^b];
else
E1=(p*T*abs(J))/Tc;
end
L=L1;
% Current density for layers
cur_den1 = 0.1*abs(I)/(wth_ss*thick_ss*2*NSS); % SS Layer
cur_den2 = 0.9*abs(I)/(wth_hts*thick_hts*NHTSC); % HTS Layer
for j=1:NSS
JJ(j) = cur_den1;
end
for j=NSS+NHTSC+1:2*NSS+NHTSC
JJ(j) = cur_den1;
end
for j=NSS+2:NSS+NHTSC+1
JJ(j) = cur_den2;
end
% Interface values
JJ(NSS+1) = 0.5*(cur_den1+cur_den2);
JJ(NSS+NHTSC+1) = 0.5*(cur_den1+cur_den2);
% Calculating Q
SS_layer = thick_ss/NSS;
HTSC_layer = thick_hts/NHTSC;
Q(1) = 0;
for j=2:NSS
Q(j) = JJ(j)*E1; % Heat input for SS layer
end
for j=NSS+1:NSS+NHTSC
Q(j) = JJ(j)*E1; % Heat input for SC layer
end
for j=NSS+NHTSC+1:2*NSS+NHTSC
Q(j) = JJ(j)*E1; % Heat input for SS layer
end
% Calculating Temperature
for j=2:NSS
T(j) = T(j)+[K(j)*h*(T(j+1)-2*T(j)+T(j-
1))]/[(C(j)*SS_layer*SS_layer)]+Q(j)*h/C(j);
if(j=3)
TT1(m) = T(j);
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end
if(j=15)
TT2(m) = T(j);
end
end
for j=NSS+1:NSS+NHTSC
T(j) = T(j)+[K(j)*h*(T(j+1)-2*T(j)+T(j-
1))]/[(C(j)*HTSC_layer*HTSC_layer)]+Q(j)*h/C(j);
if(j=24)
TT3(m) = T(j);
end
if(j=30)
TT4(m) = T(j);
end
if(j==36)
TT5(m) = T(j);
end
end
for j=NSS+NHTSC+1:2*NSS+NHTSC
T(j) = T(j)+[K(j)*h*(T(j+1)-2*T(j)+T(j-
1))]/[(C(j)*SS_layer*SS_layer)]+Q(j)*h/C(j);
if(j=45)
TT6(m) = T(j);
end
if(j=56)
TT7(m) = T(j);
end
end
% Calculation of average temperature of HTS layer
sum = 0;
for j=NSS+1:NSS+NHTSC+1
sum = sum+T(j);
end
T_av = sum/NHTSC;
% Calculate new superconductor resistance
rho = interp1(T_values, rho_values, T_av);
R_sup = rho * l / A;
R_sup_values(m) = R_sup;
% One step of fourth order Runge-Kutta to solve DE for current.
K1 = h*(V*sin(w*t) - (R_sup + R)*I)*(1/L);
K2 = h*(V*sin(w*(t+h/2)) - (R_sup + R)*(I+K1/2))*(1/L);
K3 = h*(V*sin(w*(t+h/2)) - (R_sup + R)*(I+K2/2))*(1/L);
K4 = h*(V*sin(w*(t+h)) - (R_sup + R)*(I+K3))*(1/L);
I = I + (1/6)*(K1 + 2*K2 + 2*K3 + K4);
t = t + h;
end
end
%figure
plot(Time,Current)
%figure
%pause
%plot(Time, R_sup_values)
%figure
%pause
%plot(Time,TT3,Time,TT4,Time,TT5)
%pause
title('Current vs Time');
XLABEL('time / s');
YLABEL('Current / A');
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3.2 Design Of Htsfcl Element
As explained above, the sample used for modelling is an 110kV, 9kA system.
1) Current: The critical current density of the Superconductor is Jc. In order to have tolerance during normal
operation or condition the current density should not exceed k% of the Jc. In is the value of nominal current. In
this case the Ip = 9000*sqrt2 is the peak current. The current Density is calculated by the dividing the current by
the area it occupies (J = I/A). Here the Jc = Ip/A and the critical current density should not exceed k% of the Jc,
so the value of the area should be calculated by A= Ip/(k*Jc). The value of critical current density Jc is
2e+7A/m^2. Results with a different value of k are shown later in this chapter. The current density is dependent
on the material used.
Figure 3.3 High Temperature Superconductor
2) A = Thickness*Width
Referring to the above Figure 3.3 the area is calculated. In the modeling various thicknesses are
modeled such as, 0.2mm and 0.9mm. The corresponding widths are calculated.
3) Length of the HTS (High Temperature Superconductor) wire the sample used for modelling is on an
110kV and 9kA system. Figure 3.3 shows the typical superconductor. The area of the wire is calculated by, A=
Thickness*Width. In the modelling various thicknesses are modelled and the corresponding width is calculated.
The peak voltage (Vpeak) of the system is given as 110000*sqrt2. This is related to the peak electric field (Epeak)
and the HTSFCL length by the equation Vpeak = Epeak*HTSFCL length. Various Epeak values were used in the
modelling. Results with different lengths of the superconductor are shown and analysed.The value of the electric
field in the three distinguishable states; zero resistance (State 1), Transition State (State 2) and normal
conductance (State 3) are obtained using the following equations, which is approximated by a power law.
State 1(Superconductor or Zero resistance state)
E (j, T) = Ec*( j / jc(T))^α(T) where α(T) = max [ β, α’(T) ], with α’(T) = log( Eo/Ec) / log[( jc (77K) / jc (T))^(1-
1/β)* ( Eo / Ec)^1/α(77K)] where jc is the critical current density and Ec = 1 μ V/cm, Eo,α, β at 77k depends on
the material processing conditions and is within the following ranges
0.1 ≤ Eo ≤ 10 mV/cm,
5 ≤ α ≤ 15,
2 ≤ β ≤ 4.
State 2 (Transition state or flux flow state)
E (j,T) = Eo*( Ec/Eo)^ β/α(77K)*jc(77K)/jc(T)*( j / jc(77K))^ β
State 3 normal state or high resistance state
E (j, T) = p (Tc)*T/Tc*j
3.3 RESULTS AND ANALYSIS
3.3.1 Normal Operation
During steady state or normal operation the switch S is open (Figure3.1). The flow of the current is
shown in Figure 3.4. The start current is zero and start time, (t) is zero. From Figure 3.4 it can be seen that the
current during normal operation is pure sinusoidal. The nominal current during normal operation is 9000*sqrt 2
A. Figure 3.5 shows the temperature–time graph during normal operation. It can be seen that temperature
remains constant at 77 K as the superconductor is cooled by liquid Nitrogen. Due to the constant temperature of
the superconductor, the HTSFCL remains in the superconductor state or zero resistance state.
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Figure 3.4 Current Waveform during normal operation
Figure 3.5 Temperature vs. Time
The voltage drop across the HTSFCL during normal operation is very low (approx. zero) as it offers
zero resistance in normal operation. The losses during normal operation are much less and therefore are
neglected
3.4 Operation During Fault
In order to see operation of the HTSFCL during fault, the Switch S in Figure 4.5 is closed after two
cycles. The Figure 3.6 shows the circuit during fault.
V
H
T
S
C
F
C
L
Figure 3.6 Circuit under fault conditions
During fault the whole supply voltage appears across the HTSFCL. There is large voltage drop across
the HTSFCL. Figure 3.7 shows the current waveform during fault. The switch S in Figure 3.1 is closed after two
cycles (at 0.04esc).
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Figure 3.7 Current waveform during fault
From Figure 3.7 it can be seen that the current rises to a large value at 0.04 seconds, when switch S is
closed. The maximum fault current becomes more than 31KA, which is more than three times the nominal value
of the current. From Figure 4.11, it can be seen that the HTSFCL takes a fraction of a second to limit the fault
current. Figure 3.8 show the change in the resistance of the superconductor during fault.
Figure 3.8 Variation in resistance with time
Actually the exact value of the resistance of the superconductor cannot be known but from Figure 3.9 it
can be shown that there will be sharp increase in the resistance of the HTFSFCL during fault. This sharp
increase in the resistance of the HTSFCL limits the fault current. As the resistance increases, the HTSFCL
comes out of superconductor state, or zero resistance state, and operates in normal conductance state, offering
very high resistance to the fault current. Due to the high resistance of the superconductor during fault a very
large amount of heat is produced which may damage the superconductor element in the HTSFCL. In order to
avoid damage of the superconductor element due to heat the stainless steel around the superconductor takes the
heat from superconductor and dissipates it. Figure 3.9 shows the rise in temperature of the superconductor layers
and the surrounding stainless steel layers. The critical temperature (Tc) is 108 K in this case. When the
temperature becomes greater than the critical temperature of the superconductor it switches to a high resistance
state, due to which the fault current is limited to a low value, thus saving the equipment installed in the power
grid or circuit.
Figure 3.9 Change in temperature of the HTSFCL
The transition state of the superconductor from superconducting state to normal state or high resistance
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state depends on heating of the superconductor. If the fault current is very high superconductor element heated
up very fast. This causes the temperature of the superconductor to become more than the critical temperature so
it operates in a high resistance state. Due to fast heating of the superconductor element, it very quickly switches
to normal state or high resistance state. In slow heating the transition time is longer as compared to fast heating
of the superconductor. During fault a large amount of fault current flows through the superconductor, resulting
in heating of the superconductor element and which may result in formation of the hot spot, thus damages the
superconductor. It is desirable that the heat generated in the superconductor during fault should be absorbed by
the stainless steel layers around it, thus protecting the superconductor from damage. The behaviour of the
HTSFCL is largely determined by its length and the type of material used. The shorter conductor length with
fast heating no doubt saves expense on conductor material but there will be a large electric field distributed over
the superconductor resulting in overheating. In a few hundred microseconds the HTSFCL enters the normal
conductance zone or high resistance state. In this case there will be quite slow recovery of the superconducting
state. More over there will be severe over voltages along with current reduction, caused by the rapid transition to
normal conduction state. In order to reduce these overvoltages, a normal resistor or reactor should be used in
parallel to the HTSFCL. Below some results are shown for changing the length of the superconductor. Below
some results are shown for changing the length of the superconductor.
Table 3.1
Fault Current & Temperature corresponding to different Length of Superconductor at k= 0.8, thickness = .002m
and Specific heat capacity= 6.35e+5(kJ kg–1 K–1)
Length
E(m)
(v/m) Fault Current
(A)
Fault Current after I
and 2 cycles(A)
Temp
(K)
70 2222 40572 25976, 22019 151
80 1944 36700 24700, 20350 137
100 1555 30701 22718, 19130 120
120 1296 26298 21041, 17703 113
Figure 3.10 (a)
Figure 3.10 (b)
Figure 3.10 (a) Fault Current and (b) Temperature corresponding to different length of the superconductor at
thickness of 0.002m (k=0.8)
The above table 3.1 shows the value of fault current, electrical field and temperature corresponding to
different values of length. The results shown in Figure 3.10 and table 3.1 are of superconductors for thickness
equal to 0.002m and k=0.8. From table 3.1 it can be observed that with a smaller length of the superconductor a
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strong electric field is developed and also a large fault current flow in the model. As explained earlier with a
short length of the superconductor a large amount of heat is produced and which may damage the
superconductor. In Figure 3.10 (b) the blue line (T 70) shows the temperature of a superconductor at length
70m, it can be observed that as the length of the conductor is increased, there is decrease in the electrical field
which results in decrease in the fault current and also temperature of the superconductor. Now we will change
the thickness of the superconductor and will see its effect on the operation of the HTSFCL.
Table 3.2
Fault Current & Temperature corresponding to different Length of Superconductor at k =0.8, thickness of .009m
and specific heat capacity= 6.35e+5(kJ kg–1 K–1)
Length
E(m)
(v/m) Fault
Current (A)
Fault Current after I
and 2 cycles(A)
Temp (K)
70 2222 40588 25446, 21935 157
80 1944 36711 24267, 19137 142
100 1555 30706 22279, 18581 124
120 1296 26301 20762, 17256 112
Table 3.2 shows the values of the fault current and temperature when the thickness of the
superconductor is increased to 0.009m. If we compare the table 3.2 with table 3.1 it can be seen that the rise in
temperature of same length is greater when the thickness of the superconductor is increased. The heat produced
during fault is dissipated much faster if the thickness is less. Figure 3.11(a) shows the current waveforms
corresponding to different length of the superconductor when the thickness is 0.009m. It is observed that the
fault current is a little bit more in Figure 3.11(a) as compared with Figure 3.10(a). Figure 3.11(b) shows the
change in the temperature of the superconductor corresponding to the change in length of the superconductor.
The thickness of the conductor in this case is 0.009m, where it is 0.002m in Figure 3.10 (b). It can be seen that
with an increase in the thickness of the superconductor the temperature also increases more than when the
thickness is 0.002m. In Figures 3.10 (a) and 3.11(a) the blue line (I 70) is the current corresponding to 70m
length of the Superconductor and the red line is the fault current corresponding to superconductor length 100m.
It can be observed also that as the length is increased the fault current is reduced closer to its nominal value
Figure 3.11(a)
.
Figure 3.11 (b)
Figure 3.11(a) Fault Current (b) Temperature corresponding to different lengths and at thickness of 0.009m of
the superconductor. (k=0.8).
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Similarly in Figures 3.10(b) and 3.11(b), the blue line shows the rise in the temperature of the
superconductor of length 70m during fault and red line shows the temperature rise in the superconductor
corresponding to length of 100m. From the above Figures 3.10(b) and Figure 3.11(b). It can be seen that as the
length of the superconductor is increased the temperature is decreased. As explained earlier too short length of
the superconductor is not suitable as it will damage the superconductor element in the HTSFCL due to large
amount of heat is produced during fault. If very long superconductor is used, the amount of electric field to
which it is exposed is very less and as the field varies in direct proportion with the voltage and inversely with
the conductor length, which results in the critical current density to exceed only slightly and will stay within the
outer boundary of the transition region. The conductor warms up slowly due to its length, causing high AC
losses, which will result in heavier demand of the cooling system. Also due to the length of the conductor, the
temperature is constant and the limiter does not heat up, so the device can be brought back into operation as
soon as the breaker is closed. For a long conductor a large amount of superconductor is needed, results in
additional cost. The other drawback of using a long conductor is that it takes a long time to return from its
normal state to its superconducting state. If a superconductor of intermediate length is used the electric field
during fault will be high but still less than the electrical field imposed on a conductor of a very short length. In
this case the current density rises to greater value during fault than it rises to in the case of a long conductor,
although remains inside the transition region. The power dissipated will be higher in this case than in the case of
a longer conductor, so the conductor will heat up and after a few tens of milliseconds it will pass the outer
transition boundary and enter the normal conducting region. As explained earlier, to keep a tolerance during
normal operation the current density J should not exceed k% of Jc. The value of k was 0.8 for the above results,
now we will change the value of k to 0.7 or 70% of Jc. The results for k=0.7 are reported and the change in the
fault current and temperature is observed.
IV. Conclusions
From the MATLAB simulation it is clear that the HTSFCLs are an effective technique for limiting the
potentially damaging effects of the fault current on the equipment installed in the power systems. HTSFCLs are
the most common uses of the superconductors and they are increasingly being used in electrical applications. As
the MATLAB simulation uses simple circuit, the general principles are applicable in real world circuits. Results
with different lengths of the superconductor are reported. It is observed that a superconductor of
intermediate length is used. The length depends on the level of fault current to be interrupted. In order to apply
some tolerance k=0.8 is used. The superconductor is cooled by liquid Nitrogen; as good and reliable cooling
system is required in order to have efficient operation of the HTSFCL.Thickness of 0.002m is used because the
temperature rise is less and heat from the superconductor can be easily removed during fault. The
Superconductor element is surrounded by stainless steel in order to remove heat from the superconductor
element during fault and avoid any damage to the superconductor. The detail of the MATLAB script used is
shown above.
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